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ArmPkg: Remove ARM32 Support

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edk2 is dropping support for the ARM32 architecture. This
commit removes ARM32 code from the remaining parts of ArmPkg.

Signed-off-by: Oliver Smith-Denny <osde@microsoft.com>
This commit is contained in:
Oliver Smith-Denny
2025-09-19 21:00:20 -07:00
committed by mergify[bot]
parent f73b53c283
commit 80de048c1b
4 changed files with 4 additions and 63 deletions
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42
ArmPkg/ArmPkg.dec
View File

@ -193,45 +193,6 @@
# If PcdMonitorConduitHvc = TRUE, conduit = HVC
gArmTokenSpaceGuid.PcdMonitorConduitHvc|FALSE|BOOLEAN|0x00000047
[PcdsFixedAtBuild.common, PcdsPatchableInModule.common]
gArmTokenSpaceGuid.PcdFdBaseAddress|0|UINT64|0x0000002B
gArmTokenSpaceGuid.PcdFvBaseAddress|0|UINT64|0x0000002D
[PcdsFixedAtBuild.ARM]
# This PCD should be a FeaturePcd. But we used this PCD as an '#if' in an ASM file.
# Using a FeaturePcd make a '(BOOLEAN) casting for its value which is not understood by the preprocessor.
gArmTokenSpaceGuid.PcdVFPEnabled|0|UINT32|0x00000024
#
# ARM Security Extension
#
# Secure Configuration Register
# - BIT0 : NS - Non Secure bit
# - BIT1 : IRQ Handler
# - BIT2 : FIQ Handler
# - BIT3 : EA - External Abort
# - BIT4 : FW - F bit writable
# - BIT5 : AW - A bit writable
# - BIT6 : nET - Not Early Termination
# - BIT7 : SCD - Secure Monitor Call Disable
# - BIT8 : HCE - Hyp Call enable
# - BIT9 : SIF - Secure Instruction Fetch
# 0x31 = NS | EA | FW
gArmTokenSpaceGuid.PcdArmScr|0x31|UINT32|0x00000038
# By default we do not do a transition to non-secure mode
gArmTokenSpaceGuid.PcdArmNonSecModeTransition|0x0|UINT32|0x0000003E
# Non Secure Access Control Register
# - BIT15 : NSASEDIS - Disable Non-secure Advanced SIMD functionality
# - BIT14 : NSD32DIS - Disable Non-secure use of D16-D31
# - BIT11 : cp11 - Non-secure access to coprocessor 11 enable
# - BIT10 : cp10 - Non-secure access to coprocessor 10 enable
# 0xC00 = cp10 | cp11
gArmTokenSpaceGuid.PcdArmNsacr|0xC00|UINT32|0x00000039
[PcdsFixedAtBuild.AARCH64]
#
# AArch64 Security Extension
#
@ -262,6 +223,9 @@
# not currently supported.
gArmTokenSpaceGuid.PcdArmNonSecModeTransition|0x3c9|UINT32|0x0000003E
[PcdsFixedAtBuild.common, PcdsPatchableInModule.common]
gArmTokenSpaceGuid.PcdFdBaseAddress|0|UINT64|0x0000002B
gArmTokenSpaceGuid.PcdFvBaseAddress|0|UINT64|0x0000002D
#
# These PCDs are also defined as 'PcdsDynamic' or 'PcdsPatchableInModule' to be

2
ArmPkg/ArmPkg.dsc
View File

@ -158,11 +158,9 @@
ArmPkg/Drivers/StandaloneMmCpu/StandaloneMmCpu.inf
[Components.AARCH64]
ArmPkg/Drivers/ArmCrashDumpDxe/ArmCrashDumpDxe.inf
ArmPkg/Drivers/ArmGicDxe/ArmGicV3Dxe.inf
ArmPkg/Drivers/ArmPsciMpServicesDxe/ArmPsciMpServicesDxe.inf
ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.inf
[Components.AARCH64, Components.ARM]
ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.inf

9
ArmPkg/Include/IndustryStandard/ArmMmSvc.h
View File

@ -22,17 +22,10 @@
#define ARM_FID_SPM_MM_SP_GET_MEM_ATTRIBUTES_AARCH64 0xC4000064
#define ARM_FID_SPM_MM_SP_SET_MEM_ATTRIBUTES_AARCH64 0xC4000065
/* Generic IDs when using AArch32 or AArch64 execution state */
#ifdef MDE_CPU_AARCH64
/* Generic IDs for AArch64 execution state */
#define ARM_FID_SPM_MM_SP_EVENT_COMPLETE ARM_FID_SPM_MM_SP_EVENT_COMPLETE_AARCH64
#define ARM_FID_SPM_MM_SP_GET_MEM_ATTRIBUTES ARM_FID_SPM_MM_SP_GET_MEM_ATTRIBUTES_AARCH64
#define ARM_FID_SPM_MM_SP_SET_MEM_ATTRIBUTES ARM_FID_SPM_MM_SP_SET_MEM_ATTRIBUTES_AARCH64
#endif
#ifdef MDE_CPU_ARM
#define ARM_FID_SPM_MM_SP_EVENT_COMPLETE ARM_FID_SPM_MM_SP_EVENT_COMPLETE_AARCH32
#define ARM_FID_SPM_MM_SP_GET_MEM_ATTRIBUTES ARM_FID_SPM_MM_SP_GET_MEM_ATTRIBUTES_AARCH32
#define ARM_FID_SPM_MM_SP_SET_MEM_ATTRIBUTES ARM_FID_SPM_MM_SP_SET_MEM_ATTRIBUTES_AARCH32
#endif
#define ARM_SPM_MM_SET_MEM_ATTR_DATA_PERM_MASK 0x3
#define ARM_SPM_MM_SET_MEM_ATTR_DATA_PERM_SHIFT 0

14
ArmPkg/Library/ArmTrngLib/ArmTrngDefs.h
View File

@ -25,17 +25,6 @@
#define TRNG_REV_MINOR_MASK 0xFFFF
#define TRNG_REV_MAJOR_SHIFT 16
#if defined (MDE_CPU_ARM)
/** FID to use on AArch32 platform to request entropy.
*/
#define ARM_SMC_ID_TRNG_RND ARM_SMC_ID_TRNG_RND_AARCH32
/** Maximum bits of entropy supported on AArch32.
*/
#define MAX_ENTROPY_BITS 96
#elif defined (MDE_CPU_AARCH64)
/** FID to use on AArch64 platform to request entropy.
*/
#define ARM_SMC_ID_TRNG_RND ARM_SMC_ID_TRNG_RND_AARCH64
@ -43,8 +32,5 @@
/** Maximum bits of entropy supported on AArch64.
*/
#define MAX_ENTROPY_BITS 192
#else
#error "Firmware TRNG not supported. Unknown chipset."
#endif
#endif // ARM_FW_TRNG_DEFS_H_