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MdePkg/BaseSynchronizationLib: RISC-V cache related code. 

Support RISC-V cache related functions.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2672

Signed-off-by: Abner Chang <abner.chang@hpe.com>
Co-authored-by: Gilbert Chen <gilbert.chen@hpe.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Gilbert Chen <gilbert.chen@hpe.com>
This commit is contained in:
Abner Chang 2020-04-21 09:51:27 +08:00 committed by mergify[bot]
parent 3fd8800954
commit 8c43227c64
2 changed files with 83 additions and 0 deletions
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5
MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
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@ -3,6 +3,7 @@
#
# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@ -78,6 +79,10 @@
AArch64/Synchronization.S | GCC
AArch64/Synchronization.asm | MSFT
[Sources.RISCV64]
Synchronization.c
RiscV64/Synchronization.S
[Packages]
MdePkg/MdePkg.dec

78
MdePkg/Library/BaseSynchronizationLib/RiscV64/Synchronization.S Normal file
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@ -0,0 +1,78 @@
//------------------------------------------------------------------------------
//
// RISC-V synchronization functions.
//
// Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
//
// SPDX-License-Identifier: BSD-2-Clause-Patent
//
//------------------------------------------------------------------------------
#include <Base.h>
.data
.text
.align 3
.global ASM_PFX(InternalSyncCompareExchange32)
.global ASM_PFX(InternalSyncCompareExchange64)
.global ASM_PFX(InternalSyncIncrement)
.global ASM_PFX(InternalSyncDecrement)
//
// ompare and xchange a 32-bit value.
//
// @param a0 : Pointer to 32-bit value.
// @param a1 : Compare value.
// @param a2 : Exchange value.
//
ASM_PFX (InternalSyncCompareExchange32):
lr.w a3, (a0) // Load the value from a0 and make
// the reservation of address.
bne a3, a1, exit
sc.w a3, a2, (a0) // Write the value back to the address.
mv a3, a1
exit:
mv a0, a3
ret
.global ASM_PFX(InternalSyncCompareExchange64)
//
// Compare and xchange a 64-bit value.
//
// @param a0 : Pointer to 64-bit value.
// @param a1 : Compare value.
// @param a2 : Exchange value.
//
ASM_PFX (SyncCompareExchange64):
lr.d a3, (a0) // Load the value from a0 and make
// the reservation of address.
bne a3, a1, exit
sc.d a3, a2, (a0) // Write the value back to the address.
mv a3, a1
exit2:
mv a0, a3
ret
//
// Performs an atomic increment of an 32-bit unsigned integer.
//
// @param a0 : Pointer to 32-bit value.
//
ASM_PFX (InternalSyncIncrement):
li a1, 1
amoadd.w a2, a1, (a0)
mv a0, a2
ret
//
// Performs an atomic decrement of an 32-bit unsigned integer.
//
// @param a0 : Pointer to 32-bit value.
//
ASM_PFX (InternalSyncDecrement):
li a1, -1
amoadd.w a2, a1, (a0)
mv a0, a2
ret