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UefiCpuPkg/RegisterCpuFeaturesLib: Enhance debug message. 

Enhance debug message format to let them easy to read.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1411

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
This commit is contained in:
Eric Dong 2018-11-08 09:00:10 +08:00
parent 8daa4278e8
commit a6416d91c3
1 changed files with 11 additions and 6 deletions
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17
UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
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@ -473,8 +473,9 @@ DumpRegisterTableOnProcessor (
case Msr: case Msr:
DEBUG (( DEBUG ((
DebugPrintErrorLevel, DebugPrintErrorLevel,
"Processor: %d: MSR: %x, Bit Start: %d, Bit Length: %d, Value: %lx\r\n", "Processor: %04d: Index %04d, MSR : %08x, Bit Start: %02d, Bit Length: %02d, Value: %016lx\r\n",
ProcessorNumber, ProcessorNumber,
FeatureIndex,
RegisterTableEntry->Index, RegisterTableEntry->Index,
RegisterTableEntry->ValidBitStart, RegisterTableEntry->ValidBitStart,
RegisterTableEntry->ValidBitLength, RegisterTableEntry->ValidBitLength,
@ -484,8 +485,9 @@ DumpRegisterTableOnProcessor (
case ControlRegister: case ControlRegister:
DEBUG (( DEBUG ((
DebugPrintErrorLevel, DebugPrintErrorLevel,
"Processor: %d: CR: %x, Bit Start: %d, Bit Length: %d, Value: %lx\r\n", "Processor: %04d: Index %04d, CR : %08x, Bit Start: %02d, Bit Length: %02d, Value: %016lx\r\n",
ProcessorNumber, ProcessorNumber,
FeatureIndex,
RegisterTableEntry->Index, RegisterTableEntry->Index,
RegisterTableEntry->ValidBitStart, RegisterTableEntry->ValidBitStart,
RegisterTableEntry->ValidBitLength, RegisterTableEntry->ValidBitLength,
@ -495,8 +497,9 @@ DumpRegisterTableOnProcessor (
case MemoryMapped: case MemoryMapped:
DEBUG (( DEBUG ((
DebugPrintErrorLevel, DebugPrintErrorLevel,
"Processor: %d: MMIO: %lx, Bit Start: %d, Bit Length: %d, Value: %lx\r\n", "Processor: %04d: Index %04d, MMIO : %08lx, Bit Start: %02d, Bit Length: %02d, Value: %016lx\r\n",
ProcessorNumber, ProcessorNumber,
FeatureIndex,
RegisterTableEntry->Index | LShiftU64 (RegisterTableEntry->HighIndex, 32), RegisterTableEntry->Index | LShiftU64 (RegisterTableEntry->HighIndex, 32),
RegisterTableEntry->ValidBitStart, RegisterTableEntry->ValidBitStart,
RegisterTableEntry->ValidBitLength, RegisterTableEntry->ValidBitLength,
@ -506,8 +509,9 @@ DumpRegisterTableOnProcessor (
case CacheControl: case CacheControl:
DEBUG (( DEBUG ((
DebugPrintErrorLevel, DebugPrintErrorLevel,
"Processor: %d: CACHE: %x, Bit Start: %d, Bit Length: %d, Value: %lx\r\n", "Processor: %04d: Index %04d, CACHE: %08lx, Bit Start: %02d, Bit Length: %02d, Value: %016lx\r\n",
ProcessorNumber, ProcessorNumber,
FeatureIndex,
RegisterTableEntry->Index, RegisterTableEntry->Index,
RegisterTableEntry->ValidBitStart, RegisterTableEntry->ValidBitStart,
RegisterTableEntry->ValidBitLength, RegisterTableEntry->ValidBitLength,
@ -517,8 +521,9 @@ DumpRegisterTableOnProcessor (
case Semaphore: case Semaphore:
DEBUG (( DEBUG ((
DebugPrintErrorLevel, DebugPrintErrorLevel,
"Processor: %d: Semaphore: Scope Value: %s\r\n", "Processor: %04d: Index %04d, SEMAP: %s\r\n",
ProcessorNumber, ProcessorNumber,
FeatureIndex,
mDependTypeStr[MIN ((UINT32)RegisterTableEntry->Value, InvalidDepType)] mDependTypeStr[MIN ((UINT32)RegisterTableEntry->Value, InvalidDepType)]
)); ));
break; break;
@ -833,7 +838,7 @@ ProgramProcessorRegister (
ApLocation->Thread; ApLocation->Thread;
DEBUG (( DEBUG ((
DEBUG_INFO, DEBUG_INFO,
"Processor = %lu, Entry Index %lu, Type = %s!\n", "Processor = %08lu, Index %08lu, Type = %s!\n",
(UINT64)ThreadIndex, (UINT64)ThreadIndex,
(UINT64)Index, (UINT64)Index,
mRegisterTypeStr[MIN ((REGISTER_TYPE)RegisterTableEntry->RegisterType, InvalidReg)] mRegisterTypeStr[MIN ((REGISTER_TYPE)RegisterTableEntry->RegisterType, InvalidReg)]