ArmPkg: use ID register helper for ArmGicArch(Sec)Lib
Use ArmHasGicSystemRegisters () instead of direct ID register tests. Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Signed-off-by: Leif Lindholm <leif@nuviainc.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
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@ -25,7 +25,7 @@ ArmGicArchLibInitialize (
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// feature is implemented on the CPU. This is also convenient as our GICv3
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// feature is implemented on the CPU. This is also convenient as our GICv3
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// driver requires SRE. If only Memory mapped access is available we try to
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// driver requires SRE. If only Memory mapped access is available we try to
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// drive the GIC as a v2.
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// drive the GIC as a v2.
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if (ArmReadIdPfr0 () & AARCH64_PFR0_GIC) {
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if (ArmHasGicSystemRegisters ()) {
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// Make sure System Register access is enabled (SRE). This depends on the
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// Make sure System Register access is enabled (SRE). This depends on the
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// higher privilege level giving us permission, otherwise we will either
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// higher privilege level giving us permission, otherwise we will either
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// cause an exception here, or the write doesn't stick in which case we need
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// cause an exception here, or the write doesn't stick in which case we need
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@ -25,7 +25,7 @@ ArmGicArchLibInitialize (
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// feature is implemented on the CPU. This is also convenient as our GICv3
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// feature is implemented on the CPU. This is also convenient as our GICv3
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// driver requires SRE. If only Memory mapped access is available we try to
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// driver requires SRE. If only Memory mapped access is available we try to
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// drive the GIC as a v2.
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// drive the GIC as a v2.
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if (ArmReadIdPfr1 () & ARM_PFR1_GIC) {
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if (ArmHasGicSystemRegisters ()) {
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// Make sure System Register access is enabled (SRE). This depends on the
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// Make sure System Register access is enabled (SRE). This depends on the
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// higher privilege level giving us permission, otherwise we will either
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// higher privilege level giving us permission, otherwise we will either
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// cause an exception here, or the write doesn't stick in which case we need
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// cause an exception here, or the write doesn't stick in which case we need
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@ -23,7 +23,7 @@ ArmGicGetSupportedArchRevision (
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// feature is implemented on the CPU. This is also convenient as our GICv3
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// feature is implemented on the CPU. This is also convenient as our GICv3
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// driver requires SRE. If only Memory mapped access is available we try to
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// driver requires SRE. If only Memory mapped access is available we try to
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// drive the GIC as a v2.
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// drive the GIC as a v2.
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if (ArmReadIdPfr0 () & AARCH64_PFR0_GIC) {
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if (ArmHasGicSystemRegisters ()) {
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// Make sure System Register access is enabled (SRE). This depends on the
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// Make sure System Register access is enabled (SRE). This depends on the
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// higher privilege level giving us permission, otherwise we will either
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// higher privilege level giving us permission, otherwise we will either
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// cause an exception here, or the write doesn't stick in which case we need
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// cause an exception here, or the write doesn't stick in which case we need
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@ -23,7 +23,7 @@ ArmGicGetSupportedArchRevision (
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// feature is implemented on the CPU. This is also convenient as our GICv3
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// feature is implemented on the CPU. This is also convenient as our GICv3
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// driver requires SRE. If only Memory mapped access is available we try to
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// driver requires SRE. If only Memory mapped access is available we try to
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// drive the GIC as a v2.
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// drive the GIC as a v2.
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if (ArmReadIdPfr1 () & ARM_PFR1_GIC) {
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if (ArmHasGicSystemRegisters ()) {
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// Make sure System Register access is enabled (SRE). This depends on the
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// Make sure System Register access is enabled (SRE). This depends on the
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// higher privilege level giving us permission, otherwise we will either
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// higher privilege level giving us permission, otherwise we will either
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// cause an exception here, or the write doesn't stick in which case we need
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// cause an exception here, or the write doesn't stick in which case we need
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