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OvmfPkg: consolidate POWER_MGMT_REGISTER_Q35() on "Q35MchIch9.h" macros 

All POWER_MGMT_REGISTER_Q35() macro invocations in OvmfPkg should use the
macros in "Q35MchIch9.h" as arguments.

Cc: Gabriel Somlo <somlo@cmu.edu>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Gabriel Somlo <somlo@cmu.edu>
Tested-by: Gabriel Somlo <somlo@cmu.edu>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17434 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Laszlo Ersek 2015-05-13 09:31:44 +00:00 committed by lersek
parent 6b225ace4b
commit bc9d05d6f2
5 changed files with 12 additions and 14 deletions
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7
OvmfPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.c
View File

@ -23,7 +23,6 @@
// //
#define PMBA_RTE BIT0 #define PMBA_RTE BIT0
#define PIIX4_PMIOSE BIT0 #define PIIX4_PMIOSE BIT0
#define Q35_ACPI_EN BIT7
// //
// Offset in the Power Management Base Address to the ACPI Timer // Offset in the Power Management Base Address to the ACPI Timer
@ -64,9 +63,9 @@ AcpiTimerLibConstructor (
AcpiEnBit = PIIX4_PMIOSE; AcpiEnBit = PIIX4_PMIOSE;
break; break;
case INTEL_Q35_MCH_DEVICE_ID: case INTEL_Q35_MCH_DEVICE_ID:
Pmba = POWER_MGMT_REGISTER_Q35 (0x40); Pmba = POWER_MGMT_REGISTER_Q35 (ICH9_PMBASE);
AcpiCtlReg = POWER_MGMT_REGISTER_Q35 (0x44); // ACPI_CNTL AcpiCtlReg = POWER_MGMT_REGISTER_Q35 (ICH9_ACPI_CNTL);
AcpiEnBit = Q35_ACPI_EN; AcpiEnBit = ICH9_ACPI_CNTL_ACPI_EN;
break; break;
default: default:
DEBUG ((EFI_D_ERROR, "%a: Unknown Host Bridge Device ID: 0x%04x\n", DEBUG ((EFI_D_ERROR, "%a: Unknown Host Bridge Device ID: 0x%04x\n",

9
OvmfPkg/Library/AcpiTimerLib/BaseRomAcpiTimerLib.c
View File

@ -24,7 +24,6 @@
// //
#define PMBA_RTE BIT0 #define PMBA_RTE BIT0
#define PIIX4_PMIOSE BIT0 #define PIIX4_PMIOSE BIT0
#define Q35_ACPI_EN BIT7
// //
// Offset in the Power Management Base Address to the ACPI Timer // Offset in the Power Management Base Address to the ACPI Timer
@ -62,9 +61,9 @@ AcpiTimerLibConstructor (
AcpiEnBit = PIIX4_PMIOSE; AcpiEnBit = PIIX4_PMIOSE;
break; break;
case INTEL_Q35_MCH_DEVICE_ID: case INTEL_Q35_MCH_DEVICE_ID:
Pmba = POWER_MGMT_REGISTER_Q35 (0x40); Pmba = POWER_MGMT_REGISTER_Q35 (ICH9_PMBASE);
AcpiCtlReg = POWER_MGMT_REGISTER_Q35 (0x44); // ACPI_CNTL AcpiCtlReg = POWER_MGMT_REGISTER_Q35 (ICH9_ACPI_CNTL);
AcpiEnBit = Q35_ACPI_EN; AcpiEnBit = ICH9_ACPI_CNTL_ACPI_EN;
break; break;
default: default:
DEBUG ((EFI_D_ERROR, "%a: Unknown Host Bridge Device ID: 0x%04x\n", DEBUG ((EFI_D_ERROR, "%a: Unknown Host Bridge Device ID: 0x%04x\n",
@ -118,7 +117,7 @@ InternalAcpiGetTimerTick (
Pmba = POWER_MGMT_REGISTER_PIIX4 (0x40); Pmba = POWER_MGMT_REGISTER_PIIX4 (0x40);
break; break;
case INTEL_Q35_MCH_DEVICE_ID: case INTEL_Q35_MCH_DEVICE_ID:
Pmba = POWER_MGMT_REGISTER_Q35 (0x40); Pmba = POWER_MGMT_REGISTER_Q35 (ICH9_PMBASE);
break; break;
default: default:
DEBUG ((EFI_D_ERROR, "%a: Unknown Host Bridge Device ID: 0x%04x\n", DEBUG ((EFI_D_ERROR, "%a: Unknown Host Bridge Device ID: 0x%04x\n",

2
OvmfPkg/Library/AcpiTimerLib/DxeAcpiTimerLib.c
View File

@ -64,7 +64,7 @@ AcpiTimerLibConstructor (
Pmba = POWER_MGMT_REGISTER_PIIX4 (0x40); Pmba = POWER_MGMT_REGISTER_PIIX4 (0x40);
break; break;
case INTEL_Q35_MCH_DEVICE_ID: case INTEL_Q35_MCH_DEVICE_ID:
Pmba = POWER_MGMT_REGISTER_Q35 (0x40); Pmba = POWER_MGMT_REGISTER_Q35 (ICH9_PMBASE);
break; break;
default: default:
DEBUG ((EFI_D_ERROR, "%a: Unknown Host Bridge Device ID: 0x%04x\n", DEBUG ((EFI_D_ERROR, "%a: Unknown Host Bridge Device ID: 0x%04x\n",

2
OvmfPkg/Library/PlatformBdsLib/BdsPlatform.c
View File

@ -870,7 +870,7 @@ PciAcpiInitialization (
PciWrite8 (PCI_LIB_ADDRESS (0, 1, 0, 0x63), 0x0a); // D PciWrite8 (PCI_LIB_ADDRESS (0, 1, 0, 0x63), 0x0a); // D
break; break;
case INTEL_Q35_MCH_DEVICE_ID: case INTEL_Q35_MCH_DEVICE_ID:
Pmba = POWER_MGMT_REGISTER_Q35 (0x40); Pmba = POWER_MGMT_REGISTER_Q35 (ICH9_PMBASE);
// //
// 00:1f.0 LPC Bridge (Q35) LNK routing targets // 00:1f.0 LPC Bridge (Q35) LNK routing targets
// //

6
OvmfPkg/PlatformPei/Platform.c
View File

@ -258,9 +258,9 @@ MiscInitialization (
break; break;
case INTEL_Q35_MCH_DEVICE_ID: case INTEL_Q35_MCH_DEVICE_ID:
PmCmd = POWER_MGMT_REGISTER_Q35 (PCI_COMMAND_OFFSET); PmCmd = POWER_MGMT_REGISTER_Q35 (PCI_COMMAND_OFFSET);
Pmba = POWER_MGMT_REGISTER_Q35 (0x40); Pmba = POWER_MGMT_REGISTER_Q35 (ICH9_PMBASE);
AcpiCtlReg = POWER_MGMT_REGISTER_Q35 (0x44); // ACPI_CNTL AcpiCtlReg = POWER_MGMT_REGISTER_Q35 (ICH9_ACPI_CNTL);
AcpiEnBit = BIT7; // Q35_ACPI_EN AcpiEnBit = ICH9_ACPI_CNTL_ACPI_EN;
break; break;
default: default:
DEBUG ((EFI_D_ERROR, "%a: Unknown Host Bridge Device ID: 0x%04x\n", DEBUG ((EFI_D_ERROR, "%a: Unknown Host Bridge Device ID: 0x%04x\n",