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ArmPlatformPkg: Remove double write in PL011 

The variable LineControl was initialised to zero, then updated in a
condition.  This change converts that to a write in each branch of the
condition, removing the Write/Read/Modify/Write sequence.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Evan Lloyd <evan.lloyd@arm.com>
Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
This commit is contained in:
Evan Lloyd 2016-06-15 13:52:40 +01:00 committed by Ard Biesheuvel
parent aadc64e6a1
commit ca0aad6982
1 changed files with 3 additions and 4 deletions
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7
ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c
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@ -73,20 +73,19 @@ PL011UartInitializePort (
UINT32 LineControl; UINT32 LineControl;
UINT32 Divisor; UINT32 Divisor;
LineControl = 0;
// The PL011 supports a buffer of 1, 16 or 32 chars. Therefore we can accept // The PL011 supports a buffer of 1, 16 or 32 chars. Therefore we can accept
// 1 char buffer as the minimum FIFO size. Because everything can be rounded // 1 char buffer as the minimum FIFO size. Because everything can be rounded
// down, there is no maximum FIFO size. // down, there is no maximum FIFO size.
if ((*ReceiveFifoDepth == 0) || (*ReceiveFifoDepth >= 32)) { if ((*ReceiveFifoDepth == 0) || (*ReceiveFifoDepth >= 32)) {
// Enable FIFO // Enable FIFO
LineControl |= PL011_UARTLCR_H_FEN; LineControl = PL011_UARTLCR_H_FEN;
if (PL011_UARTPID2_VER (MmioRead32 (UartBase + UARTPID2)) > PL011_VER_R1P4) if (PL011_UARTPID2_VER (MmioRead32 (UartBase + UARTPID2)) > PL011_VER_R1P4)
*ReceiveFifoDepth = 32; *ReceiveFifoDepth = 32;
else else
*ReceiveFifoDepth = 16; *ReceiveFifoDepth = 16;
} else { } else {
ASSERT (*ReceiveFifoDepth < 32); // Disable FIFO
LineControl = 0;
// Nothing else to do. 1 byte FIFO is default. // Nothing else to do. 1 byte FIFO is default.
*ReceiveFifoDepth = 1; *ReceiveFifoDepth = 1;
} }