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ArmPlaformPkg/ArmVExpressPkg: Move initialization of SP810 at the early stage of the platform initialization (SEC) 

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12644 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
oliviermartin 2011-11-01 23:44:51 +00:00
parent ce5ed6c8d5
commit d17afc8a02
2 changed files with 11 additions and 10 deletions
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11
ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSM.c
View File

@ -17,8 +17,6 @@
#include <Library/DebugLib.h> #include <Library/DebugLib.h>
#include <Library/PcdLib.h> #include <Library/PcdLib.h>
#include <Drivers/SP804Timer.h>
#include <Ppi/ArmMpCoreInfo.h> #include <Ppi/ArmMpCoreInfo.h>
#include <ArmPlatform.h> #include <ArmPlatform.h>
@ -114,14 +112,7 @@ ArmPlatformInitializeSystemMemory (
VOID VOID
) )
{ {
// Configure periodic timer (TIMER0) for 1MHz operation // Nothing to do here
MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER0_TIMCLK);
// Configure 1MHz clock
MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER1_TIMCLK);
// configure SP810 to use 1MHz clock and disable
MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER2_EN, SP810_SYS_CTRL_TIMER2_TIMCLK);
// Configure SP810 to use 1MHz clock and disable
MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER3_EN, SP810_SYS_CTRL_TIMER3_TIMCLK);
} }
EFI_STATUS EFI_STATUS

10
ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMSec.c
View File

@ -18,6 +18,8 @@
#include <Library/DebugLib.h> #include <Library/DebugLib.h>
#include <Library/PcdLib.h> #include <Library/PcdLib.h>
#include <Drivers/PL310L2Cache.h> #include <Drivers/PL310L2Cache.h>
#include <Drivers/SP804Timer.h>
#include <ArmPlatform.h>
/** /**
Initialize the Secure peripherals and memory regions Initialize the Secure peripherals and memory regions
@ -46,6 +48,14 @@ ArmPlatformSecInitialize (
VOID VOID
) )
{ {
// Configure periodic timer (TIMER0) for 1MHz operation
MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER0_TIMCLK);
// Configure 1MHz clock
MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER1_TIMCLK);
// Configure SP810 to use 1MHz clock and disable
MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER2_EN, SP810_SYS_CTRL_TIMER2_TIMCLK);
// Configure SP810 to use 1MHz clock and disable
MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER3_EN, SP810_SYS_CTRL_TIMER3_TIMCLK);
} }
/** /**