Virtualization
/
edk2
mirror of https://gitlab.com/qemu-project/edk2.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

IntelFsp2Pkg: Update FSP_GLOBAL_DATA and FSP_PLAT_DATA for X64 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3893
Updated FSP_GLOBAL_DATA and FSP_PLAT_DATA structures to support
both IA32 and X64.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Ashraf Ali S <ashraf.ali.s@intel.com>
Signed-off-by: Ted Kuo <ted.kuo@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
This commit is contained in:
Ted Kuo 2022-04-15 01:37:38 -07:00 committed by mergify[bot]
parent 6f219bef55
commit d40965b987
2 changed files with 38 additions and 17 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
IntelFsp2Pkg/FspSecCore/SecFsp.c
View File

@ -130,7 +130,7 @@ FspGlobalDataInit (
ZeroMem ((VOID *)PeiFspData, sizeof (FSP_GLOBAL_DATA)); ZeroMem ((VOID *)PeiFspData, sizeof (FSP_GLOBAL_DATA));
PeiFspData->Signature = FSP_GLOBAL_DATA_SIGNATURE; PeiFspData->Signature = FSP_GLOBAL_DATA_SIGNATURE;
PeiFspData->Version = 0; PeiFspData->Version = FSP_GLOBAL_DATA_VERSION;
PeiFspData->CoreStack = BootLoaderStack; PeiFspData->CoreStack = BootLoaderStack;
PeiFspData->PerfIdx = 2; PeiFspData->PerfIdx = 2;
PeiFspData->PerfSig = FSP_PERFORMANCE_DATA_SIGNATURE; PeiFspData->PerfSig = FSP_PERFORMANCE_DATA_SIGNATURE;

49
IntelFsp2Pkg/Include/FspGlobalData.h
View File

@ -1,6 +1,6 @@
/** @file /** @file
Copyright (c) 2014 - 2020, Intel Corporation. All rights reserved.<BR> Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent SPDX-License-Identifier: BSD-2-Clause-Patent
**/ **/
@ -12,6 +12,7 @@
#define FSP_IN_API_MODE 0 #define FSP_IN_API_MODE 0
#define FSP_IN_DISPATCH_MODE 1 #define FSP_IN_DISPATCH_MODE 1
#define FSP_GLOBAL_DATA_VERSION 1
#pragma pack(1) #pragma pack(1)
@ -28,10 +29,11 @@ typedef enum {
typedef struct { typedef struct {
VOID *DataPtr; VOID *DataPtr;
UINT32 MicrocodeRegionBase; UINTN MicrocodeRegionBase;
UINT32 MicrocodeRegionSize; UINTN MicrocodeRegionSize;
UINT32 CodeRegionBase; UINTN CodeRegionBase;
UINT32 CodeRegionSize; UINTN CodeRegionSize;
UINTN Reserved;
} FSP_PLAT_DATA; } FSP_PLAT_DATA;
#define FSP_GLOBAL_DATA_SIGNATURE SIGNATURE_32 ('F', 'S', 'P', 'D') #define FSP_GLOBAL_DATA_SIGNATURE SIGNATURE_32 ('F', 'S', 'P', 'D')
@ -42,15 +44,15 @@ typedef struct {
UINT32 Signature; UINT32 Signature;
UINT8 Version; UINT8 Version;
UINT8 Reserved1[3]; UINT8 Reserved1[3];
///
/// Offset 0x08
///
UINTN CoreStack; UINTN CoreStack;
UINTN Reserved2;
///
/// IA32: Offset 0x10; X64: Offset 0x18
///
UINT32 StatusCode; UINT32 StatusCode;
UINT32 Reserved2[8];
FSP_PLAT_DATA PlatformData;
FSP_INFO_HEADER *FspInfoHeader;
VOID *UpdDataPtr;
VOID *TempRamInitUpdPtr;
VOID *MemoryInitUpdPtr;
VOID *SiliconInitUpdPtr;
UINT8 ApiIdx; UINT8 ApiIdx;
/// ///
/// 0: FSP in API mode; 1: FSP in DISPATCH mode /// 0: FSP in API mode; 1: FSP in DISPATCH mode
@ -60,15 +62,34 @@ typedef struct {
UINT8 Reserved3; UINT8 Reserved3;
UINT32 NumberOfPhases; UINT32 NumberOfPhases;
UINT32 PhasesExecuted; UINT32 PhasesExecuted;
UINT32 Reserved4[8];
/// ///
/// IA32: Offset 0x40; X64: Offset 0x48
/// Start of UINTN and pointer section
/// All UINTN and pointer members must be put in this section
/// except CoreStack and Reserved2. In addition, the number of
/// UINTN and pointer members must be even for natural alignment
/// in both IA32 and X64.
///
FSP_PLAT_DATA PlatformData;
VOID *TempRamInitUpdPtr;
VOID *MemoryInitUpdPtr;
VOID *SiliconInitUpdPtr;
///
/// IA32: Offset 0x64; X64: Offset 0x90
/// To store function parameters pointer /// To store function parameters pointer
/// so it can be retrieved after stack switched. /// so it can be retrieved after stack switched.
/// ///
VOID *FunctionParameterPtr; VOID *FunctionParameterPtr;
UINT8 Reserved4[16]; FSP_INFO_HEADER *FspInfoHeader;
VOID *UpdDataPtr;
///
/// End of UINTN and pointer section
///
UINT8 Reserved5[16];
UINT32 PerfSig; UINT32 PerfSig;
UINT16 PerfLen; UINT16 PerfLen;
UINT16 Reserved5; UINT16 Reserved6;
UINT32 PerfIdx; UINT32 PerfIdx;
UINT64 PerfData[32]; UINT64 PerfData[32];
} FSP_GLOBAL_DATA; } FSP_GLOBAL_DATA;