diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.asm b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.asm
index 64c8207251..41f8e22f44 100644
--- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.asm
+++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.asm
@@ -86,7 +86,6 @@ ArmCleanDataCacheEntryBySetWay
 
 ArmInvalidateInstructionCache
   mcr     p15,0,R0,c7,c5,0      ;Invalidate entire instruction cache
-  dsb
   isb
   bx      LR
 
@@ -228,3 +227,4 @@ ArmInstructionSynchronizationBarrier
   bx      LR
 
     END
+
diff --git a/Omap35xxPkg/Include/Omap3530/Omap3530Interrupt.h b/Omap35xxPkg/Include/Omap3530/Omap3530Interrupt.h
index 23b99454c1..e4a27fe950 100644
--- a/Omap35xxPkg/Include/Omap3530/Omap3530Interrupt.h
+++ b/Omap35xxPkg/Include/Omap3530/Omap3530Interrupt.h
@@ -39,6 +39,7 @@
 #define INTCPS_PENDING_FIQ(n) (INTERRUPT_BASE + 0x009C + (0x20 * (n)))
 #define INTCPS_ILR(m)         (INTERRUPT_BASE + 0x0100 + (0x04 * (m)))
 
+#define INTCPS_ILR_FIQ            BIT0
 #define INTCPS_SIR_IRQ_MASK       (0x7F)
 #define INTCPS_CONTROL_NEWIRQAGR  BIT0
 #define INTCPS_CONTROL_NEWFIQAGR  BIT1
diff --git a/Omap35xxPkg/InterruptDxe/HardwareInterrupt.c b/Omap35xxPkg/InterruptDxe/HardwareInterrupt.c
index 72135c2452..8ffdc0bec1 100644
--- a/Omap35xxPkg/InterruptDxe/HardwareInterrupt.c
+++ b/Omap35xxPkg/InterruptDxe/HardwareInterrupt.c
@@ -87,6 +87,14 @@ RegisterInterruptSource (
     return EFI_UNSUPPORTED;
   } 
   
+  if ((MmioRead32 (INTCPS_ILR(Source)) & INTCPS_ILR_FIQ) == INTCPS_ILR_FIQ) {
+    // This vector has been programmed as FIQ so we can't use it for IRQ
+    // EFI does not use FIQ, but the debugger can use it to check for 
+    // ctrl-c. So this ASSERT means you have a conflict with the debug agent
+    ASSERT (FALSE);
+    return EFI_UNSUPPORTED;
+  }
+  
   if ((Handler == NULL) && (gRegisteredInterruptHandlers[Source] == NULL)) {
     return EFI_INVALID_PARAMETER;
   }
@@ -203,7 +211,7 @@ GetInterruptSourceState (
   Bank = Source / 32;
   Bit  = 1UL << (Source % 32);
     
-  if ((MmioRead32 (INTCPS_MIR(Bank)) & Bit) == Bit) {
+  if ((MmioRead32(INTCPS_MIR(Bank)) & Bit) == Bit) {
     *InterruptState = FALSE;
   } else {
     *InterruptState = TRUE;