FmpDevicePkg: Fix various typos
Fix one typo in FmpDevicePkg. Signed-off-by: Cœur <coeur@gmx.fr> Reviewed-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
This commit is contained in:
parent
8a842b31b9
commit
f527942e6b
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@ -194,9 +194,9 @@ StackSetupDone:
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;
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;
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; Pass BFV into the PEI Core
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; Pass BFV into the PEI Core
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; It uses relative address to calucate the actual boot FV base
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; It uses relative address to calculate the actual boot FV base
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; For FSP implementation with single FV, PcdFspBootFirmwareVolumeBase and
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; For FSP implementation with single FV, PcdFspBootFirmwareVolumeBase and
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; PcdFspAreaBaseAddress are the same. For FSP with mulitple FVs,
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; PcdFspAreaBaseAddress are the same. For FSP with multiple FVs,
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; they are different. The code below can handle both cases.
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; they are different. The code below can handle both cases.
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;
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;
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call ASM_PFX(AsmGetFspBaseAddress)
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call ASM_PFX(AsmGetFspBaseAddress)
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@ -1,6 +1,6 @@
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;------------------------------------------------------------------------------
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;------------------------------------------------------------------------------
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;
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;
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; Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
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; Copyright (c) 2015 - 2019, Intel Corporation. All rights reserved.<BR>
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; SPDX-License-Identifier: BSD-2-Clause-Patent
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; SPDX-License-Identifier: BSD-2-Clause-Patent
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;
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;
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; Abstract:
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; Abstract:
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@ -46,7 +46,7 @@ ASM_PFX(InitializeFloatingPointUnits):
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fldcw [ASM_PFX(mFpuControlWord)]
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fldcw [ASM_PFX(mFpuControlWord)]
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;
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;
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; Use CpuId instructuion (CPUID.01H:EDX.SSE[bit 25] = 1) to test
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; Use CpuId instruction (CPUID.01H:EDX.SSE[bit 25] = 1) to test
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; whether the processor supports SSE instruction.
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; whether the processor supports SSE instruction.
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;
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;
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mov eax, 1
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mov eax, 1
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@ -1,6 +1,6 @@
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;------------------------------------------------------------------------------
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;------------------------------------------------------------------------------
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;
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;
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; Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
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; Copyright (c) 2015 - 2019, Intel Corporation. All rights reserved.<BR>
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; SPDX-License-Identifier: BSD-2-Clause-Patent
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; SPDX-License-Identifier: BSD-2-Clause-Patent
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;
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;
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; Abstract:
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; Abstract:
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@ -150,7 +150,7 @@ NextAddress:
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fldcw [FpuControlWord]
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fldcw [FpuControlWord]
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;
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;
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; Use CpuId instructuion (CPUID.01H:EDX.SSE[bit 25] = 1) to test
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; Use CpuId instruction (CPUID.01H:EDX.SSE[bit 25] = 1) to test
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; whether the processor supports SSE instruction.
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; whether the processor supports SSE instruction.
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;
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;
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mov eax, 1
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mov eax, 1
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@ -1,6 +1,6 @@
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;------------------------------------------------------------------------------
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;------------------------------------------------------------------------------
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;
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;
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; Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
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; Copyright (c) 2015 - 2019, Intel Corporation. All rights reserved.<BR>
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; SPDX-License-Identifier: BSD-2-Clause-Patent
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; SPDX-License-Identifier: BSD-2-Clause-Patent
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;
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;
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; Abstract:
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; Abstract:
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@ -58,7 +58,7 @@ ASM_PFX(SecSwitchStack):
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mov esp, eax ; From now, esp is pointed to permanent memory
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mov esp, eax ; From now, esp is pointed to permanent memory
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;
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;
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; Fixup the ebp point to permenent memory
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; Fixup the ebp point to permanent memory
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;
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;
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mov eax, ebp
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mov eax, ebp
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sub eax, ebx
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sub eax, ebx
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@ -1,6 +1,6 @@
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/** @file
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/** @file
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Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2014 - 2019, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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**/
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@ -169,7 +169,7 @@ FspGlobalDataInit (
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SerialPortInitialize ();
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SerialPortInitialize ();
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//
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//
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// Ensure the golbal data pointer is valid
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// Ensure the global data pointer is valid
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//
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//
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ASSERT (GetFspGlobalDataPointer () == PeiFspData);
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ASSERT (GetFspGlobalDataPointer () == PeiFspData);
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@ -110,7 +110,7 @@ SecStartup (
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// |-------------------|---->
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// |-------------------|---->
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// | |
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// | |
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// | |
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// | |
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// | Heap | PeiTemporayRamSize
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// | Heap | PeiTemporaryRamSize
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// | |
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// | |
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// | |
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// | |
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// |-------------------|----> TempRamBase
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// |-------------------|----> TempRamBase
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@ -2,7 +2,7 @@
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; Reset Vector Data structure
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; Reset Vector Data structure
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; This structure is located at 0xFFFFFFC0
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; This structure is located at 0xFFFFFFC0
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;
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;
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; Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
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; Copyright (c) 2014 - 2019, Intel Corporation. All rights reserved.<BR>
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; SPDX-License-Identifier: BSD-2-Clause-Patent
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; SPDX-License-Identifier: BSD-2-Clause-Patent
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;
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;
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;;
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;;
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@ -61,7 +61,7 @@ ApStartup:
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;
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;
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; Jmp Rel16 instruction
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; Jmp Rel16 instruction
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; Use machine code directly in case of the assembler optimization
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; Use machine code directly in case of the assembler optimization
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; SEC entry point relatvie address will be fixed up by some build tool.
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; SEC entry point relative address will be fixed up by some build tool.
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;
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;
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; Typically, SEC entry point is the function _ModuleEntryPoint() defined in
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; Typically, SEC entry point is the function _ModuleEntryPoint() defined in
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; SecEntry.asm
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; SecEntry.asm
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@ -2,7 +2,7 @@
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Intel FSP API definition from Intel Firmware Support Package External
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Intel FSP API definition from Intel Firmware Support Package External
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Architecture Specification v2.0.
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Architecture Specification v2.0.
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Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2014 - 2019, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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**/
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@ -211,12 +211,12 @@ EFI_STATUS
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each FSP release.
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each FSP release.
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After FspMemInit completes its execution, it passes the pointer to the HobList and
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After FspMemInit completes its execution, it passes the pointer to the HobList and
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returns to the boot loader from where it was called. BootLoader is responsible to
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returns to the boot loader from where it was called. BootLoader is responsible to
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migrate it's stack and data to Memory.
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migrate its stack and data to Memory.
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FspMemoryInit, TempRamExit and FspSiliconInit APIs provide an alternate method to
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FspMemoryInit, TempRamExit and FspSiliconInit APIs provide an alternate method to
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complete the silicon initialization and provides bootloader an opportunity to get
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complete the silicon initialization and provides bootloader an opportunity to get
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control after system memory is available and before the temporary RAM is torn down.
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control after system memory is available and before the temporary RAM is torn down.
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@param[in] FspmUpdDataPtr Pointer to the FSPM_UPD data sructure.
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@param[in] FspmUpdDataPtr Pointer to the FSPM_UPD data structure.
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@param[out] HobListPtr Pointer to receive the address of the HOB list.
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@param[out] HobListPtr Pointer to receive the address of the HOB list.
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@retval EFI_SUCCESS FSP execution environment was initialized successfully.
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@retval EFI_SUCCESS FSP execution environment was initialized successfully.
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@ -271,7 +271,7 @@ EFI_STATUS
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@retval EFI_INVALID_PARAMETER Input parameters are invalid.
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@retval EFI_INVALID_PARAMETER Input parameters are invalid.
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@retval EFI_UNSUPPORTED The FSP calling conditions were not met.
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@retval EFI_UNSUPPORTED The FSP calling conditions were not met.
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@retval EFI_DEVICE_ERROR FSP initialization failed.
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@retval EFI_DEVICE_ERROR FSP initialization failed.
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@retval FSP_STATUS_RESET_REQUIREDx A reset is reuired. These status codes will not be returned during S3.
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@retval FSP_STATUS_RESET_REQUIREDx A reset is required. These status codes will not be returned during S3.
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**/
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**/
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typedef
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typedef
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EFI_STATUS
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EFI_STATUS
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@ -1,6 +1,6 @@
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/** @file
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/** @file
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Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2015 - 2019, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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**/
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@ -66,7 +66,7 @@ SecCarInit (
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);
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);
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/**
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/**
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This function check the signture of UPD.
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This function check the signature of UPD.
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@param[in] ApiIdx Internal index of the FSP API.
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@param[in] ApiIdx Internal index of the FSP API.
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@param[in] ApiParam Parameter of the FSP API.
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@param[in] ApiParam Parameter of the FSP API.
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@ -1,6 +1,6 @@
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/** @file
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/** @file
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Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2014 - 2019, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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**/
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@ -52,8 +52,8 @@ IsDefaultType (
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@param[in] BaseAddress Base address.
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@param[in] BaseAddress Base address.
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@param[in] Size Size.
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@param[in] Size Size.
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@retval Zero Alligned.
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@retval Zero Aligned.
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@retval Non-Zero Not alligned.
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@retval Non-Zero Not aligned.
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**/
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**/
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UINT32
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UINT32
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@ -217,7 +217,7 @@ Power2MaxMemory (
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}
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}
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//
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//
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// Compute inital power of 2 size to return
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// Compute initial power of 2 size to return
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//
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//
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Result = GetPowerOfTwo64(MemoryLength);
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Result = GetPowerOfTwo64(MemoryLength);
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@ -247,8 +247,8 @@ Power2MaxMemory (
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@param[in] BaseAddress Base address.
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@param[in] BaseAddress Base address.
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@param[in] Size Size.
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@param[in] Size Size.
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@retval Zero Alligned.
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@retval Zero Aligned.
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@retval Non-Zero Not alligned.
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@retval Non-Zero Not aligned.
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**/
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**/
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UINT32
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UINT32
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@ -186,7 +186,7 @@ DebugBPrint (
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}
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}
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/**
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/**
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Convert an UINT32 value into HEX string sepcified by Buffer.
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Convert an UINT32 value into HEX string specified by Buffer.
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@param Value The HEX value to convert to string
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@param Value The HEX value to convert to string
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@param Buffer The pointer to the target buffer to be filled with HEX string
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@param Buffer The pointer to the target buffer to be filled with HEX string
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@ -211,8 +211,8 @@ FillHex (
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Print a message of the form "ASSERT <FileName>(<LineNumber>): <Description>\n"
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Print a message of the form "ASSERT <FileName>(<LineNumber>): <Description>\n"
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to the debug output device. If DEBUG_PROPERTY_ASSERT_BREAKPOINT_ENABLED bit of
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to the debug output device. If DEBUG_PROPERTY_ASSERT_BREAKPOINT_ENABLED bit of
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PcdDebugProperyMask is set then CpuBreakpoint() is called. Otherwise, if
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PcdDebugPropertyMask is set then CpuBreakpoint() is called. Otherwise, if
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DEBUG_PROPERTY_ASSERT_DEADLOOP_ENABLED bit of PcdDebugProperyMask is set then
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DEBUG_PROPERTY_ASSERT_DEADLOOP_ENABLED bit of PcdDebugPropertyMask is set then
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CpuDeadLoop() is called. If neither of these bits are set, then this function
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CpuDeadLoop() is called. If neither of these bits are set, then this function
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returns immediately after the message is printed to the debug output device.
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returns immediately after the message is printed to the debug output device.
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DebugAssert() must actively prevent recursion. If DebugAssert() is called while
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DebugAssert() must actively prevent recursion. If DebugAssert() is called while
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@ -265,8 +265,8 @@ DebugAssertInternal (
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Print a message of the form "ASSERT <FileName>(<LineNumber>): <Description>\n"
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Print a message of the form "ASSERT <FileName>(<LineNumber>): <Description>\n"
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to the debug output device. If DEBUG_PROPERTY_ASSERT_BREAKPOINT_ENABLED bit of
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to the debug output device. If DEBUG_PROPERTY_ASSERT_BREAKPOINT_ENABLED bit of
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PcdDebugProperyMask is set then CpuBreakpoint() is called. Otherwise, if
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PcdDebugPropertyMask is set then CpuBreakpoint() is called. Otherwise, if
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DEBUG_PROPERTY_ASSERT_DEADLOOP_ENABLED bit of PcdDebugProperyMask is set then
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DEBUG_PROPERTY_ASSERT_DEADLOOP_ENABLED bit of PcdDebugPropertyMask is set then
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CpuDeadLoop() is called. If neither of these bits are set, then this function
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CpuDeadLoop() is called. If neither of these bits are set, then this function
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returns immediately after the message is printed to the debug output device.
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returns immediately after the message is printed to the debug output device.
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DebugAssert() must actively prevent recursion. If DebugAssert() is called while
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DebugAssert() must actively prevent recursion. If DebugAssert() is called while
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@ -322,10 +322,10 @@ DebugClearMemory (
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Returns TRUE if ASSERT() macros are enabled.
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Returns TRUE if ASSERT() macros are enabled.
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This function returns TRUE if the DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of
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This function returns TRUE if the DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of
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PcdDebugProperyMask is set. Otherwise FALSE is returned.
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PcdDebugPropertyMask is set. Otherwise FALSE is returned.
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@retval TRUE The DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of PcdDebugProperyMask is set.
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@retval TRUE The DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of PcdDebugPropertyMask is set.
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@retval FALSE The DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of PcdDebugProperyMask is clear.
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@retval FALSE The DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of PcdDebugPropertyMask is clear.
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**/
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**/
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BOOLEAN
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BOOLEAN
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@ -342,10 +342,10 @@ DebugAssertEnabled (
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Returns TRUE if DEBUG() macros are enabled.
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Returns TRUE if DEBUG() macros are enabled.
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This function returns TRUE if the DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of
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This function returns TRUE if the DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of
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PcdDebugProperyMask is set. Otherwise FALSE is returned.
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PcdDebugPropertyMask is set. Otherwise FALSE is returned.
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@retval TRUE The DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of PcdDebugProperyMask is set.
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@retval TRUE The DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of PcdDebugPropertyMask is set.
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@retval FALSE The DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of PcdDebugProperyMask is clear.
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@retval FALSE The DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of PcdDebugPropertyMask is clear.
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**/
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**/
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BOOLEAN
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BOOLEAN
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@ -361,10 +361,10 @@ DebugPrintEnabled (
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Returns TRUE if DEBUG_CODE() macros are enabled.
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Returns TRUE if DEBUG_CODE() macros are enabled.
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This function returns TRUE if the DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of
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This function returns TRUE if the DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of
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PcdDebugProperyMask is set. Otherwise FALSE is returned.
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PcdDebugPropertyMask is set. Otherwise FALSE is returned.
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@retval TRUE The DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of PcdDebugProperyMask is set.
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@retval TRUE The DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of PcdDebugPropertyMask is set.
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@retval FALSE The DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of PcdDebugProperyMask is clear.
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@retval FALSE The DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of PcdDebugPropertyMask is clear.
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**/
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**/
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BOOLEAN
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BOOLEAN
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@ -381,10 +381,10 @@ DebugCodeEnabled (
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Returns TRUE if DEBUG_CLEAR_MEMORY() macro is enabled.
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Returns TRUE if DEBUG_CLEAR_MEMORY() macro is enabled.
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This function returns TRUE if the DEBUG_PROPERTY_CLEAR_MEMORY_ENABLED bit of
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This function returns TRUE if the DEBUG_PROPERTY_CLEAR_MEMORY_ENABLED bit of
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PcdDebugProperyMask is set. Otherwise FALSE is returned.
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PcdDebugPropertyMask is set. Otherwise FALSE is returned.
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@retval TRUE The DEBUG_PROPERTY_CLEAR_MEMORY_ENABLED bit of PcdDebugProperyMask is set.
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@retval TRUE The DEBUG_PROPERTY_CLEAR_MEMORY_ENABLED bit of PcdDebugPropertyMask is set.
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@retval FALSE The DEBUG_PROPERTY_CLEAR_MEMORY_ENABLED bit of PcdDebugProperyMask is clear.
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@retval FALSE The DEBUG_PROPERTY_CLEAR_MEMORY_ENABLED bit of PcdDebugPropertyMask is clear.
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**/
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**/
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BOOLEAN
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BOOLEAN
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@ -1,11 +1,11 @@
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;------------------------------------------------------------------------------
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;------------------------------------------------------------------------------
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;
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;
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; Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
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; Copyright (c) 2016 - 2019, Intel Corporation. All rights reserved.<BR>
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; SPDX-License-Identifier: BSD-2-Clause-Patent
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; SPDX-License-Identifier: BSD-2-Clause-Patent
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;
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;
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; Abstract:
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; Abstract:
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;
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;
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; Switch the stack from temporary memory to permenent memory.
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; Switch the stack from temporary memory to permanent memory.
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;
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;
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;------------------------------------------------------------------------------
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;------------------------------------------------------------------------------
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@ -2,7 +2,7 @@
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; This is the code that goes from real-mode to protected mode.
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; This is the code that goes from real-mode to protected mode.
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; It consumes the reset vector, configures the stack.
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; It consumes the reset vector, configures the stack.
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;
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;
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; Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.<BR>
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; Copyright (c) 2015 - 2019, Intel Corporation. All rights reserved.<BR>
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||||||
; SPDX-License-Identifier: BSD-2-Clause-Patent
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; SPDX-License-Identifier: BSD-2-Clause-Patent
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;;
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;;
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|
|
||||||
|
@ -54,7 +54,7 @@ ASM_PFX(SecPlatformInit):
|
||||||
; esp
|
; esp
|
||||||
;
|
;
|
||||||
; Description:
|
; Description:
|
||||||
; Perform any essential early platform initilaisation
|
; Perform any essential early platform initialisation
|
||||||
; Setup a stack
|
; Setup a stack
|
||||||
;
|
;
|
||||||
;----------------------------------------------------------------------------
|
;----------------------------------------------------------------------------
|
||||||
|
|
|
@ -1,7 +1,7 @@
|
||||||
/** @file
|
/** @file
|
||||||
Null instance of Platform Sec Lib.
|
Null instance of Platform Sec Lib.
|
||||||
|
|
||||||
Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
|
Copyright (c) 2014 - 2019, Intel Corporation. All rights reserved.<BR>
|
||||||
SPDX-License-Identifier: BSD-2-Clause-Patent
|
SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||||
|
|
||||||
**/
|
**/
|
||||||
|
@ -10,7 +10,7 @@
|
||||||
#include <Library/FspCommonLib.h>
|
#include <Library/FspCommonLib.h>
|
||||||
|
|
||||||
/**
|
/**
|
||||||
This function check the signture of UPD.
|
This function check the signature of UPD.
|
||||||
|
|
||||||
@param[in] ApiIdx Internal index of the FSP API.
|
@param[in] ApiIdx Internal index of the FSP API.
|
||||||
@param[in] ApiParam Parameter of the FSP API.
|
@param[in] ApiParam Parameter of the FSP API.
|
||||||
|
|
|
@ -535,7 +535,7 @@ EndList
|
||||||
Offset = 0
|
Offset = 0
|
||||||
else:
|
else:
|
||||||
if DscLine.startswith('!'):
|
if DscLine.startswith('!'):
|
||||||
print("ERROR: Unrecoginized directive for line '%s'" % DscLine)
|
print("ERROR: Unrecognized directive for line '%s'" % DscLine)
|
||||||
raise SystemExit
|
raise SystemExit
|
||||||
if not Handle:
|
if not Handle:
|
||||||
continue
|
continue
|
||||||
|
|
|
@ -160,7 +160,7 @@ class Symbols:
|
||||||
#
|
#
|
||||||
def createDicts (self, fvDir, fvNames):
|
def createDicts (self, fvDir, fvNames):
|
||||||
#
|
#
|
||||||
# If the fvDir is not a dirctory, then raise an exception
|
# If the fvDir is not a directory, then raise an exception
|
||||||
#
|
#
|
||||||
if not os.path.isdir(fvDir):
|
if not os.path.isdir(fvDir):
|
||||||
raise Exception ("'%s' is not a valid directory!" % FvDir)
|
raise Exception ("'%s' is not a valid directory!" % FvDir)
|
||||||
|
|
|
@ -213,7 +213,7 @@ in the third.
|
||||||
```@Bsf NAME:{Variable 1} TYPE:{Combo}```
|
```@Bsf NAME:{Variable 1} TYPE:{Combo}```
|
||||||
|
|
||||||
There is a special **None** type that puts the variable in the **StructDef**
|
There is a special **None** type that puts the variable in the **StructDef**
|
||||||
region of the BSF, but doesn?t put it in any **Page** section. This makes the
|
region of the BSF, but doesn't put it in any **Page** section. This makes the
|
||||||
variable visible to BCT, but not to the end user.
|
variable visible to BCT, but not to the end user.
|
||||||
|
|
||||||
###HELP
|
###HELP
|
||||||
|
|
|
@ -30,7 +30,7 @@ FSP tree.
|
||||||
|
|
||||||
The example used contains Windows batch script %VARIABLES%.
|
The example used contains Windows batch script %VARIABLES%.
|
||||||
|
|
||||||
#FvFileBaseNames (Argument 2: 0ptional Part 1)
|
#FvFileBaseNames (Argument 2: Optional Part 1)
|
||||||
The firmware volume file base names (**_FvFileBaseNames_**) are the independent
|
The firmware volume file base names (**_FvFileBaseNames_**) are the independent
|
||||||
Fv?s that are to be patched within the FD. (0 or more in the form
|
Fv?s that are to be patched within the FD. (0 or more in the form
|
||||||
**FVFILEBASENAME:**) The colon **:** is used for delimiting the single
|
**FVFILEBASENAME:**) The colon **:** is used for delimiting the single
|
||||||
|
|
Loading…
Reference in New Issue