MdePkg: Add definitions for SMBIOS spec 3.1.0
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=340
TPM Device (Type 43) definition has been added at
713e4b007c
.
This patch is to add definitions for below items.
• BIOS Information (Type 0):
– Add new entry for extended BIOS ROM size
• System Enclosure or Chassis (Type 3):
– Add new chassis types: IoT Gateway and Embedded PC
– Add new chassis types: Mini PC and Stick PC
• Processor Information (Type 4):
– Add Intel Core m3 m5 m7 processors
– Add processor socket AM4
– Add processor socket LGA1151
– Add processor socket BGA1356, BGA1440, BGA1515
– Add AMD Opteron A-Series processor
– Add processor socket LGA3647-1
– Add processor socket SP3 Processors
– Add families for ARMv7 and ARMv8
– Add family for AMD Opteron(TM) X3000 Series APU
• Cache Information (Type 7):
– Extend to support Cache sizes >2047 MB
• System Slots (Type 9):
– Add Mini PCIe support
Cc: Liming Gao <liming.gao@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
This commit is contained in:
parent
aa961dea1e
commit
ff6a1f3211
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@ -1,7 +1,7 @@
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/** @file
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/** @file
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Industry Standard Definitions of SMBIOS Table Specification v3.0.0.
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Industry Standard Definitions of SMBIOS Table Specification v3.1.0.
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Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>
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(C) Copyright 2015-2017 Hewlett Packard Enterprise Development LP<BR>
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(C) Copyright 2015-2017 Hewlett Packard Enterprise Development LP<BR>
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This program and the accompanying materials are licensed and made available under
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This program and the accompanying materials are licensed and made available under
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the terms and conditions of the BSD License that accompanies this distribution.
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the terms and conditions of the BSD License that accompanies this distribution.
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@ -267,6 +267,14 @@ typedef struct {
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MBCE_SYSTEM_RESERVED SystemReserved;
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MBCE_SYSTEM_RESERVED SystemReserved;
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} MISC_BIOS_CHARACTERISTICS_EXTENSION;
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} MISC_BIOS_CHARACTERISTICS_EXTENSION;
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///
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/// Extended BIOS ROM size.
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///
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typedef struct {
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UINT16 Size :14;
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UINT16 Unit :2;
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} EXTENDED_BIOS_ROM_SIZE;
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///
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///
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/// BIOS Information (Type 0).
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/// BIOS Information (Type 0).
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///
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///
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@ -283,6 +291,10 @@ typedef struct {
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UINT8 SystemBiosMinorRelease;
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UINT8 SystemBiosMinorRelease;
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UINT8 EmbeddedControllerFirmwareMajorRelease;
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UINT8 EmbeddedControllerFirmwareMajorRelease;
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UINT8 EmbeddedControllerFirmwareMinorRelease;
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UINT8 EmbeddedControllerFirmwareMinorRelease;
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//
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// Add for smbios 3.1.0
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//
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EXTENDED_BIOS_ROM_SIZE ExtendedBiosSize;
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} SMBIOS_TABLE_TYPE0;
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} SMBIOS_TABLE_TYPE0;
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///
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///
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@ -407,7 +419,11 @@ typedef enum {
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MiscChassisBladeEnclosure = 0x1D,
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MiscChassisBladeEnclosure = 0x1D,
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MiscChassisTablet = 0x1E,
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MiscChassisTablet = 0x1E,
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MiscChassisConvertible = 0x1F,
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MiscChassisConvertible = 0x1F,
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MiscChassisDetachable = 0x20
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MiscChassisDetachable = 0x20,
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MiscChassisIoTGateway = 0x21,
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MiscChassisEmbeddedPc = 0x22,
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MiscChassisMiniPc = 0x23,
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MiscChassisStickPc = 0x24
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} MISC_CHASSIS_TYPE;
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} MISC_CHASSIS_TYPE;
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///
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///
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@ -540,6 +556,9 @@ typedef enum {
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ProcessorFamilyIntelCoreSoloMobile = 0x2A,
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ProcessorFamilyIntelCoreSoloMobile = 0x2A,
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ProcessorFamilyIntelAtom = 0x2B,
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ProcessorFamilyIntelAtom = 0x2B,
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ProcessorFamilyIntelCoreM = 0x2C,
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ProcessorFamilyIntelCoreM = 0x2C,
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ProcessorFamilyIntelCorem3 = 0x2D,
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ProcessorFamilyIntelCorem5 = 0x2E,
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ProcessorFamilyIntelCorem7 = 0x2F,
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ProcessorFamilyAlpha = 0x30,
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ProcessorFamilyAlpha = 0x30,
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ProcessorFamilyAlpha21064 = 0x31,
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ProcessorFamilyAlpha21064 = 0x31,
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ProcessorFamilyAlpha21066 = 0x32,
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ProcessorFamilyAlpha21066 = 0x32,
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@ -590,6 +609,8 @@ typedef enum {
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ProcessorFamilyAmdAthlonX4QuadCore = 0x66,
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ProcessorFamilyAmdAthlonX4QuadCore = 0x66,
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ProcessorFamilyAmdOpteronX1000Series = 0x67,
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ProcessorFamilyAmdOpteronX1000Series = 0x67,
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ProcessorFamilyAmdOpteronX2000Series = 0x68,
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ProcessorFamilyAmdOpteronX2000Series = 0x68,
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ProcessorFamilyAmdOpteronASeries = 0x69,
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ProcessorFamilyAmdOpteronX3000Series = 0x6A,
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ProcessorFamilyHobbit = 0x70,
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ProcessorFamilyHobbit = 0x70,
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ProcessorFamilyCrusoeTM5000 = 0x78,
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ProcessorFamilyCrusoeTM5000 = 0x78,
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ProcessorFamilyCrusoeTM3000 = 0x79,
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ProcessorFamilyCrusoeTM3000 = 0x79,
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@ -699,6 +720,8 @@ typedef enum {
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/// Processor Information2 - Processor Family2.
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/// Processor Information2 - Processor Family2.
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///
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///
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typedef enum {
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typedef enum {
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ProcessorFamilyARMv7 = 0x0100,
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ProcessorFamilyARMv8 = 0x0101,
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ProcessorFamilySH3 = 0x0104,
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ProcessorFamilySH3 = 0x0104,
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ProcessorFamilySH4 = 0x0105,
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ProcessorFamilySH4 = 0x0105,
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ProcessorFamilyARM = 0x0118,
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ProcessorFamilyARM = 0x0118,
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@ -774,7 +797,14 @@ typedef enum {
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ProcessorUpgradeSocketLGA1150 = 0x2D,
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ProcessorUpgradeSocketLGA1150 = 0x2D,
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ProcessorUpgradeSocketBGA1168 = 0x2E,
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ProcessorUpgradeSocketBGA1168 = 0x2E,
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ProcessorUpgradeSocketBGA1234 = 0x2F,
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ProcessorUpgradeSocketBGA1234 = 0x2F,
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ProcessorUpgradeSocketBGA1364 = 0x30
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ProcessorUpgradeSocketBGA1364 = 0x30,
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ProcessorUpgradeSocketAM4 = 0x31,
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ProcessorUpgradeSocketLGA1151 = 0x32,
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ProcessorUpgradeSocketBGA1356 = 0x33,
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ProcessorUpgradeSocketBGA1440 = 0x34,
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ProcessorUpgradeSocketBGA1515 = 0x35,
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ProcessorUpgradeSocketLGA3647_1 = 0x36,
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ProcessorUpgradeSocketSP3 = 0x37
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} PROCESSOR_UPGRADE;
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} PROCESSOR_UPGRADE;
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///
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///
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@ -1081,6 +1111,11 @@ typedef struct {
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UINT8 ErrorCorrectionType; ///< The enumeration value from CACHE_ERROR_TYPE_DATA.
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UINT8 ErrorCorrectionType; ///< The enumeration value from CACHE_ERROR_TYPE_DATA.
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UINT8 SystemCacheType; ///< The enumeration value from CACHE_TYPE_DATA.
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UINT8 SystemCacheType; ///< The enumeration value from CACHE_TYPE_DATA.
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UINT8 Associativity; ///< The enumeration value from CACHE_ASSOCIATIVITY_DATA.
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UINT8 Associativity; ///< The enumeration value from CACHE_ASSOCIATIVITY_DATA.
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//
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// Add for smbios 3.1.0
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//
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UINT32 MaximumCacheSize2;
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UINT32 InstalledSize2;
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} SMBIOS_TABLE_TYPE7;
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} SMBIOS_TABLE_TYPE7;
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///
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///
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@ -1225,6 +1260,9 @@ typedef enum {
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SlotTypeMxm30TypeB = 0x1E,
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SlotTypeMxm30TypeB = 0x1E,
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SlotTypePciExpressGen2Sff_8639 = 0x1F,
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SlotTypePciExpressGen2Sff_8639 = 0x1F,
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SlotTypePciExpressGen3Sff_8639 = 0x20,
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SlotTypePciExpressGen3Sff_8639 = 0x20,
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SlotTypePciExpressMini52pinWithBSKO = 0x21, ///< PCI Express Mini 52-pin (CEM spec. 2.0) with bottom-side keep-outs.
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SlotTypePciExpressMini52pinWithoutBSKO = 0x22, ///< PCI Express Mini 52-pin (CEM spec. 2.0) without bottom-side keep-outs.
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SlotTypePciExpressMini76pin = 0x23, ///< PCI Express Mini 76-pin (CEM spec. 2.0) Corresponds to Display-Mini card.
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SlotTypePC98C20 = 0xA0,
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SlotTypePC98C20 = 0xA0,
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SlotTypePC98C24 = 0xA1,
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SlotTypePC98C24 = 0xA1,
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SlotTypePC98E = 0xA2,
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SlotTypePC98E = 0xA2,
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