MdePkg: Add definitions for SMBIOS spec 3.1.0

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=340

TPM Device (Type 43) definition has been added at
713e4b007c.

This patch is to add definitions for below items.
• BIOS Information (Type 0):
– Add new entry for extended BIOS ROM size
• System Enclosure or Chassis (Type 3):
– Add new chassis types: IoT Gateway and Embedded PC
– Add new chassis types: Mini PC and Stick PC
• Processor Information (Type 4):
– Add Intel Core m3 m5 m7 processors
– Add processor socket AM4
– Add processor socket LGA1151
– Add processor socket BGA1356, BGA1440, BGA1515
– Add AMD Opteron A-Series processor
– Add processor socket LGA3647-1
– Add processor socket SP3 Processors
– Add families for ARMv7 and ARMv8
– Add family for AMD Opteron(TM) X3000 Series APU
• Cache Information (Type 7):
– Extend to support Cache sizes >2047 MB
• System Slots (Type 9):
– Add Mini PCIe support

Cc: Liming Gao <liming.gao@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
This commit is contained in:
Star Zeng 2017-01-12 16:21:45 +08:00
parent aa961dea1e
commit ff6a1f3211
1 changed files with 42 additions and 4 deletions

View File

@ -1,7 +1,7 @@
/** @file /** @file
Industry Standard Definitions of SMBIOS Table Specification v3.0.0. Industry Standard Definitions of SMBIOS Table Specification v3.1.0.
Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR> Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>
(C) Copyright 2015-2017 Hewlett Packard Enterprise Development LP<BR> (C) Copyright 2015-2017 Hewlett Packard Enterprise Development LP<BR>
This program and the accompanying materials are licensed and made available under This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution. the terms and conditions of the BSD License that accompanies this distribution.
@ -267,6 +267,14 @@ typedef struct {
MBCE_SYSTEM_RESERVED SystemReserved; MBCE_SYSTEM_RESERVED SystemReserved;
} MISC_BIOS_CHARACTERISTICS_EXTENSION; } MISC_BIOS_CHARACTERISTICS_EXTENSION;
///
/// Extended BIOS ROM size.
///
typedef struct {
UINT16 Size :14;
UINT16 Unit :2;
} EXTENDED_BIOS_ROM_SIZE;
/// ///
/// BIOS Information (Type 0). /// BIOS Information (Type 0).
/// ///
@ -283,6 +291,10 @@ typedef struct {
UINT8 SystemBiosMinorRelease; UINT8 SystemBiosMinorRelease;
UINT8 EmbeddedControllerFirmwareMajorRelease; UINT8 EmbeddedControllerFirmwareMajorRelease;
UINT8 EmbeddedControllerFirmwareMinorRelease; UINT8 EmbeddedControllerFirmwareMinorRelease;
//
// Add for smbios 3.1.0
//
EXTENDED_BIOS_ROM_SIZE ExtendedBiosSize;
} SMBIOS_TABLE_TYPE0; } SMBIOS_TABLE_TYPE0;
/// ///
@ -407,7 +419,11 @@ typedef enum {
MiscChassisBladeEnclosure = 0x1D, MiscChassisBladeEnclosure = 0x1D,
MiscChassisTablet = 0x1E, MiscChassisTablet = 0x1E,
MiscChassisConvertible = 0x1F, MiscChassisConvertible = 0x1F,
MiscChassisDetachable = 0x20 MiscChassisDetachable = 0x20,
MiscChassisIoTGateway = 0x21,
MiscChassisEmbeddedPc = 0x22,
MiscChassisMiniPc = 0x23,
MiscChassisStickPc = 0x24
} MISC_CHASSIS_TYPE; } MISC_CHASSIS_TYPE;
/// ///
@ -540,6 +556,9 @@ typedef enum {
ProcessorFamilyIntelCoreSoloMobile = 0x2A, ProcessorFamilyIntelCoreSoloMobile = 0x2A,
ProcessorFamilyIntelAtom = 0x2B, ProcessorFamilyIntelAtom = 0x2B,
ProcessorFamilyIntelCoreM = 0x2C, ProcessorFamilyIntelCoreM = 0x2C,
ProcessorFamilyIntelCorem3 = 0x2D,
ProcessorFamilyIntelCorem5 = 0x2E,
ProcessorFamilyIntelCorem7 = 0x2F,
ProcessorFamilyAlpha = 0x30, ProcessorFamilyAlpha = 0x30,
ProcessorFamilyAlpha21064 = 0x31, ProcessorFamilyAlpha21064 = 0x31,
ProcessorFamilyAlpha21066 = 0x32, ProcessorFamilyAlpha21066 = 0x32,
@ -590,6 +609,8 @@ typedef enum {
ProcessorFamilyAmdAthlonX4QuadCore = 0x66, ProcessorFamilyAmdAthlonX4QuadCore = 0x66,
ProcessorFamilyAmdOpteronX1000Series = 0x67, ProcessorFamilyAmdOpteronX1000Series = 0x67,
ProcessorFamilyAmdOpteronX2000Series = 0x68, ProcessorFamilyAmdOpteronX2000Series = 0x68,
ProcessorFamilyAmdOpteronASeries = 0x69,
ProcessorFamilyAmdOpteronX3000Series = 0x6A,
ProcessorFamilyHobbit = 0x70, ProcessorFamilyHobbit = 0x70,
ProcessorFamilyCrusoeTM5000 = 0x78, ProcessorFamilyCrusoeTM5000 = 0x78,
ProcessorFamilyCrusoeTM3000 = 0x79, ProcessorFamilyCrusoeTM3000 = 0x79,
@ -699,6 +720,8 @@ typedef enum {
/// Processor Information2 - Processor Family2. /// Processor Information2 - Processor Family2.
/// ///
typedef enum { typedef enum {
ProcessorFamilyARMv7 = 0x0100,
ProcessorFamilyARMv8 = 0x0101,
ProcessorFamilySH3 = 0x0104, ProcessorFamilySH3 = 0x0104,
ProcessorFamilySH4 = 0x0105, ProcessorFamilySH4 = 0x0105,
ProcessorFamilyARM = 0x0118, ProcessorFamilyARM = 0x0118,
@ -774,7 +797,14 @@ typedef enum {
ProcessorUpgradeSocketLGA1150 = 0x2D, ProcessorUpgradeSocketLGA1150 = 0x2D,
ProcessorUpgradeSocketBGA1168 = 0x2E, ProcessorUpgradeSocketBGA1168 = 0x2E,
ProcessorUpgradeSocketBGA1234 = 0x2F, ProcessorUpgradeSocketBGA1234 = 0x2F,
ProcessorUpgradeSocketBGA1364 = 0x30 ProcessorUpgradeSocketBGA1364 = 0x30,
ProcessorUpgradeSocketAM4 = 0x31,
ProcessorUpgradeSocketLGA1151 = 0x32,
ProcessorUpgradeSocketBGA1356 = 0x33,
ProcessorUpgradeSocketBGA1440 = 0x34,
ProcessorUpgradeSocketBGA1515 = 0x35,
ProcessorUpgradeSocketLGA3647_1 = 0x36,
ProcessorUpgradeSocketSP3 = 0x37
} PROCESSOR_UPGRADE; } PROCESSOR_UPGRADE;
/// ///
@ -1081,6 +1111,11 @@ typedef struct {
UINT8 ErrorCorrectionType; ///< The enumeration value from CACHE_ERROR_TYPE_DATA. UINT8 ErrorCorrectionType; ///< The enumeration value from CACHE_ERROR_TYPE_DATA.
UINT8 SystemCacheType; ///< The enumeration value from CACHE_TYPE_DATA. UINT8 SystemCacheType; ///< The enumeration value from CACHE_TYPE_DATA.
UINT8 Associativity; ///< The enumeration value from CACHE_ASSOCIATIVITY_DATA. UINT8 Associativity; ///< The enumeration value from CACHE_ASSOCIATIVITY_DATA.
//
// Add for smbios 3.1.0
//
UINT32 MaximumCacheSize2;
UINT32 InstalledSize2;
} SMBIOS_TABLE_TYPE7; } SMBIOS_TABLE_TYPE7;
/// ///
@ -1225,6 +1260,9 @@ typedef enum {
SlotTypeMxm30TypeB = 0x1E, SlotTypeMxm30TypeB = 0x1E,
SlotTypePciExpressGen2Sff_8639 = 0x1F, SlotTypePciExpressGen2Sff_8639 = 0x1F,
SlotTypePciExpressGen3Sff_8639 = 0x20, SlotTypePciExpressGen3Sff_8639 = 0x20,
SlotTypePciExpressMini52pinWithBSKO = 0x21, ///< PCI Express Mini 52-pin (CEM spec. 2.0) with bottom-side keep-outs.
SlotTypePciExpressMini52pinWithoutBSKO = 0x22, ///< PCI Express Mini 52-pin (CEM spec. 2.0) without bottom-side keep-outs.
SlotTypePciExpressMini76pin = 0x23, ///< PCI Express Mini 76-pin (CEM spec. 2.0) Corresponds to Display-Mini card.
SlotTypePC98C20 = 0xA0, SlotTypePC98C20 = 0xA0,
SlotTypePC98C24 = 0xA1, SlotTypePC98C24 = 0xA1,
SlotTypePC98E = 0xA2, SlotTypePC98E = 0xA2,