282 lines
8.2 KiB
C
282 lines
8.2 KiB
C
/** @file
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Copyright (c) 2024, Arm Limited. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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@par Glossary:
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- Cm or CM - Configuration Manager
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- Obj or OBJ - Object
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- Std or STD - Standard
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**/
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#ifndef ARCH_COMMON_NAMESPACE_OBJECTS_H_
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#define ARCH_COMMON_NAMESPACE_OBJECTS_H_
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#include <AcpiObjects.h>
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#include <StandardNameSpaceObjects.h>
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/** The EARCH_COMMON_OBJECT_ID enum describes the Object IDs
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in the Arch Common Namespace
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*/
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typedef enum ArchCommonObjectID {
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EArchCommonObjReserved, ///< 0 - Reserved
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EArchCommonObjPowerManagementProfileInfo, ///< 1 - Power Management Profile Info
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EArchCommonObjSerialPortInfo, ///< 2 - Generic Serial Port Info
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EArchCommonObjConsolePortInfo, ///< 3 - Serial Console Port Info
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EArchCommonObjSerialDebugPortInfo, ///< 4 - Serial Debug Port Info
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EArchCommonObjHypervisorVendorIdentity, ///< 5 - Hypervisor Vendor Id
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EArchCommonObjFixedFeatureFlags, ///< 6 - Fixed feature flags for FADT
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EArchCommonObjCmRef, ///< 7 - CM Object Reference
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EArchCommonObjPciConfigSpaceInfo, ///< 8 - PCI Configuration Space Info
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EArchCommonObjPciAddressMapInfo, ///< 9 - Pci Address Map Info
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EArchCommonObjPciInterruptMapInfo, ///< 10 - Pci Interrupt Map Info
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EArchCommonObjMemoryAffinityInfo, ///< 11 - Memory Affinity Info
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EArchCommonObjDeviceHandleAcpi, ///< 12 - Device Handle Acpi
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EArchCommonObjDeviceHandlePci, ///< 13 - Device Handle Pci
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EArchCommonObjMax
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} EARCH_COMMON_OBJECT_ID;
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#pragma pack(1)
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/** A structure that describes the
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Power Management Profile Information for the Platform.
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ID: EArchCommonObjPowerManagementProfileInfo
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*/
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typedef struct CmArchCommonPowerManagementProfileInfo {
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/** This is the Preferred_PM_Profile field of the FADT Table
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described in the ACPI Specification
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*/
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UINT8 PowerManagementProfile;
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} CM_ARCH_COMMON_POWER_MANAGEMENT_PROFILE_INFO;
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/** A structure that describes the
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Serial Port information for the Platform.
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ID: EArchCommonObjConsolePortInfo or
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EArchCommonObjSerialDebugPortInfo or
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EArchCommonObjSerialPortInfo
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*/
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typedef struct EArchCommonSerialPortInfo {
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/// The physical base address for the serial port
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UINT64 BaseAddress;
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/** The serial port interrupt.
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0 indicates that the serial port does not
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have an interrupt wired.
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*/
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UINT32 Interrupt;
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/// The serial port baud rate
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UINT64 BaudRate;
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/// The serial port clock
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UINT32 Clock;
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/// Serial Port subtype
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UINT16 PortSubtype;
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/// The Base address length
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UINT64 BaseAddressLength;
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/// The access size
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UINT8 AccessSize;
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} CM_ARCH_COMMON_SERIAL_PORT_INFO;
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/** A structure that describes the
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Hypervisor Vendor ID information for the Platform.
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ID: EArchCommonObjHypervisorVendorIdentity
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*/
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typedef struct CmArchCommonHypervisorVendorIdentity {
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/// The hypervisor Vendor ID
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UINT64 HypervisorVendorId;
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} CM_ARCH_COMMON_HYPERVISOR_VENDOR_ID;
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/** A structure that describes the
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Fixed feature flags for the Platform.
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ID: EArchCommonObjFixedFeatureFlags
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*/
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typedef struct CmArchCommonFixedFeatureFlags {
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/// The Fixed feature flags
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UINT32 Flags;
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} CM_ARCH_COMMON_FIXED_FEATURE_FLAGS;
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/** A structure that describes a reference to another Configuration Manager
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object.
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This is useful for creating an array of reference tokens. The framework
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can then query the configuration manager for these arrays using the
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object ID EArchCommonObjCmRef.
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This can be used is to represent one-to-many relationships between objects.
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ID: EArchCommonObjCmRef
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*/
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typedef struct CmArchCommonObjRef {
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/// Token of the CM object being referenced
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CM_OBJECT_TOKEN ReferenceToken;
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} CM_ARCH_COMMON_OBJ_REF;
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/** A structure that describes the
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PCI Configuration Space information for the Platform.
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ID: EArchCommonObjPciConfigSpaceInfo
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*/
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typedef struct CmArchCommonPciConfigSpaceInfo {
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/// The physical base address for the PCI segment
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UINT64 BaseAddress;
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/// The PCI segment group number
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UINT16 PciSegmentGroupNumber;
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/// The start bus number
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UINT8 StartBusNumber;
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/// The end bus number
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UINT8 EndBusNumber;
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/// Optional field: Reference Token for address mapping.
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/// Token identifying a CM_ARCH_COMMON_OBJ_REF structure.
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CM_OBJECT_TOKEN AddressMapToken;
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/// Optional field: Reference Token for interrupt mapping.
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/// Token identifying a CM_ARCH_COMMON_OBJ_REF structure.
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CM_OBJECT_TOKEN InterruptMapToken;
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} CM_ARCH_COMMON_PCI_CONFIG_SPACE_INFO;
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/** A structure that describes a PCI Address Map.
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The memory-ranges used by the PCI bus are described by this object.
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ID: EArchCommonObjPciAddressMapInfo
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*/
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typedef struct CmArchCommonPciAddressMapInfo {
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/** Pci address space code
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Available values are:
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- 0: Configuration Space
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- 1: I/O Space
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- 2: 32-bit-address Memory Space
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- 3: 64-bit-address Memory Space
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*/
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UINT8 SpaceCode;
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/// PCI address
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UINT64 PciAddress;
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/// Cpu address
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UINT64 CpuAddress;
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/// Address size
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UINT64 AddressSize;
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} CM_ARCH_COMMON_PCI_ADDRESS_MAP_INFO;
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/** A structure that describes the
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Generic Interrupts.
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*/
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typedef struct CmArchCommonGenericInterrupt {
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/// Interrupt number
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UINT32 Interrupt;
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/// Flags
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/// BIT0: 0: Interrupt is Level triggered
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/// 1: Interrupt is Edge triggered
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/// BIT1: 0: Interrupt is Active high
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/// 1: Interrupt is Active low
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UINT32 Flags;
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} CM_ARCH_COMMON_GENERIC_INTERRUPT;
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/** A structure that describes a PCI Interrupt Map.
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The legacy PCI interrupts used by PCI devices are described by this object.
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Cf Devicetree Specification - Release v0.3
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s2.4.3 "Interrupt Nexus Properties"
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ID: EArchCommonObjPciInterruptMapInfo
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*/
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typedef struct CmArchCommonPciInterruptMapInfo {
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/// Pci Bus.
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/// Value on 8 bits (max 255).
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UINT8 PciBus;
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/// Pci Device.
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/// Value on 5 bits (max 31).
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UINT8 PciDevice;
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/** PCI interrupt
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ACPI bindings are used:
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Cf. ACPI 6.4, s6.2.13 _PRT (PCI Routing Table):
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"0-INTA, 1-INTB, 2-INTC, 3-INTD"
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Device-tree bindings are shifted by 1:
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"INTA=1, INTB=2, INTC=3, INTD=4"
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*/
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UINT8 PciInterrupt;
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/** Interrupt controller interrupt.
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Cf Devicetree Specification - Release v0.3
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s2.4.3 "Interrupt Nexus Properties": "parent interrupt specifier"
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*/
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CM_ARCH_COMMON_GENERIC_INTERRUPT IntcInterrupt;
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} CM_ARCH_COMMON_PCI_INTERRUPT_MAP_INFO;
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/** A structure that describes the Memory Affinity Structure (Type 1) in SRAT
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ID: EArchCommonObjMemoryAffinityInfo
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*/
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typedef struct CmArchCommonMemoryAffinityInfo {
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/// The proximity domain to which the "range of memory" belongs.
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UINT32 ProximityDomain;
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/// Base Address
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UINT64 BaseAddress;
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/// Length
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UINT64 Length;
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/// Flags
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UINT32 Flags;
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} CM_ARCH_COMMON_MEMORY_AFFINITY_INFO;
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/** A structure that describes the ACPI Device Handle (Type 0) in the
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Generic Initiator Affinity structure in SRAT
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ID: EArchCommonObjDeviceHandleAcpi
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*/
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typedef struct CmArchCommonDeviceHandleAcpi {
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/// Hardware ID
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UINT64 Hid;
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/// Unique Id
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UINT32 Uid;
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} CM_ARCH_COMMON_DEVICE_HANDLE_ACPI;
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/** A structure that describes the PCI Device Handle (Type 1) in the
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Generic Initiator Affinity structure in SRAT
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ID: EArchCommonObjDeviceHandlePci
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*/
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typedef struct CmArchCommonDeviceHandlePci {
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/// PCI Segment Number
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UINT16 SegmentNumber;
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/// PCI Bus Number - Max 256 busses (Bits 15:8 of BDF)
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UINT8 BusNumber;
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/// PCI Device Number - Max 32 devices (Bits 7:3 of BDF)
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UINT8 DeviceNumber;
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/// PCI Function Number - Max 8 functions (Bits 2:0 of BDF)
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UINT8 FunctionNumber;
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} CM_ARCH_COMMON_DEVICE_HANDLE_PCI;
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#pragma pack()
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#endif // ARCH_COMMON_NAMESPACE_OBJECTS_H_
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