mirror of
https://gitlab.com/qemu-project/edk2.git
synced 2025-06-29 04:33:04 +08:00
38e72aa877
RISC-V cache maintenance implementation. Implement RISC-V cache maintenance functions in BaseCacheMaintenanceLib. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2672 Signed-off-by: Abner Chang <abner.chang@hpe.com> Co-authored-by: Gilbert Chen <gilbert.chen@hpe.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Gilbert Chen <gilbert.chen@hpe.com>
55 lines
1.3 KiB
INI
55 lines
1.3 KiB
INI
## @file
|
|
# Instance of Cache Maintenance Library using Base Library services.
|
|
#
|
|
# Cache Maintenance Library that uses Base Library services to maintain caches.
|
|
# This library assumes there are no chipset dependencies required to maintain caches.
|
|
#
|
|
# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
|
|
# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
|
|
# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
|
|
#
|
|
# SPDX-License-Identifier: BSD-2-Clause-Patent
|
|
#
|
|
#
|
|
##
|
|
|
|
[Defines]
|
|
INF_VERSION = 0x00010005
|
|
BASE_NAME = BaseCacheMaintenanceLib
|
|
MODULE_UNI_FILE = BaseCacheMaintenanceLib.uni
|
|
FILE_GUID = 123dd843-57c9-4158-8418-ce68b3944ce7
|
|
MODULE_TYPE = BASE
|
|
VERSION_STRING = 1.1
|
|
LIBRARY_CLASS = CacheMaintenanceLib
|
|
|
|
|
|
#
|
|
# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64
|
|
#
|
|
|
|
[Sources.IA32]
|
|
X86Cache.c
|
|
|
|
[Sources.X64]
|
|
X86Cache.c
|
|
|
|
[Sources.EBC]
|
|
EbcCache.c
|
|
|
|
[Sources.ARM]
|
|
ArmCache.c
|
|
|
|
[Sources.AARCH64]
|
|
ArmCache.c
|
|
|
|
[Sources.RISCV64]
|
|
RiscVCache.c
|
|
|
|
[Packages]
|
|
MdePkg/MdePkg.dec
|
|
|
|
[LibraryClasses]
|
|
BaseLib
|
|
DebugLib
|
|
|