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Create extra CPU properties required by OpenSolaris kernel.

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Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@siriusit.co.uk>


git-svn-id: svn://coreboot.org/openbios/trunk/openbios-devel@769 f158a5a8-5612-0410-a976-696ce0be7e32
This commit is contained in:
Mark Cave-Ayland
2010-05-02 23:00:21 +00:00
committed by Mark Cave-Ayland
parent c0ee565d88
commit 4cbc339ae7
1 changed files with 78 additions and 0 deletions
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78
arch/sparc64/openbios.c
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@@ -78,6 +78,17 @@ static const struct hwdef hwdefs[] = {
struct cpudef { struct cpudef {
unsigned long iu_version; unsigned long iu_version;
const char *name; const char *name;
unsigned long ecache_associativity;
unsigned long ecache_line_size;
unsigned long ecache_size;
unsigned long num_dtlb_entries;
unsigned long dcache_associativity;
unsigned long dcache_line_size;
unsigned long dcache_size;
unsigned long num_itlb_entries;
unsigned long icache_associativity;
unsigned long icache_line_size;
unsigned long icache_size;
}; };
/* /*
@@ -157,6 +168,61 @@ static void cpu_generic_init(const struct cpudef *cpu, uint32_t clock_frequency)
push_str("clock-frequency"); push_str("clock-frequency");
fword("property"); fword("property");
PUSH(cpu->ecache_associativity);
fword("encode-int");
push_str("ecache-associativity");
fword("property");
PUSH(cpu->ecache_line_size);
fword("encode-int");
push_str("ecache-line-size");
fword("property");
PUSH(cpu->ecache_size);
fword("encode-int");
push_str("ecache-size");
fword("property");
PUSH(cpu->dcache_associativity);
fword("encode-int");
push_str("dcache-associativity");
fword("property");
PUSH(cpu->dcache_line_size);
fword("encode-int");
push_str("dcache-line-size");
fword("property");
PUSH(cpu->dcache_size);
fword("encode-int");
push_str("dcache-size");
fword("property");
PUSH(cpu->icache_associativity);
fword("encode-int");
push_str("icache-associativity");
fword("property");
PUSH(cpu->ecache_line_size);
fword("encode-int");
push_str("icache-line-size");
fword("property");
PUSH(cpu->ecache_size);
fword("encode-int");
push_str("icache-size");
fword("property");
PUSH(cpu->num_itlb_entries);
fword("encode-int");
push_str("#itlb-entries");
fword("property");
PUSH(cpu->num_dtlb_entries);
fword("encode-int");
push_str("#dtlb-entries");
fword("property");
fword("finish-device"); fword("finish-device");
// Trap table // Trap table
@@ -190,14 +256,26 @@ static const struct cpudef sparc_defs[] = {
{ {
.iu_version = (0x17ULL << 48) | (0x10ULL << 32), .iu_version = (0x17ULL << 48) | (0x10ULL << 32),
.name = "SUNW,UltraSPARC", .name = "SUNW,UltraSPARC",
.ecache_associativity = 1, .ecache_line_size = 0x40, .ecache_size = 0x100000,
.dcache_associativity = 1, .dcache_line_size = 0x20, .dcache_size = 0x4000,
.icache_associativity = 2, .icache_line_size = 0x20, .icache_size = 0x4000,
.num_dtlb_entries = 0x40, .num_itlb_entries = 0x40,
}, },
{ {
.iu_version = (0x17ULL << 48) | (0x11ULL << 32), .iu_version = (0x17ULL << 48) | (0x11ULL << 32),
.name = "SUNW,UltraSPARC-II", .name = "SUNW,UltraSPARC-II",
.ecache_associativity = 1, .ecache_line_size = 0x40, .ecache_size = 0x100000,
.dcache_associativity = 1, .dcache_line_size = 0x20, .dcache_size = 0x4000,
.icache_associativity = 2, .icache_line_size = 0x20, .icache_size = 0x4000,
.num_dtlb_entries = 0x40, .num_itlb_entries = 0x40,
}, },
{ {
.iu_version = (0x17ULL << 48) | (0x12ULL << 32), .iu_version = (0x17ULL << 48) | (0x12ULL << 32),
.name = "SUNW,UltraSPARC-IIi", .name = "SUNW,UltraSPARC-IIi",
.ecache_associativity = 1, .ecache_line_size = 0x40, .ecache_size = 0x40000,
.dcache_associativity = 1, .dcache_line_size = 0x20, .dcache_size = 0x4000,
.icache_associativity = 2, .icache_line_size = 0x20, .icache_size = 0x4000,
.num_dtlb_entries = 0x40, .num_itlb_entries = 0x40,
}, },
{ {
.iu_version = (0x17ULL << 48) | (0x13ULL << 32), .iu_version = (0x17ULL << 48) | (0x13ULL << 32),