initial import of openbios--main--1.0--patch-26

git-svn-id: svn://coreboot.org/openbios/openbios-devel@1 f158a5a8-5612-0410-a976-696ce0be7e32

include/x86/elf.h

@@ -0,0 +1,5 @@
+#define ARCH_ELF_CLASS ELFCLASS32
+#define ARCH_ELF_DATA ELFDATA2LSB
+#define ARCH_ELF_MACHINE_OK(x) ((x)==EM_386 || (x)==EM_486)
+typedef Elf32_Ehdr Elf_ehdr;
+typedef Elf32_Phdr Elf_phdr;

include/x86/io.h

@@ -0,0 +1,70 @@
+#ifndef _ASM_IO_H
+#define _ASM_IO_H
+
+extern unsigned long virt_offset;
+
+#define phys_to_virt(phys) ((void *) ((unsigned long) (phys) - virt_offset))
+#define virt_to_phys(virt) ((unsigned long) (virt) + virt_offset)
+
+#define __SLOW_DOWN_IO "outb %%al,$0x80;"
+static inline void slow_down_io(void) 
+{
+	__asm__ __volatile__( 
+		__SLOW_DOWN_IO
+#ifdef REALLY_SLOW_IO
+		__SLOW_DOWN_IO __SLOW_DOWN_IO __SLOW_DOWN_IO
+#endif
+		: : );
+}
+
+#define BUILDIO(bwl,bw,type) \
+static inline void out##bwl(unsigned type value, int port) { \
+	__asm__ __volatile__("out" #bwl " %" #bw "0, %w1" : : "a"(value), "Nd"(port)); \
+} \
+static inline unsigned type in##bwl(int port) { \
+	unsigned type value; \
+	__asm__ __volatile__("in" #bwl " %w1, %" #bw "0" : "=a"(value) : "Nd"(port)); \
+	return value; \
+} \
+static inline void out##bwl##_p(unsigned type value, int port) { \
+	out##bwl(value, port); \
+	slow_down_io(); \
+} \
+static inline unsigned type in##bwl##_p(int port) { \
+	unsigned type value = in##bwl(port); \
+	slow_down_io(); \
+	return value; \
+} \
+static inline void outs##bwl(int port, const void *addr, unsigned long count) { \
+	__asm__ __volatile__("rep; outs" #bwl : "+S"(addr), "+c"(count) : "d"(port)); \
+} \
+static inline void ins##bwl(int port, void *addr, unsigned long count) { \
+	__asm__ __volatile__("rep; ins" #bwl : "+D"(addr), "+c"(count) : "d"(port)); \
+}
+
+#ifndef BOOTSTRAP
+BUILDIO(b,b,char)
+BUILDIO(w,w,short)
+BUILDIO(l,,int)
+#else 
+#ifdef FCOMPILER
+#define inb(reg) ((u8)0xff)
+#define inw(reg) ((u16)0xffff)
+#define inl(reg) ((u32)0xffffffff)
+// #define insw( u32 reg, void *addr, unsigned long count );
+#define outb(reg, val) // nothing
+#define outw(reg, val) // nothing
+#define outl(reg, val) // nothing
+// #define outsw( u32 reg, const void *addr, unsigned long count);
+#else
+extern u8               inb( u32 reg );
+extern u16              inw( u32 reg );
+extern u32              inl( u32 reg );
+extern void             insw( u32 reg, void *addr, unsigned long count );
+extern void             outb( u32 reg, u8 val );
+extern void             outw( u32 reg, u16 val );
+extern void             outl( u32 reg, u32 val );
+extern void             outsw( u32 reg, const void *addr, unsigned long count);
+#endif
+#endif
+#endif

include/x86/pci.h

@@ -0,0 +1,66 @@
+#ifndef i386_PCI_H
+#define i386_PCI_H
+
+#include "asm/io.h"
+
+#if !(PCI_CONFIG_1 || PCI_CONFIG_2)
+#define PCI_CONFIG_1 1 /* default */
+#endif
+
+#ifdef PCI_CONFIG_1
+
+/* PCI Configuration Mechanism #1 */
+
+/* Have pci_addr in the same format as the values written to 0xcf8
+ * so register accesses can be made easy. */
+#define PCI_ADDR(bus, dev, fn) \
+    ((pci_addr) (0x80000000u \
+		| (uint32_t) (bus) << 16 \
+		| (uint32_t) (dev) << 11 \
+		| (uint32_t) (fn) << 8))
+
+#define PCI_BUS(pcidev) ((uint8_t) ((pcidev) >> 16))
+#define PCI_DEV(pcidev) ((uint8_t) ((pcidev) >> 11) & 0x1f)
+#define PCI_FN(pcidev) ((uint8_t) ((pcidev) >> 8) & 7)
+
+static inline uint8_t pci_config_read8(pci_addr dev, uint8_t reg)
+{
+    outl(dev | (reg & ~3), 0xcf8);
+    return inb(0xcfc | (reg & 3));
+}
+
+static inline uint16_t pci_config_read16(pci_addr dev, uint8_t reg)
+{
+    outl(dev | (reg & ~3), 0xcf8);
+    return inw(0xcfc | (reg & 2));
+}
+
+static inline uint32_t pci_config_read32(pci_addr dev, uint8_t reg)
+{
+    outl(dev | reg, 0xcf8);
+    return inl(0xcfc | reg);
+}
+
+static inline void pci_config_write8(pci_addr dev, uint8_t reg, uint8_t val)
+{
+    outl(dev | (reg & ~3), 0xcf8);
+    outb(val, 0xcfc | (reg & 3));
+}
+
+static inline void pci_config_write16(pci_addr dev, uint8_t reg, uint16_t val)
+{
+    outl(dev | (reg & ~3), 0xcf8);
+    outw(val, 0xcfc | (reg & 2));
+}
+
+static inline void pci_config_write32(pci_addr dev, uint8_t reg, uint32_t val)
+{
+    outl(dev | reg, 0xcf8);
+    outl(val, 0xcfc);
+}
+
+#else /* !PCI_CONFIG_1 */
+#error PCI Configuration Mechanism is not specified or implemented
+#endif
+
+#endif /* i386_PCI_H */

include/x86/types.h

@@ -0,0 +1,44 @@
+/* tag: data types for forth engine
+ *
+ * This file is autogenerated by types.sh. Do not edit!
+ *
+ * Copyright (C) 2003-2005 Stefan Reinauer, Patrick Mauritz
+ *
+ * See the file "COPYING" for further information about
+ * the copyright and warranty status of this work.
+ */
+
+#ifndef __TYPES_H
+#define __TYPES_H
+
+#include <stdint.h>
+
+/* endianess */
+
+#include "autoconf.h"
+
+/* cell based types */
+
+typedef int32_t		cell;
+typedef uint32_t	ucell;
+typedef int64_t		dcell;
+typedef uint64_t	ducell;
+
+#define bitspercell	(sizeof(cell)<<3)
+#define bitsperdcell	(sizeof(dcell)<<3)
+
+#define BITS		32
+
+/* size named types */
+
+typedef unsigned char   u8;
+typedef unsigned short u16;
+typedef unsigned int   u32;
+typedef unsigned long long u64;
+
+typedef char  		s8;
+typedef short		s16;
+typedef int		s32;
+typedef long long	s64;
+
+#endif