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Use firmware configuration instead of NVRAM (initial patch by Aurelien Jarno)

Browse Source 
Use firmware configuration device for boot device, kernel, initrd and
kernel command line parameters on PPC, Sparc32 and Sparc64.


git-svn-id: svn://coreboot.org/openbios/trunk/openbios-devel@479 f158a5a8-5612-0410-a976-696ce0be7e32
This commit is contained in:
Blue Swirl
2009-03-08 09:45:25 +00:00
parent b73bf5229a
commit b098842b5b
4 changed files with 45 additions and 265 deletions
Download Patch File Download Diff File Expand all files Collapse all files

47
arch/ppc/qemu/main.c
View File

@@ -22,6 +22,8 @@
#include "libc/vsprintf.h" #include "libc/vsprintf.h"
#include "kernel.h" #include "kernel.h"
#include "ofmem.h" #include "ofmem.h"
#define NO_QEMU_PROTOS
#include "openbios/fw_cfg.h"
//#define DEBUG_ELF //#define DEBUG_ELF
@@ -319,24 +321,6 @@ try_bootinfo(const char *path, const char *param)
close_io( fd ); close_io( fd );
} }
static uint8_t nvram_read(uint16_t offset)
{
outb(offset & 0xff, NVRAM_ADDR_LO);
outb(offset >> 8, NVRAM_ADDR_HI);
return inb(NVRAM_DATA);
}
static uint32_t nvram_read_be32(uint16_t offset)
{
uint32_t ret;
ret = nvram_read(offset) << 24;
ret |= nvram_read(offset + 1) << 16;
ret |= nvram_read(offset + 2) << 8;
ret |= nvram_read(offset + 3);
return ret;
}
#define QUIK_SECOND_BASEADDR 0x3e0000 #define QUIK_SECOND_BASEADDR 0x3e0000
#define QUIK_FIRST_BASEADDR 0x3f4000 #define QUIK_FIRST_BASEADDR 0x3f4000
#define QUIK_SECOND_SIZE (QUIK_FIRST_BASEADDR - QUIK_SECOND_BASEADDR) #define QUIK_SECOND_SIZE (QUIK_FIRST_BASEADDR - QUIK_SECOND_BASEADDR)
@@ -446,8 +430,7 @@ yaboot_startup( void )
try_path(path, param); try_path(path, param);
try_bootinfo(path, param); try_bootinfo(path, param);
} else { } else {
char boot_device = nvram_read(0x34); uint16_t boot_device = fw_cfg_read_i16(FW_CFG_BOOT_DEVICE);
switch (boot_device) { switch (boot_device) {
case 'c': case 'c':
path = strdup("hd:0"); path = strdup("hd:0");
@@ -474,21 +457,22 @@ static void check_preloaded_kernel(void)
{ {
unsigned long kernel_image, kernel_size; unsigned long kernel_image, kernel_size;
unsigned long initrd_image, initrd_size; unsigned long initrd_image, initrd_size;
unsigned long cmdline, cmdline_len; const char * kernel_cmdline;
kernel_size = nvram_read_be32(0x3c); kernel_size = fw_cfg_read_i32(FW_CFG_KERNEL_SIZE);
if (kernel_size) { if (kernel_size) {
kernel_image = nvram_read_be32(0x38); kernel_image = fw_cfg_read_i32(FW_CFG_KERNEL_ADDR);
cmdline = nvram_read_be32(0x40); kernel_cmdline = (const char *) fw_cfg_read_i32(FW_CFG_KERNEL_CMDLINE);
cmdline_len = nvram_read_be32(0x44); initrd_image = fw_cfg_read_i32(FW_CFG_INITRD_ADDR);
initrd_image = nvram_read_be32(0x48); initrd_size = fw_cfg_read_i32(FW_CFG_INITRD_SIZE);
initrd_size = nvram_read_be32(0x4c);
printk("[ppc] Kernel already loaded (0x%8.8lx + 0x%8.8lx) " printk("[ppc] Kernel already loaded (0x%8.8lx + 0x%8.8lx) "
"(initrd 0x%8.8lx + 0x%8.8lx)\n", "(initrd 0x%8.8lx + 0x%8.8lx)\n",
kernel_image, kernel_size, initrd_image, initrd_size); kernel_image, kernel_size, initrd_image, initrd_size);
if (cmdline_len > 0) { if (kernel_cmdline) {
phandle_t ph = find_dev("/chosen"); phandle_t ph;
set_property(ph, "bootargs", strdup((char *)cmdline), cmdline_len + 1); printk("[ppc] Kernel command line: %s\n", kernel_cmdline);
ph = find_dev("/chosen");
set_property(ph, "bootargs", strdup(kernel_cmdline), strlen(kernel_cmdline) + 1);
} }
call_elf(initrd_image, initrd_size, kernel_image); call_elf(initrd_image, initrd_size, kernel_image);
} }
@@ -501,7 +485,8 @@ static void check_preloaded_kernel(void)
void void
boot( void ) boot( void )
{ {
char boot_device = nvram_read(0x34); uint16_t boot_device = fw_cfg_read_i16(FW_CFG_BOOT_DEVICE);
fword("update-chosen"); fword("update-chosen");
if (boot_device == 'm') { if (boot_device == 'm') {
check_preloaded_kernel(); check_preloaded_kernel();

32
arch/sparc64/openbios.c
View File

@@ -15,9 +15,6 @@
#include "openbios.h" #include "openbios.h"
#include "openbios/pci.h" #include "openbios/pci.h"
#include "asm/pci.h" #include "asm/pci.h"
#include "libc/byteorder.h"
#define cpu_to_be16(x) __cpu_to_be16(x)
#include "openbios/firmware_abi.h"
#include "boot.h" #include "boot.h"
#include "../../drivers/timer.h" // XXX #include "../../drivers/timer.h" // XXX
#define NO_QEMU_PROTOS #define NO_QEMU_PROTOS
@@ -42,11 +39,9 @@ static ucell *memory;
#define NVRAM_SIZE 0x2000 #define NVRAM_SIZE 0x2000
#define NVRAM_IDPROM 0x1fd8 #define NVRAM_IDPROM 0x1fd8
#define NVRAM_IDPROM_SIZE 32 #define NVRAM_IDPROM_SIZE 32
#define NVRAM_OB_START (sizeof(ohwcfg_v3_t) + sizeof(struct sparc_arch_cfg)) #define NVRAM_OB_START (0)
#define NVRAM_OB_SIZE ((0x1fd0 - NVRAM_OB_START) & ~15) #define NVRAM_OB_SIZE ((0x1fd0 - NVRAM_OB_START) & ~15)
static ohwcfg_v3_t nv_info;
#define OBIO_CMDLINE_MAX 256 #define OBIO_CMDLINE_MAX 256
static char obio_cmdline[OBIO_CMDLINE_MAX]; static char obio_cmdline[OBIO_CMDLINE_MAX];
@@ -275,7 +270,7 @@ static uint8_t qemu_uuid[16];
void arch_nvram_get(char *data) void arch_nvram_get(char *data)
{ {
uint32_t size; uint32_t size = 0;
const struct cpudef *cpu; const struct cpudef *cpu;
const char *bootpath; const char *bootpath;
char buf[256]; char buf[256];
@@ -284,8 +279,7 @@ void arch_nvram_get(char *data)
uint32_t clock_frequency; uint32_t clock_frequency;
uint16_t machine_id; uint16_t machine_id;
const char *stdin_path, *stdout_path; const char *stdin_path, *stdout_path;
const char *kernel_cmdline;
nvram_read(0, (char *)&nv_info, sizeof(ohwcfg_v3_t));
fw_cfg_init(); fw_cfg_init();
@@ -304,16 +298,20 @@ void arch_nvram_get(char *data)
for(;;); for(;;);
} }
kernel_image = nv_info.kernel_image; kernel_size = fw_cfg_read_i32(FW_CFG_KERNEL_SIZE);
kernel_size = nv_info.kernel_size; if (kernel_size)
size = nv_info.cmdline_size; kernel_image = fw_cfg_read_i64(FW_CFG_KERNEL_ADDR);
if (size > OBIO_CMDLINE_MAX - 1) kernel_cmdline = (const char *) fw_cfg_read_i64(FW_CFG_KERNEL_CMDLINE);
size = OBIO_CMDLINE_MAX - 1; if (kernel_cmdline) {
memcpy(&obio_cmdline, (void *)(long)nv_info.cmdline, size); size = strlen(kernel_cmdline);
if (size > OBIO_CMDLINE_MAX - 1)
size = OBIO_CMDLINE_MAX - 1;
memcpy(&obio_cmdline, kernel_cmdline, size);
}
obio_cmdline[size] = '\0'; obio_cmdline[size] = '\0';
qemu_cmdline = (uint64_t)obio_cmdline; qemu_cmdline = (uint64_t)obio_cmdline;
cmdline_size = size; cmdline_size = size;
boot_device = nv_info.boot_devices[0]; boot_device = fw_cfg_read_i16(FW_CFG_BOOT_DEVICE);
if (kernel_size) if (kernel_size)
printk("kernel addr %llx size %llx\n", kernel_image, kernel_size); printk("kernel addr %llx size %llx\n", kernel_image, kernel_size);
@@ -372,7 +370,7 @@ void arch_nvram_get(char *data)
push_str("/chosen"); push_str("/chosen");
fword("find-device"); fword("find-device");
if (nv_info.boot_devices[0] == 'c') if (boot_device == 'c')
bootpath = "disk:a"; bootpath = "disk:a";
else else
bootpath = "cdrom:a"; bootpath = "cdrom:a";

33
drivers/obio.c
View File

@@ -20,8 +20,6 @@
#include "openbios/nvram.h" #include "openbios/nvram.h"
#include "ofmem.h" #include "ofmem.h"
#include "obio.h" #include "obio.h"
#define cpu_to_be16(x) __cpu_to_be16(x)
#include "openbios/firmware_abi.h"
#define NO_QEMU_PROTOS #define NO_QEMU_PROTOS
#include "openbios/fw_cfg.h" #include "openbios/fw_cfg.h"
#include "escc.h" #include "escc.h"
@@ -157,9 +155,8 @@ ob_eccmemctl_init(uint64_t base)
} }
static unsigned char *nvram; static unsigned char *nvram;
static ohwcfg_v3_t nv_info;
#define NVRAM_OB_START (sizeof(ohwcfg_v3_t) + sizeof(struct sparc_arch_cfg)) #define NVRAM_OB_START (0)
#define NVRAM_OB_SIZE ((NVRAM_IDPROM - NVRAM_OB_START) & ~15) #define NVRAM_OB_SIZE ((NVRAM_IDPROM - NVRAM_OB_START) & ~15)
void void
@@ -654,14 +651,14 @@ ob_nvram_init(uint64_t base, uint64_t offset)
const char *stdin, *stdout; const char *stdin, *stdout;
unsigned int i; unsigned int i;
char nographic; char nographic;
uint32_t size; uint32_t size = 0;
uint16_t machine_id; uint16_t machine_id;
const struct cpudef *cpu; const struct cpudef *cpu;
const struct machdef *mach; const struct machdef *mach;
ohwcfg_v3_t *header;
char buf[256]; char buf[256];
uint32_t temp; uint32_t temp;
phandle_t chosen; phandle_t chosen;
const char *kernel_cmdline;
ob_new_obio_device("eeprom", NULL); ob_new_obio_device("eeprom", NULL);
@@ -694,23 +691,21 @@ ob_nvram_init(uint64_t base, uint64_t offset)
for(;;); for(;;);
} }
memcpy(&nv_info, nvram, sizeof(nv_info)); kernel_size = fw_cfg_read_i32(FW_CFG_KERNEL_SIZE);
kernel_image = nv_info.kernel_image; if (kernel_size)
kernel_size = nv_info.kernel_size; kernel_image = fw_cfg_read_i32(FW_CFG_KERNEL_ADDR);
size = nv_info.cmdline_size; kernel_cmdline = (const char *) fw_cfg_read_i32(FW_CFG_KERNEL_CMDLINE);
if (size > OBIO_CMDLINE_MAX - 1) if (kernel_cmdline) {
size = OBIO_CMDLINE_MAX - 1; size = strlen(kernel_cmdline);
memcpy(&obio_cmdline, (void *)(long)nv_info.cmdline, size); if (size > OBIO_CMDLINE_MAX - 1)
size = OBIO_CMDLINE_MAX - 1;
memcpy(&obio_cmdline, kernel_cmdline, size);
}
obio_cmdline[size] = '\0'; obio_cmdline[size] = '\0';
qemu_cmdline = (uint32_t) &obio_cmdline; qemu_cmdline = (uint32_t) &obio_cmdline;
cmdline_size = size; cmdline_size = size;
header = (ohwcfg_v3_t *)nvram; boot_device = fw_cfg_read_i16(FW_CFG_BOOT_DEVICE);
header->kernel_image = 0;
header->kernel_size = 0;
header->cmdline_size = 0;
header->crc = OHW_compute_crc(header, 0x00, 0xF8);
boot_device = nv_info.boot_devices[0];
fw_cfg_read(FW_CFG_NOGRAPHIC, &nographic, 1); fw_cfg_read(FW_CFG_NOGRAPHIC, &nographic, 1);
graphic_depth = fw_cfg_read_i16(FW_CFG_SUN4M_DEPTH); graphic_depth = fw_cfg_read_i16(FW_CFG_SUN4M_DEPTH);

198
include/openbios/firmware_abi.h
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@@ -1,198 +0,0 @@
#ifndef FIRMWARE_ABI_H
#define FIRMWARE_ABI_H
#ifndef __ASSEMBLY__
/* Open Hack'Ware NVRAM configuration structure */
/* Version 3 */
typedef struct ohwcfg_v3_t ohwcfg_v3_t;
struct ohwcfg_v3_t {
/* 0x00: structure identifier */
uint8_t struct_ident[0x10];
/* 0x10: structure version and NVRAM description */
uint32_t struct_version;
uint16_t nvram_size;
uint16_t pad0;
uint16_t nvram_arch_ptr;
uint16_t nvram_arch_size;
uint16_t nvram_arch_crc;
uint8_t pad1[0x02];
/* 0x20: host architecture */
uint8_t arch[0x10];
/* 0x30: RAM/ROM description */
uint64_t RAM0_base;
uint64_t RAM0_size;
uint64_t RAM1_base;
uint64_t RAM1_size;
uint64_t RAM2_base;
uint64_t RAM2_size;
uint64_t RAM3_base;
uint64_t RAM3_size;
uint64_t ROM_base;
uint64_t ROM_size;
/* 0x80: Kernel description */
uint64_t kernel_image;
uint64_t kernel_size;
/* 0x90: Kernel command line */
uint64_t cmdline;
uint64_t cmdline_size;
/* 0xA0: Kernel boot image */
uint64_t initrd_image;
uint64_t initrd_size;
/* 0xB0: NVRAM image */
uint64_t NVRAM_image;
uint8_t pad2[8];
/* 0xC0: graphic configuration */
uint16_t width;
uint16_t height;
uint16_t depth;
uint16_t graphic_flags;
/* 0xC8: CPUs description */
uint8_t nb_cpus;
uint8_t boot_cpu;
uint8_t nboot_devices;
uint8_t pad3[5];
/* 0xD0: boot devices */
uint8_t boot_devices[0x10];
/* 0xE0 */
uint8_t pad4[0x1C]; /* 28 */
/* 0xFC: checksum */
uint16_t crc;
uint8_t pad5[0x02];
} __attribute__ (( packed ));
#define OHW_GF_NOGRAPHICS 0x0001
static inline uint16_t
OHW_crc_update (uint16_t prev, uint16_t value)
{
uint16_t tmp;
uint16_t pd, pd1, pd2;
tmp = prev >> 8;
pd = prev ^ value;
pd1 = pd & 0x000F;
pd2 = ((pd >> 4) & 0x000F) ^ pd1;
tmp ^= (pd1 << 3) | (pd1 << 8);
tmp ^= pd2 | (pd2 << 7) | (pd2 << 12);
return tmp;
}
static inline uint16_t
OHW_compute_crc (ohwcfg_v3_t *header, uint32_t start, uint32_t count)
{
uint32_t i;
uint16_t crc = 0xFFFF;
uint8_t *ptr = (uint8_t *)header;
int odd;
odd = count & 1;
count &= ~1;
for (i = 0; i != count; i++) {
crc = OHW_crc_update(crc, (ptr[start + i] << 8) | ptr[start + i + 1]);
}
if (odd) {
crc = OHW_crc_update(crc, ptr[start + i] << 8);
}
return crc;
}
/* Sparc32 runtime NVRAM structure for SMP CPU boot */
struct sparc_arch_cfg {
uint32_t smp_ctx;
uint32_t smp_ctxtbl;
uint32_t smp_entry;
uint8_t valid;
uint8_t unused[51];
};
/* OpenBIOS NVRAM partition */
struct OpenBIOS_nvpart_v1 {
uint8_t signature;
uint8_t checksum;
uint16_t len; // BE, length divided by 16
char name[12];
};
#define OPENBIOS_PART_SYSTEM 0x70
#define OPENBIOS_PART_FREE 0x7f
static inline void
OpenBIOS_finish_partition(struct OpenBIOS_nvpart_v1 *header, uint32_t size)
{
unsigned int i, sum;
uint8_t *tmpptr;
// Length divided by 16
header->len = cpu_to_be16(size >> 4);
// Checksum
tmpptr = (uint8_t *)header;
sum = *tmpptr;
for (i = 0; i < 14; i++) {
sum += tmpptr[2 + i];
sum = (sum + ((sum & 0xff00) >> 8)) & 0xff;
}
header->checksum = sum & 0xff;
}
static inline uint32_t
OpenBIOS_set_var(uint8_t *nvram, uint32_t addr, const char *str)
{
uint32_t len;
len = strlen(str) + 1;
memcpy(&nvram[addr], str, len);
return addr + len;
}
/* Sun IDPROM structure at the end of NVRAM */
struct Sun_nvram {
uint8_t type;
uint8_t machine_id;
uint8_t macaddr[6];
uint8_t unused[7];
uint8_t checksum;
};
static inline void
Sun_init_header(struct Sun_nvram *header, const uint8_t *macaddr, int machine_id)
{
uint8_t tmp, *tmpptr;
unsigned int i;
header->type = 1;
header->machine_id = machine_id & 0xff;
memcpy(&header->macaddr, macaddr, 6);
/* Calculate checksum */
tmp = 0;
tmpptr = (uint8_t *)header;
for (i = 0; i < 15; i++)
tmp ^= tmpptr[i];
header->checksum = tmp;
}
#else /* __ASSEMBLY__ */
/* Structure offsets for asm use */
/* Open Hack'Ware NVRAM configuration structure */
#define OHW_ARCH_PTR 0x18
#define OHW_RAM_SIZE 0x38
#define OHW_BOOT_CPU 0xC9
/* Sparc32 runtime NVRAM structure for SMP CPU boot */
#define SPARC_SMP_CTX 0x0
#define SPARC_SMP_CTXTBL 0x4
#define SPARC_SMP_ENTRY 0x8
#define SPARC_SMP_VALID 0xc
/* Sun IDPROM structure at the end of NVRAM */
#define SPARC_MACHINE_ID 0x1fd9
#endif /* __ASSEMBLY__ */
#endif /* FIRMWARE_ABI_H */