Save locked tlb space by aligning to 512k pages.

Signed-off-by: igor.v.kovalenko@gmail.com
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>

git-svn-id: svn://coreboot.org/openbios/trunk/openbios-devel@562 f158a5a8-5612-0410-a976-696ce0be7e32
This commit is contained in:
igor.v.kovalenko
2009-08-21 19:15:46 +00:00
committed by Blue Swirl
parent e56cc95fb0
commit b26b3c4391
2 changed files with 21 additions and 19 deletions

View File

@@ -131,7 +131,7 @@ entry:
! %g1 contains end of memory ! %g1 contains end of memory
setx _end, %g7, %g3 setx _end, %g7, %g3
set 0xffff, %g2 set 0x7ffff, %g2
add %g3, %g2, %g3 add %g3, %g2, %g3
andn %g3, %g2, %g3 andn %g3, %g2, %g3
setx _data, %g7, %g2 setx _data, %g7, %g2
@@ -142,17 +142,17 @@ entry:
! setup .data & .bss ! setup .data & .bss
setx _data, %g7, %g4 setx _data, %g7, %g4
sub %g3, %g4, %g5 sub %g3, %g4, %g5
srlx %g5, 16, %g6 ! %g6 = # of 64k .bss pages srlx %g5, 19, %g6 ! %g6 = # of 512k .bss pages
set 0xa0000000, %g3 set 0xc0000000, %g3
sllx %g3, 32, %g3 sllx %g3, 32, %g3
or %g3, 0x76, %g3 or %g3, 0x76, %g3
! valid, 64k, locked, cacheable(I/E/C), priv, writable ! valid, 512k, locked, cacheable(I/E/C), priv, writable
set 48, %g7 set 48, %g7
1: stxa %g4, [%g7] ASI_DMMU ! vaddr = _data + N * 0x10000, ctx=0 1: stxa %g4, [%g7] ASI_DMMU ! vaddr = _data + N * 0x80000, ctx=0
or %g2, %g3, %g5 or %g2, %g3, %g5
! paddr = start_mem + N * 0x10000 ! paddr = start_mem + N * 0x80000
stxa %g5, [%g0] ASI_DTLB_DATA_IN stxa %g5, [%g0] ASI_DTLB_DATA_IN
set 0x10000, %g5 set 0x80000, %g5
add %g2, %g5, %g2 add %g2, %g5, %g2
add %g4, %g5, %g4 add %g4, %g5, %g4
deccc %g6 deccc %g6
@@ -163,16 +163,16 @@ entry:
setx _data, %g7, %g5 setx _data, %g7, %g5
setx _start, %g7, %g4 setx _start, %g7, %g4
sub %g5, %g4, %g5 sub %g5, %g4, %g5
srlx %g5, 16, %g6 ! %g6 = # of 64k .rodata pages srlx %g5, 19, %g6 ! %g6 = # of 512k .rodata pages
set 48, %g7 set 48, %g7
set 0x10000, %g5 set 0x80000, %g5
setx PROM_ADDR, %l1, %l2 setx PROM_ADDR, %l1, %l2
1: stxa %g4, [%g7] ASI_DMMU ! vaddr = _rodata, ctx=0 1: stxa %g4, [%g7] ASI_DMMU ! vaddr = _rodata, ctx=0
set 0xa0000000, %g3 set 0xc0000000, %g3
sllx %g3, 32, %g3 sllx %g3, 32, %g3
or %g3, 0x74, %g3 or %g3, 0x74, %g3
or %l2, %g3, %g3 or %l2, %g3, %g3
! valid, 64k, locked, cacheable(I/E/C), priv ! valid, 512k, locked, cacheable(I/E/C), priv
! paddr = _rodata + N * 0x10000 ! paddr = _rodata + N * 0x10000
stxa %g3, [%g0] ASI_DTLB_DATA_IN stxa %g3, [%g0] ASI_DTLB_DATA_IN
add %g4, %g5, %g4 add %g4, %g5, %g4
@@ -223,17 +223,19 @@ entry:
setx _start, %g7, %g4 setx _start, %g7, %g4
setx _rodata, %g7, %g5 setx _rodata, %g7, %g5
sub %g5, %g4, %g5 sub %g5, %g4, %g5
srlx %g5, 16, %g6 ! %g6 = # of 64k .text pages set 0x7ffff, %g7
set 0x10000, %g5 add %g5, %g7, %g5 ! round to 512k
srlx %g5, 19, %g6 ! %g6 = # of 512k .text pages
set 0x80000, %g5
set 48, %g7 set 48, %g7
setx PROM_ADDR, %l1, %l2 setx PROM_ADDR, %l1, %l2
1: stxa %g4, [%g7] ASI_IMMU ! vaddr = _start, ctx=0 1: stxa %g4, [%g7] ASI_IMMU ! vaddr = _start, ctx=0
set 0xa0000000, %g3 set 0xc0000000, %g3
sllx %g3, 32, %g3 sllx %g3, 32, %g3
or %g3, 0x74, %g3 or %g3, 0x74, %g3
or %l2, %g3, %g3 or %l2, %g3, %g3
! valid, 64k, locked, cacheable(I/E/C), priv ! valid, 512k, locked, cacheable(I/E/C), priv
! paddr = _start + N * 0x10000 ! paddr = _start + N * 0x80000
stxa %g3, [%g0] ASI_ITLB_DATA_IN stxa %g3, [%g0] ASI_ITLB_DATA_IN
add %g4, %g5, %g4 add %g4, %g5, %g4
deccc %g6 deccc %g6

View File

@@ -25,12 +25,12 @@ SECTIONS
_start = .; _start = .;
/* Normal sections */ /* Normal sections */
.text ALIGN(65536): { .text ALIGN(524288): {
*(.text.vectors) *(.text.vectors)
*(.text) *(.text)
*(.text.*) *(.text.*)
} }
.rodata ALIGN(65536): { .rodata ALIGN(524288): {
_rodata = .; _rodata = .;
sound_drivers_start = .; sound_drivers_start = .;
*(.rodata.sound_drivers) *(.rodata.sound_drivers)
@@ -39,7 +39,7 @@ SECTIONS
*(.rodata.*) *(.rodata.*)
*(.note.ELFBoot) *(.note.ELFBoot)
} }
.data ALIGN(65536): { .data ALIGN(524288): {
_data = .; _data = .;
*(.data) *(.data)
*(.data.*) *(.data.*)