From c6040cb8a04df33defa0c95da2c6eeaaf149aa4b Mon Sep 17 00:00:00 2001 From: Blue Swirl Date: Sun, 8 Feb 2009 12:22:04 +0000 Subject: [PATCH] Add basic Mac99 machine support git-svn-id: svn://coreboot.org/openbios/openbios-devel@449 f158a5a8-5612-0410-a976-696ce0be7e32 --- arch/ppc/qemu/init.c | 4 +- arch/ppc/qemu/ldscript | 2 +- drivers/macio.c | 101 +++++++++++++++++++++++++++++++++++++---- drivers/macio.h | 3 +- drivers/pci.c | 14 +++++- drivers/pci_database.c | 8 ++-- drivers/pci_database.h | 3 +- 7 files changed, 115 insertions(+), 20 deletions(-) diff --git a/arch/ppc/qemu/init.c b/arch/ppc/qemu/init.c index 984771d..3433696 100644 --- a/arch/ppc/qemu/init.c +++ b/arch/ppc/qemu/init.c @@ -462,12 +462,12 @@ arch_of_init( void ) /* model */ - push_str("PowerMac1,1"); + push_str("PowerMac2,1"); fword("model"); /* compatible */ - push_str("PowerMac1,1"); + push_str("PowerMac2,1"); fword("encode-string"); push_str("MacRISC"); fword("encode-string"); diff --git a/arch/ppc/qemu/ldscript b/arch/ppc/qemu/ldscript index 6bf815f..66fcbcd 100644 --- a/arch/ppc/qemu/ldscript +++ b/arch/ppc/qemu/ldscript @@ -7,7 +7,7 @@ BASE_ADDR = 0xfff00000; /* As NVRAM is at 0xfff04000, the .text needs to be after that */ -TEXT_ADDR = 0xfff06000; +TEXT_ADDR = 0xfff08000; /* Hard reset vector address */ diff --git a/drivers/macio.c b/drivers/macio.c index 4c1a54f..e150a18 100644 --- a/drivers/macio.c +++ b/drivers/macio.c @@ -19,15 +19,26 @@ #include "cuda.h" #include "escc.h" -#define IO_NVRAM_SIZE 0x00020000 -#define IO_NVRAM_OFFSET 0x00060000 +#define OW_IO_NVRAM_SIZE 0x00020000 +#define OW_IO_NVRAM_OFFSET 0x00060000 +#define OW_IO_NVRAM_SHIFT 4 + +#define NW_IO_NVRAM_SIZE 0x00004000 +#define NW_IO_NVRAM_OFFSET 0xfff04000 +#define NW_IO_NVRAM_SHIFT 1 + +#define IO_OPENPIC_SIZE 0x00040000 +#define IO_OPENPIC_OFFSET 0x00040000 static char *nvram; int arch_nvram_size( void ) { - return IO_NVRAM_SIZE>>4; + if (is_oldworld()) + return OW_IO_NVRAM_SIZE >> OW_IO_NVRAM_SHIFT; + else + return NW_IO_NVRAM_SIZE >> NW_IO_NVRAM_SHIFT; } void macio_nvram_init(const char *path, uint32_t addr) @@ -36,14 +47,28 @@ void macio_nvram_init(const char *path, uint32_t addr) phandle_t dnode; int props[2]; char buf[64]; + unsigned long nvram_size, nvram_offset; - nvram = (char*)addr + IO_NVRAM_OFFSET; + if (is_oldworld()) { + nvram_offset = OW_IO_NVRAM_OFFSET; + nvram_size = OW_IO_NVRAM_SIZE; + } else { + nvram_offset = NW_IO_NVRAM_OFFSET; + nvram_size = NW_IO_NVRAM_SIZE; + push_str("/"); + fword("find-device"); + fword("new-device"); + push_str("nvram"); + fword("device-name"); + fword("finish-device"); + } + nvram = (char*)addr + nvram_offset; snprintf(buf, sizeof(buf), "%s/nvram", path); nvram_init(buf); dnode = find_dev(buf); set_int_property(dnode, "#bytes", arch_nvram_size() ); - props[0] = __cpu_to_be32(IO_NVRAM_OFFSET); - props[1] = __cpu_to_be32(IO_NVRAM_SIZE); + props[0] = __cpu_to_be32(nvram_offset); + props[1] = __cpu_to_be32(nvram_size); set_property(dnode, "reg", (char *)&props, sizeof(props)); set_property(dnode, "device_type", "nvram", 6); @@ -81,8 +106,15 @@ void arch_nvram_put( char *buf ) { int i; + unsigned int it_shift; + + if (is_oldworld()) + it_shift = OW_IO_NVRAM_SHIFT; + else + it_shift = NW_IO_NVRAM_SHIFT; + for (i=0; i< arch_nvram_size() ; i++) - nvram[i<<4]=buf[i]; + nvram[i << it_shift] = buf[i]; #ifdef DUMP_NVRAM printk("new nvram:\n"); dump_nvram(); @@ -93,8 +125,15 @@ void arch_nvram_get( char *buf ) { int i; + unsigned int it_shift; + + if (is_oldworld()) + it_shift = OW_IO_NVRAM_SHIFT; + else + it_shift = NW_IO_NVRAM_SHIFT; + for (i=0; i< arch_nvram_size(); i++) - buf[i]=nvram[i<<4]; + buf[i] = nvram[i << it_shift]; #ifdef DUMP_NVRAM printk("current nvram:\n"); @@ -102,8 +141,36 @@ arch_nvram_get( char *buf ) #endif } +static void +openpic_init(const char *path, uint32_t addr) +{ + phandle_t dnode; + int props[2]; + char buf[128]; + + push_str(path); + fword("find-device"); + fword("new-device"); + push_str("interrupt-controller"); + fword("device-name"); + fword("finish-device"); + + snprintf(buf, sizeof(buf), "%s/interrupt-controller", path); + dnode = find_dev(buf); + set_property(dnode, "device_type", "open-pic", 9); + set_property(dnode, "compatible", "chrp,open-pic", 14); + set_property(dnode, "built-in", "", 0); + props[0] = __cpu_to_be32(IO_OPENPIC_OFFSET); + props[1] = __cpu_to_be32(IO_OPENPIC_SIZE); + set_property(dnode, "reg", (char *)&props, sizeof(props)); + set_int_property(dnode, "#interrupt-cells", 2); + set_int_property(dnode, "#address-cells", 0); + set_property(dnode, "interrupt-controller", "", 0); + set_int_property(dnode, "clock-frequency", 4166666); +} + void -ob_macio_init(const char *path, uint32_t addr) +ob_macio_heathrow_init(const char *path, uint32_t addr) { phandle_t aliases; @@ -115,3 +182,19 @@ ob_macio_init(const char *path, uint32_t addr) escc_init(path, addr); macio_ide_init(path, addr, 1); } + +void +ob_macio_keylargo_init(const char *path, uint32_t addr) +{ + phandle_t aliases; + + aliases = find_dev("/aliases"); + set_property(aliases, "mac-io", path, strlen(path) + 1); + + cuda_init(path, addr); + /* The NewWorld NVRAM is not located in the MacIO device */ + macio_nvram_init("", 0); + escc_init(path, addr); + macio_ide_init(path, addr, 3); + openpic_init(path, addr); +} diff --git a/drivers/macio.h b/drivers/macio.h index c974444..d580387 100644 --- a/drivers/macio.h +++ b/drivers/macio.h @@ -1,4 +1,5 @@ extern phandle_t pic_handle; -void ob_macio_init(const char *path, uint32_t addr); +void ob_macio_heathrow_init(const char *path, uint32_t addr); +void ob_macio_keylargo_init(const char *path, uint32_t addr); void macio_nvram_init(const char *path, uint32_t addr); diff --git a/drivers/pci.c b/drivers/pci.c index dfc779d..80d78df 100644 --- a/drivers/pci.c +++ b/drivers/pci.c @@ -419,16 +419,26 @@ static void pci_set_ranges(const pci_config_t *config) set_property(dev, "ranges", (char *)props, ncells * sizeof(cell)); } -int macio_config_cb (const pci_config_t *config) +int macio_heathrow_config_cb (const pci_config_t *config) { pci_set_ranges(config); #ifdef CONFIG_DRIVER_MACIO - ob_macio_init(config->path, config->assigned[0] & ~0x0000000F); + ob_macio_heathrow_init(config->path, config->assigned[0] & ~0x0000000F); #endif return 0; } +int macio_keylargo_config_cb (const pci_config_t *config) +{ + pci_set_ranges(config); + +#ifdef CONFIG_DRIVER_MACIO + ob_macio_keylargo_init(config->path, config->assigned[0] & ~0x0000000F); +#endif + return 0; +} + int vga_config_cb (const pci_config_t *config) { if (config->assigned[0] != 0x00000000) diff --git a/drivers/pci_database.c b/drivers/pci_database.c index 06021a7..bb40120 100644 --- a/drivers/pci_database.c +++ b/drivers/pci_database.c @@ -289,7 +289,7 @@ static const pci_dev_t hbrg_devices[] = { PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_UNI_N_PCI, NULL, "pci", "AAPL,UniNorth", "uni-north\0", 3, 2, 1, - NULL, NULL + host_config_cb, NULL, }, { PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_UNI_N_I_PCI, NULL, @@ -1071,21 +1071,21 @@ static const pci_dev_t misc_pci[] = { PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_343S1201, "mac-io", "mac-io", "AAPL,343S1201", "heathrow\0", 1, 1, 1, - &macio_config_cb, NULL, + &macio_heathrow_config_cb, NULL, }, /* Paddington Mac I/O */ { PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_343S1211, "mac-io", "mac-io", "AAPL,343S1211", "paddington\0heathrow\0", 1, 1, 1, - &macio_config_cb, NULL, + &macio_heathrow_config_cb, NULL, }, /* KeyLargo Mac I/O */ { PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_UNI_N_KEYL, "mac-io", "mac-io", "AAPL,Keylargo", "Keylargo\0", 1, 1, 2, - &macio_config_cb, NULL, + &macio_keylargo_config_cb, NULL, }, { 0xFFFF, 0xFFFF, diff --git a/drivers/pci_database.h b/drivers/pci_database.h index b551ef4..d48ca93 100644 --- a/drivers/pci_database.h +++ b/drivers/pci_database.h @@ -27,7 +27,8 @@ struct pci_dev_t { extern int ide_config_cb2(const pci_config_t *config); extern int eth_config_cb(const pci_config_t *config); -extern int macio_config_cb(const pci_config_t *config); +extern int macio_heathrow_config_cb(const pci_config_t *config); +extern int macio_keylargo_config_cb(const pci_config_t *config); extern int vga_config_cb(const pci_config_t *config); extern int host_config_cb(const pci_config_t *config); extern int bridge_config_cb(const pci_config_t *config);