mirror of
https://gitlab.com/qemu-project/openbios.git
synced 2024-02-13 08:34:06 +08:00
Switch sparc64 to ofmem (Igor Kovalenko)
Initialize ofmem at startup. Switch malloc/realloc/free to use ofmem. Implement runtime migration of startup mappings to ofmem. Implement mmu miss handlers to install tlb entries based on ofmem translations list. git-svn-id: svn://coreboot.org/openbios/trunk/openbios-devel@517 f158a5a8-5612-0410-a976-696ce0be7e32
This commit is contained in:
@@ -34,32 +34,19 @@ int printk( const char *fmt, ... )
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return i;
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}
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#define MEMSIZE ((128 + 256 + 512) * 1024)
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static char memory[MEMSIZE];
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static void *memptr=memory;
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static int memsize=MEMSIZE;
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void *malloc(int size)
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{
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void *ret=(void *)0;
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return ofmem_malloc(size);
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}
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if( !size )
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return NULL;
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size = (size + 7) & ~7;
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if(memsize>=size) {
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memsize-=size;
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ret=memptr;
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memptr = (void *)((unsigned long)memptr + size);
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}
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return ret;
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void* realloc( void *ptr, size_t size )
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{
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return ofmem_realloc(ptr, size);
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}
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void free(void *ptr)
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{
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/* Nothing yet */
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ofmem_free(ptr);
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}
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#define PAGE_SIZE_4M (4 * 1024 * 1024)
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@@ -84,50 +71,44 @@ mmu_close(void)
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void ofmem_walk_boot_map(translation_entry_cb cb)
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{
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}
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static int
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spitfire_translate(unsigned long virt, unsigned long *p_phys,
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unsigned long *p_data, unsigned long *p_size)
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{
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unsigned long phys, tag, data, mask, size;
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unsigned long phys, virt, size, mode, data, mask;
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unsigned int i;
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for (i = 0; i < 64; i++) {
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data = spitfire_get_dtlb_data(i);
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if (data & 0x8000000000000000ULL) { // Valid entry?
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if (data & SPITFIRE_TTE_VALID) {
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switch ((data >> 61) & 3) {
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default:
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case 0x0: // 8k
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case 0x0: /* 8k */
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mask = 0xffffffffffffe000ULL;
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size = PAGE_SIZE_8K;
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break;
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case 0x1: // 64k
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case 0x1: /* 64k */
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mask = 0xffffffffffff0000ULL;
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size = PAGE_SIZE_64K;
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break;
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case 0x2: // 512k
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case 0x2: /* 512k */
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mask = 0xfffffffffff80000ULL;
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size = PAGE_SIZE_512K;
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break;
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case 0x3: // 4M
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case 0x3: /* 4M */
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mask = 0xffffffffffc00000ULL;
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size = PAGE_SIZE_4M;
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break;
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}
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tag = spitfire_get_dtlb_tag(i);
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if ((virt & mask) == (tag & mask)) {
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phys = data & mask & 0x000001fffffff000ULL;
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phys |= virt & ~mask;
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*p_phys = phys;
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*p_data = data & 0xfff;
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*p_size = size;
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return -1;
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}
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virt = spitfire_get_dtlb_tag(i);
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virt &= mask;
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/* extract 41bit physical address */
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phys = data & 0x000001fffffff000ULL;
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phys &= mask;
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mode = data & 0xfff;
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cb(phys, virt, size, mode);
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}
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}
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return 0;
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}
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/*
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@@ -137,18 +118,21 @@ spitfire_translate(unsigned long virt, unsigned long *p_phys,
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static void
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mmu_translate(void)
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{
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unsigned long virt, phys, data, size;
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ucell virt, phys, mode;
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virt = POP();
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if (spitfire_translate(virt, &phys, &data, &size)) {
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PUSH(phys & 0xffffffff);
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PUSH(phys >> 32);
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PUSH(data);
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PUSH(-1);
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return;
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phys = ofmem_translate(virt, &mode);
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if (phys != -1UL) {
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PUSH(phys & 0xffffffff);
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PUSH(phys >> 32);
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PUSH(mode);
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PUSH(-1);
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}
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else {
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PUSH(0);
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}
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PUSH(0);
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}
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static void
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@@ -218,13 +202,15 @@ itlb_load(void)
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}
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static void
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map_pages(unsigned long virt, unsigned long size, unsigned long phys,
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unsigned long mode)
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map_pages(unsigned long phys, unsigned long virt,
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unsigned long size, unsigned long mode)
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{
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unsigned long tte_data, currsize;
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unsigned long tte_data, currsize;
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size = (size + PAGE_MASK_8K) & ~PAGE_MASK_8K;
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while (size >= PAGE_SIZE_8K) {
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/* aligned to 8k page */
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size = (size + PAGE_MASK_8K) & ~PAGE_MASK_8K;
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while (size > 0) {
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currsize = size;
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if (currsize >= PAGE_SIZE_4M &&
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(virt & PAGE_MASK_4M) == 0 &&
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@@ -248,8 +234,9 @@ map_pages(unsigned long virt, unsigned long size, unsigned long phys,
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tte_data |= phys | mode | SPITFIRE_TTE_VALID;
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dtlb_load2(virt, tte_data);
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itlb_load2(virt, tte_data);
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dtlb_load2(virt, tte_data);
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size -= currsize;
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phys += currsize;
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virt += currsize;
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@@ -268,7 +255,7 @@ void ofmem_map_pages(ucell phys, ucell virt, ucell size, ucell mode)
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static void
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mmu_map(void)
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{
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unsigned long virt, size, mode, phys;
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ucell virt, size, mode, phys;
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mode = POP();
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size = POP();
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@@ -276,7 +263,8 @@ mmu_map(void)
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phys = POP();
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phys <<= 32;
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phys |= POP();
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map_pages(virt, size, phys, mode);
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ofmem_map(phys, virt, size, mode);
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}
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static void
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@@ -294,22 +282,19 @@ dtlb_demap(unsigned long vaddr)
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}
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static void
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unmap_pages(unsigned long virt, unsigned long size)
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unmap_pages(ucell virt, ucell size)
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{
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unsigned long phys, data;
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ucell va;
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unsigned long currsize;
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/* align address to 8k */
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virt &= ~PAGE_MASK_8K;
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// align size
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/* align size to 8k */
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size = (size + PAGE_MASK_8K) & ~PAGE_MASK_8K;
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while (spitfire_translate(virt, &phys, &data, &currsize)) {
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itlb_demap(virt & ~0x1fffULL);
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dtlb_demap(virt & ~0x1fffULL);
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size -= currsize;
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virt += currsize;
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for (va = virt; va < virt + size; va += PAGE_SIZE_8K) {
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itlb_demap(va);
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dtlb_demap(va);
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}
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}
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@@ -325,11 +310,11 @@ void ofmem_unmap_pages(ucell virt, ucell size)
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static void
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mmu_unmap(void)
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{
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unsigned long virt, size;
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ucell virt, size;
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size = POP();
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virt = POP();
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unmap_pages(virt, size);
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ofmem_unmap(virt, size);
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}
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/*
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@@ -339,13 +324,23 @@ mmu_unmap(void)
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static void
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mmu_claim(void)
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{
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unsigned long virt, size, align;
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ucell virt=-1UL, size, align;
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align = POP();
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size = POP();
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virt = POP();
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printk("claim virt = %lx size = %lx align = %lx\n", virt, size, align);
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PUSH(virt); // XXX
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if (!align) {
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virt = POP();
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}
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printk("claim virt=" FMT_ucellx " size=" FMT_ucellx " align=" FMT_ucellx
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"\n",
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virt, size, align);
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virt = ofmem_claim_virt(virt, size, align);
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printk("claimed virt=" FMT_ucellx "\n", virt);
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PUSH(virt);
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}
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/*
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@@ -355,14 +350,63 @@ mmu_claim(void)
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static void
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mmu_release(void)
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{
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unsigned long virt, size;
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ucell virt, size;
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size = POP();
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virt = POP();
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printk("release virt = %lx size = %lx\n", virt, size);
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// XXX
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printk("release virt=" FMT_ucellx " size=" FMT_ucellx "\n", virt, size);
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ofmem_release(virt, size);
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}
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/* ( phys size align --- base ) */
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static void
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mem_claim( void )
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{
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ucell phys=-1UL, size, align;
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align = POP();
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size = POP();
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if (!align) {
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phys = POP();
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phys <<= 32;
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phys |= POP();
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}
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printk("mem_claim phys=" FMT_ucellx " size=" FMT_ucellx
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" align=" FMT_ucellx "\n",
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phys, size, align);
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phys = ofmem_claim_phys(phys, size, align);
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printk("ofmem_claim_phys result phys=" FMT_ucellx "\n", phys);
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ofmem_map(phys, phys, size, -1);
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PUSH(phys >> 32);
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PUSH(phys & 0xffffffffUL);
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}
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/* ( phys size --- ) */
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static void
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mem_release( void )
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{
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ucell phys, size;
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size = POP();
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phys = POP();
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printk("release virt=" FMT_ucellx " size=" FMT_ucellx "\n", phys, size);
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ofmem_release(phys, size);
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}
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DECLARE_NODE(memory, INSTALL_OPEN, 0, "/memory");
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NODE_METHODS( memory ) = {
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{ "claim", mem_claim },
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{ "release", mem_release },
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};
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DECLARE_UNNAMED_NODE(mmu, INSTALL_OPEN, 0);
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NODE_METHODS(mmu) = {
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@@ -381,7 +425,10 @@ void ob_mmu_init(const char *cpuname, uint64_t ram_size)
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{
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char nodebuff[256];
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// MMU node
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/* memory node */
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REGISTER_NODE_METHODS(memory, "/memory");
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/* MMU node */
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snprintf(nodebuff, sizeof(nodebuff), "/%s", cpuname);
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push_str(nodebuff);
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fword("find-device");
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@@ -397,6 +444,8 @@ void ob_mmu_init(const char *cpuname, uint64_t ram_size)
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REGISTER_NODE_METHODS(mmu, nodebuff);
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ofmem_register(find_dev("/memory"), find_dev("/virtual-memory"));
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push_str("/chosen");
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fword("find-device");
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@@ -409,7 +458,7 @@ void ob_mmu_init(const char *cpuname, uint64_t ram_size)
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push_str("/memory");
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fword("find-device");
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// All memory: 0 to RAM_size
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/* All memory: 0 to RAM_size */
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PUSH(0);
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fword("encode-int");
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PUSH(0);
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@@ -424,108 +473,6 @@ void ob_mmu_init(const char *cpuname, uint64_t ram_size)
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push_str("reg");
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fword("property");
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// Available memory: 0 to va2pa(_start)
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PUSH(0);
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fword("encode-int");
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PUSH(0);
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fword("encode-int");
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fword("encode+");
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PUSH((va2pa((unsigned long)&_data) - 8192) >> 32);
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fword("encode-int");
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fword("encode+");
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PUSH((va2pa((unsigned long)&_data) - 8192) & 0xffffffff);
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fword("encode-int");
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fword("encode+");
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push_str("available");
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fword("property");
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// XXX
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// Translations
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push_str("/virtual-memory");
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fword("find-device");
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// 0 to 16M: 1:1
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PUSH(0);
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fword("encode-int");
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PUSH(0);
|
||||
fword("encode-int");
|
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fword("encode+");
|
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PUSH(0);
|
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fword("encode-int");
|
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fword("encode+");
|
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PUSH(16 * 1024 * 1024);
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fword("encode-int");
|
||||
fword("encode+");
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PUSH(0x80000000);
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fword("encode-int");
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fword("encode+");
|
||||
PUSH(0x00000036);
|
||||
fword("encode-int");
|
||||
fword("encode+");
|
||||
|
||||
// _start to _data: ROM used
|
||||
PUSH(0);
|
||||
fword("encode-int");
|
||||
fword("encode+");
|
||||
PUSH((unsigned long)&_start);
|
||||
fword("encode-int");
|
||||
fword("encode+");
|
||||
PUSH(0);
|
||||
fword("encode-int");
|
||||
fword("encode+");
|
||||
PUSH((unsigned long)&_data - (unsigned long)&_start);
|
||||
fword("encode-int");
|
||||
fword("encode+");
|
||||
PUSH(0x800001ff);
|
||||
fword("encode-int");
|
||||
fword("encode+");
|
||||
PUSH(0xf0000074);
|
||||
fword("encode-int");
|
||||
fword("encode+");
|
||||
|
||||
// _data to _end: end of RAM
|
||||
PUSH(0);
|
||||
fword("encode-int");
|
||||
fword("encode+");
|
||||
PUSH((unsigned long)&_data);
|
||||
fword("encode-int");
|
||||
fword("encode+");
|
||||
PUSH(0);
|
||||
fword("encode-int");
|
||||
fword("encode+");
|
||||
PUSH((unsigned long)&_data - (unsigned long)&_start);
|
||||
fword("encode-int");
|
||||
fword("encode+");
|
||||
PUSH(((va2pa((unsigned long)&_data) - 8192) >> 32) | 0x80000000);
|
||||
fword("encode-int");
|
||||
fword("encode+");
|
||||
PUSH(((va2pa((unsigned long)&_data) - 8192) & 0xffffffff) | 0x36);
|
||||
fword("encode-int");
|
||||
fword("encode+");
|
||||
|
||||
// VGA buffer (128k): 1:1
|
||||
PUSH(0x1ff);
|
||||
fword("encode-int");
|
||||
fword("encode+");
|
||||
PUSH(0x004a0000);
|
||||
fword("encode-int");
|
||||
fword("encode+");
|
||||
PUSH(0);
|
||||
fword("encode-int");
|
||||
fword("encode+");
|
||||
PUSH(128 * 1024);
|
||||
fword("encode-int");
|
||||
fword("encode+");
|
||||
PUSH(0x800001ff);
|
||||
fword("encode-int");
|
||||
fword("encode+");
|
||||
PUSH(0x004a0076);
|
||||
fword("encode-int");
|
||||
fword("encode+");
|
||||
|
||||
push_str("translations");
|
||||
fword("property");
|
||||
|
||||
push_str("/openprom/client-services");
|
||||
fword("find-device");
|
||||
bind_func("claim", mmu_claim);
|
||||
|
||||
@@ -20,6 +20,7 @@
|
||||
#define NO_QEMU_PROTOS
|
||||
#include "openbios/fw_cfg.h"
|
||||
#include "video_subr.h"
|
||||
#include "ofmem.h"
|
||||
|
||||
#define UUID_FMT "%02x%02x%02x%02x-%02x%02x-%02x%02x-%02x%02x-%02x%02x%02x%02x%02x%02x"
|
||||
|
||||
@@ -495,6 +496,8 @@ int openbios(void)
|
||||
printk("OpenBIOS for Sparc64\n");
|
||||
#endif
|
||||
|
||||
ofmem_init();
|
||||
|
||||
collect_sys_info(&sys_info);
|
||||
|
||||
dict = malloc(DICTIONARY_SIZE);
|
||||
|
||||
@@ -27,11 +27,12 @@
|
||||
|
||||
new-device
|
||||
" memory" device-name
|
||||
" memory" device-type
|
||||
external
|
||||
: open true ;
|
||||
: close ;
|
||||
\ claim ( phys size align -- base )
|
||||
: claim 2drop ;
|
||||
\ : claim 2drop ;
|
||||
\ release ( phys size -- )
|
||||
finish-device
|
||||
|
||||
@@ -41,7 +42,7 @@ new-device
|
||||
: open true ;
|
||||
: close ;
|
||||
\ claim ( phys size align -- base )
|
||||
: claim 2drop ;
|
||||
\ : claim 2drop ;
|
||||
\ release ( phys size -- )
|
||||
finish-device
|
||||
|
||||
|
||||
@@ -101,6 +101,8 @@ trap_table:
|
||||
ba bug; mov lvl, %g1; nop; nop; nop; nop; nop; nop;
|
||||
#define BTRAPTL1(lvl) BTRAP(lvl)
|
||||
#define BTRAPS(x) BTRAP(x) BTRAP(x+1) BTRAP(x+2) BTRAP(x+3) BTRAP(x+4) BTRAP(x+5) BTRAP(x+6) BTRAP(x+7)
|
||||
#define BTRAPS4(x) BTRAP(x) BTRAP(x+1) BTRAP(x+2) BTRAP(x+3)
|
||||
#define TRAP_HANDLER(routine) ba routine; nop; nop; nop; nop; nop; nop; nop;
|
||||
|
||||
#define STACK_BIAS 2047
|
||||
.globl sparc64_ttable_tl0, sparc64_ttable_tl1
|
||||
@@ -131,7 +133,16 @@ tl0_irq15: TRAP_IRQ(handler_irq, 15)
|
||||
BTRAPS(0x40) BTRAPS(0x48)
|
||||
#endif
|
||||
BTRAPS(0x50) BTRAPS(0x58)
|
||||
BTRAPS(0x60) BTRAPS(0x68)
|
||||
BTRAPS4(0x60)
|
||||
TRAP_HANDLER(reload_IMMU_tlb) ! 0x64 : instruction_access_MMU_miss
|
||||
TRAP_HANDLER(reload_IMMU_tlb) ! 0x65 : instruction_access_MMU_miss
|
||||
TRAP_HANDLER(reload_IMMU_tlb) ! 0x66 : instruction_access_MMU_miss
|
||||
TRAP_HANDLER(reload_IMMU_tlb) ! 0x67 : instruction_access_MMU_miss
|
||||
TRAP_HANDLER(reload_DMMU_tlb) ! 0x68 : data_access_MMU_miss
|
||||
TRAP_HANDLER(reload_DMMU_tlb) ! 0x69 : data_access_MMU_miss
|
||||
TRAP_HANDLER(reload_DMMU_tlb) ! 0x6A : data_access_MMU_miss
|
||||
TRAP_HANDLER(reload_DMMU_tlb) ! 0x6B : data_access_MMU_miss
|
||||
BTRAPS4(0x6C) ! data_access_protection
|
||||
BTRAPS(0x70) BTRAPS(0x78)
|
||||
tl0_s0n: SPILL_WINDOW
|
||||
tl0_s1n: SPILL_WINDOW
|
||||
@@ -206,7 +217,16 @@ tl1_irq15: TRAP_IRQ(handler_irq, 15)
|
||||
BTRAPS(0x40) BTRAPS(0x48)
|
||||
#endif
|
||||
BTRAPS(0x50) BTRAPS(0x58)
|
||||
BTRAPS(0x60) BTRAPS(0x68)
|
||||
BTRAPS4(0x60)
|
||||
TRAP_HANDLER(reload_IMMU_tlb) ! 0x64 : instruction_access_MMU_miss
|
||||
TRAP_HANDLER(reload_IMMU_tlb) ! 0x65 : instruction_access_MMU_miss
|
||||
TRAP_HANDLER(reload_IMMU_tlb) ! 0x66 : instruction_access_MMU_miss
|
||||
TRAP_HANDLER(reload_IMMU_tlb) ! 0x67 : instruction_access_MMU_miss
|
||||
TRAP_HANDLER(reload_DMMU_tlb) ! 0x68 : data_access_MMU_miss
|
||||
TRAP_HANDLER(reload_DMMU_tlb) ! 0x69 : data_access_MMU_miss
|
||||
TRAP_HANDLER(reload_DMMU_tlb) ! 0x6A : data_access_MMU_miss
|
||||
TRAP_HANDLER(reload_DMMU_tlb) ! 0x6B : data_access_MMU_miss
|
||||
BTRAPS4(0x6C) ! data_access_protection
|
||||
BTRAPS(0x70) BTRAPS(0x78)
|
||||
tl1_s0n: SPILL_WINDOW
|
||||
tl1_s1n: SPILL_WINDOW
|
||||
@@ -300,6 +320,86 @@ fill_32bit:
|
||||
restored
|
||||
retry
|
||||
|
||||
.globl reload_DMMU_tlb, reload_IMMU_tlb
|
||||
|
||||
reload_DMMU_tlb:
|
||||
mov 6 << 3, %g2 ! va = fault virtual address
|
||||
ldxa [%g2] ASI_DMMU, %g1 ! from tag access register
|
||||
|
||||
srlx %g1, 13, %g1 ! %g1 = va rounded to 8k page
|
||||
sllx %g1, 13, %g1 !
|
||||
|
||||
setx g_ofmem_translations, %g7, %g3
|
||||
ldx [%g3], %g3 ! translation_t* t = *g_ofmem_translations
|
||||
dmmu_next_trans:
|
||||
ldx [%g3], %g3
|
||||
brz %g3, bug ! NULL pointer
|
||||
nop
|
||||
ldx [%g3+0x08], %g4 ! t->virt
|
||||
sub %g1, %g4, %g7 ! %g7 offset = va - t->virt
|
||||
brlz %g7, dmmu_next_trans ! va < t->virt ?
|
||||
nop
|
||||
ldx [%g3+0x10], %g4 ! t->size
|
||||
sub %g7, %g4, %g4 ! va >= t->virt - t->size ?
|
||||
brgez %g4, dmmu_next_trans
|
||||
nop
|
||||
|
||||
! install 8k tlb entry
|
||||
|
||||
ldx [%g3+0x18], %g4 ! t->phys
|
||||
add %g4, %g7, %g4 ! %g4 page physical address = t->phys + offset
|
||||
ldx [%g3+0x20], %g5 ! t->mode
|
||||
|
||||
set 0x80000000, %g2 ! valid tte, 8k size
|
||||
sllx %g2, 32, %g2
|
||||
or %g2, %g5, %g2 ! mix in translation mode
|
||||
or %g2, %g4, %g3 ! mix in phys addr mode
|
||||
|
||||
mov 6 << 3, %g2 ! page virtual address
|
||||
stxa %g1, [%g2] ASI_DMMU !
|
||||
stxa %g3, [%g0] ASI_DTLB_DATA_IN
|
||||
|
||||
retry
|
||||
|
||||
reload_IMMU_tlb:
|
||||
mov 6 << 3, %g2 ! va = fault virtual address
|
||||
ldxa [%g2] ASI_IMMU, %g1 ! from tag access register
|
||||
|
||||
srlx %g1, 13, %g1 ! %g1 = va rounded to 8k page
|
||||
sllx %g1, 13, %g1 !
|
||||
|
||||
setx g_ofmem_translations, %g7, %g3
|
||||
ldx [%g3], %g3 ! translation_t* t = *g_ofmem_translations
|
||||
immu_next_trans:
|
||||
ldx [%g3], %g3
|
||||
brz %g3, bug ! NULL pointer
|
||||
nop
|
||||
ldx [%g3+0x08], %g4 ! t->virt
|
||||
sub %g1, %g4, %g7 ! %g7 offset = va - t->virt
|
||||
brlz %g7, immu_next_trans ! va < t->virt ?
|
||||
nop
|
||||
ldx [%g3+0x10], %g4 ! t->size
|
||||
sub %g7, %g4, %g4 ! va >= t->virt - t->size ?
|
||||
brgez %g4, immu_next_trans
|
||||
nop
|
||||
|
||||
! install 8k tlb entry
|
||||
|
||||
ldx [%g3+0x18], %g4 ! t->phys
|
||||
add %g4, %g7, %g4 ! %g4 page physical address = t->phys + offset
|
||||
ldx [%g3+0x20], %g5 ! t->mode
|
||||
|
||||
set 0x80000000, %g2 ! valid tte, 8k size
|
||||
sllx %g2, 32, %g2
|
||||
or %g2, %g5, %g2 ! mix in translation mode
|
||||
or %g2, %g4, %g3 ! mix in phys addr mode
|
||||
|
||||
mov 6 << 3, %g2 ! page virtual address
|
||||
stxa %g1, [%g2] ASI_IMMU !
|
||||
stxa %g3, [%g0] ASI_ITLB_DATA_IN
|
||||
|
||||
retry
|
||||
|
||||
__divide_error:
|
||||
bug:
|
||||
/* Dump the exception and its context */
|
||||
|
||||
Reference in New Issue
Block a user