While booting a 64bit kernel, there is a small timeframe where OF and the kernel communicate with each other. Within that timeframe, DSI/ISI interrupts may occur, because some memory is not mapped yet.
Right now in case that happens, we jump into the DSI/ISI interrupt handler which clobbers the high 32 bits of the kernel's registers. In order to circumvent that, let's save/restore all 64 bits of all kernel registers when we get a DSI/ISI interrupt.
This patch enables a PPC64 Linux kernel to boot up to the point where it tries to set up the SLB entries (slbmte), which is not yet implemented in qemu.
v2 implements handling for the HIOR register, bringing interrupt handlers to RAM.
Signed-off-by: Alexander Graf <alex@csgraf.de>
git-svn-id: svn://coreboot.org/openbios/openbios-devel@462 f158a5a8-5612-0410-a976-696ce0be7e32
It gets up to the boot prompt and works rather good so far, though I haven't been able to run a kernel yet.
For more recent PowerPC CPUs the PTE layout has changed, so we need to take that into account and create PTEs according to the new layout and at the new physical positions.
Signed-off-by: Alexander Graf <alex@csgraf.de>
Signed-off-by: Laurent Vivier <Laurent@vivier.eu>
git-svn-id: svn://coreboot.org/openbios/openbios-devel@461 f158a5a8-5612-0410-a976-696ce0be7e32
and pciids.sourceforge.net.
Also fix a confusion between Sabre and Simba device IDs.
git-svn-id: svn://coreboot.org/openbios/openbios-devel@437 f158a5a8-5612-0410-a976-696ce0be7e32
If arch is ppc and machine arch id is heathrow, we create:
- properties in root node for a powermac beige
(Linux says "Powermac G3 (Silk)")
- "AAPL,interrupts" and "AAPL,address" properties in PCI device tree.
git-svn-id: svn://coreboot.org/openbios/openbios-devel@388 f158a5a8-5612-0410-a976-696ce0be7e32
This patches copies all needed ppc files to qemu and modifies them.
The generated OpenBIOS image must be loaded at adresse 0xfff00000 by Qemu.
It is able to load Yaboot from disk and Yaboot is able to load Linux, but Linux hangs somewhere... of course it needs more work (but this cleans up my patch queue).
Thank you to Blue Swirl and Aurelien Jarno for their help.
Signed-off-by: Laurent Vivier <Laurent@lvivier.info>
git-svn-id: svn://coreboot.org/openbios/openbios-devel@301 f158a5a8-5612-0410-a976-696ce0be7e32
Fix warnings that would be caused by gcc flag -Wwrite-strings and
-Wmissing-prototypes. Also fix most PPC specific warnings.
git-svn-id: svn://coreboot.org/openbios/openbios-devel@288 f158a5a8-5612-0410-a976-696ce0be7e32
Initialize device tree (used by PCI patch, to follow).
Signed-off-by: Laurent Vivier <Laurent@lvivier.info>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/openbios/openbios-devel@255 f158a5a8-5612-0410-a976-696ce0be7e32
