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https://gitlab.com/qemu-project/openbios.git
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5c9eb9b45b
git-svn-id: svn://coreboot.org/openbios/openbios-devel@1 f158a5a8-5612-0410-a976-696ce0be7e32
325 lines
6.5 KiB
ArmAsm
325 lines
6.5 KiB
ArmAsm
/*
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* Creation Date: <2001/06/16 21:30:18 samuel>
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* Time-stamp: <2003/04/04 16:32:06 samuel>
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*
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* <init.S>
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*
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* Asm glue for ELF images run inside MOL
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*
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* Copyright (C) 2001, 2002, 2003 Samuel Rydh (samuel@ibrium.se)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation
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*
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*/
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changequote([[[[[,]]]]]) [[[[[ /* shield includes from m4-expansion */
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#include "asm/asmdefs.h"
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#include "asm/processor.h"
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#include "osi.h"
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/************************************************************************/
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/* Macros */
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/************************************************************************/
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#define ILLEGAL_VECTOR( v ) .org __vectors + v ; bl trap_error ;
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#define VECTOR( v, dummystr ) .org __vectors + v ; vector__##v
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MACRO(EXCEPTION_PREAMBLE, [
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mtsprg1 r1 // scratch
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mfsprg0 r1 // exception stack in sprg0
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addi r1,r1,-80 // push exception frame
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stw r0,0(r1) // save r0
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mfsprg1 r0
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stw r0,4(r1) // save r1
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stw r2,8(r1) // save r2
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stw r3,12(r1) // save r3
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stw r4,16(r1)
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stw r5,20(r1)
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stw r6,24(r1)
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stw r7,28(r1)
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stw r8,32(r1)
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stw r9,36(r1)
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stw r10,40(r1)
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stw r11,44(r1)
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stw r12,48(r1)
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mflr r0
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stw r0,52(r1)
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mfcr r0
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stw r0,56(r1)
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mfctr r0
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stw r0,60(r1)
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mfxer r0
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stw r0,64(r1)
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// 76(r1) unused
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addi r1,r1,-16 // call conventions uses 0(r1) and 4(r1)...
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])
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/************************************************************************/
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/* stack space */
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/************************************************************************/
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.section .bss
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.balign 32
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.space 32*1024 // 32 K client stack
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client_stack:
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.space 128
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.space 64*1024 // 64 K stack
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stack: .space 64
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.space 32*1024 // 32 K exception stack
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estack: .space 128
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/************************************************************************/
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/* entry */
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/************************************************************************/
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.text
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GLOBL(_start):
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li r0,0
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mtmsr r0
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LOADI r1,estack
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mtsprg0 r1 // setup exception stack
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LOADI r1,stack
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// copy exception vectors
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LOADI r3,__vectors
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li r4,0
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li r5,__vectors_end - __vectors + 16
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rlwinm r5,r5,0,0,28
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1: lwz r6,0(r3)
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lwz r7,4(r3)
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lwz r8,8(r3)
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lwz r9,12(r3)
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stw r6,0(r4)
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stw r7,4(r4)
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stw r8,8(r4)
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stw r9,12(r4)
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dcbst 0,r4
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sync
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icbi 0,r4
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sync
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addi r5,r5,-16
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addi r3,r3,16
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addi r4,r4,16
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cmpwi r5,0
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bgt 1b
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isync
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bl setup_mmu
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bl entry
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1: nop
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b 1b
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/* According to IEEE 1275, PPC bindings:
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*
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* MSR = FP, ME + (DR|IR)
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* r1 = stack (32 K + 32 bytes link area above)
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* r5 = clint interface handler
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* r6 = address of client program arguments (unused)
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* r7 = length of client program arguments (unsed)
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*/
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saved_stack:
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.long 0
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/* void call_elf( entry ) */
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GLOBL(call_elf):
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mflr r0
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stwu r1,-16(r1)
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stw r0,20(r1)
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mtlr r3
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LOADI r8,saved_stack // save our stack pointer
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stw r1,0(r8)
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LOADI r1,client_stack
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LOADI r5,of_client_callback // r5 = callback
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li r6,0 // r6 = address of client program arguments (unused)
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li r7,0 // r7 = length of client program arguments (unused)
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li r0,MSR_FP | MSR_ME | MSR_DR | MSR_IR
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mtmsr r0
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blrl
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LOADI r8,saved_stack // restore stack pointer
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mr r1,r8
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lwz r0,20(r1)
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mtlr r0
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addi r1,r1,16
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// XXX: should restore r12-r31 etc..
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// we should not really come here though
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blr
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GLOBL(of_client_callback):
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LOADI r4,saved_stack
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lwz r4,0(r4)
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stwu r4,-32(r4)
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mflr r5
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stw r5,32+4(r4)
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stw r1,8(r4) // save caller stack
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mr r1,r4
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stw r2,12(r1)
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stw r0,16(r1)
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mfctr r2
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stw r2,20(r1)
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mfcr r2
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stw r2,24(r1)
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mfxer r2
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stw r2,28(r1)
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// do we need to save more registers?
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bl of_client_interface
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lwz r4,32+4(r1)
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mtlr r4
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lwz r2,20(r1)
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mtctr r2
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lwz r2,24(r1)
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mtcr r2
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lwz r2,28(r1)
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mtxer r2
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lwz r2,12(r1)
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lwz r0,16(r1)
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lwz r1,8(r1) // restore caller stack
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blr
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/* rtas glue (must be reloctable) */
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GLOBL(of_rtas_start):
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/* r3 = argument buffer, r4 = of_rtas_start */
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/* according to the CHRP standard, cr must be preserved (cr0/cr1 too?) */
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mr r6,r3
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LOADI r3,OSI_SC_MAGIC_R3
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LOADI r4,OSI_SC_MAGIC_R4
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li r5,OSI_OF_RTAS
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sc
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blr
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GLOBL(of_rtas_end):
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/* used in a hack to the newworld calibration */
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GLOBL(nw_dec_calibration):
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.long 0
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GLOBL(timer_calib_start):
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LOADI r3,nw_dec_calibration
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lwz r3,0(r3)
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blr
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GLOBL(timer_calib_end):
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/************************************************************************/
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/* vectors */
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/************************************************************************/
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GLOBL(__vectors):
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nop // NULL-jmp trap
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1: nop //
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b 1b
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exception_return:
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addi r1,r1,16 // pop ABI frame
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lwz r0,52(r1)
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mtlr r0
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lwz r0,56(r1)
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mtcr r0
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lwz r0,60(r1)
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mtctr r0
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lwz r0,64(r1)
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mtxer r0
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lwz r0,0(r1) // restore r0
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lwz r2,8(r1) // restore r2
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lwz r3,12(r1) // restore r3
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lwz r4,16(r1)
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lwz r5,20(r1)
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lwz r6,24(r1)
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lwz r7,28(r1)
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lwz r8,32(r1)
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lwz r9,36(r1)
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lwz r10,40(r1)
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lwz r11,44(r1)
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lwz r12,48(r1)
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lwz r1,4(r1) // restore r1
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rfi
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trap_error:
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mflr r3
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b unexpected_excep
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ILLEGAL_VECTOR( 0x100 )
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ILLEGAL_VECTOR( 0x200 )
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VECTOR( 0x300, "DSI" ):
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EXCEPTION_PREAMBLE
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LOADI r3,dsi_exception
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mtctr r3
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bctrl
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b exception_return
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VECTOR( 0x400, "ISI" ):
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EXCEPTION_PREAMBLE
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LOADI r3,isi_exception
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mtctr r3
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bctrl
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b exception_return
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ILLEGAL_VECTOR( 0x500 )
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ILLEGAL_VECTOR( 0x600 )
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ILLEGAL_VECTOR( 0x700 )
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VECTOR( 0x800, "FPU" ):
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mtsprg1 r3
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mfsrr1 r3
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ori r3,r3,0x2000
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mtsrr1 r3
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mfsprg1 r3
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rfi
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ILLEGAL_VECTOR( 0x900 )
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ILLEGAL_VECTOR( 0xa00 )
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ILLEGAL_VECTOR( 0xb00 )
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ILLEGAL_VECTOR( 0xc00 )
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ILLEGAL_VECTOR( 0xd00 )
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ILLEGAL_VECTOR( 0xe00 )
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ILLEGAL_VECTOR( 0xf00 )
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ILLEGAL_VECTOR( 0xf20 )
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ILLEGAL_VECTOR( 0x1000 )
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ILLEGAL_VECTOR( 0x1100 )
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ILLEGAL_VECTOR( 0x1200 )
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ILLEGAL_VECTOR( 0x1300 )
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ILLEGAL_VECTOR( 0x1400 )
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ILLEGAL_VECTOR( 0x1500 )
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ILLEGAL_VECTOR( 0x1600 )
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ILLEGAL_VECTOR( 0x1700 )
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GLOBL(__vectors_end):
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#define CACHE_LINE_SIZE 32
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#define LG_CACHE_LINE_SIZE 5
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/* flush_icache_range( ulong start, ulong stop) */
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GLOBL(flush_icache_range):
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li r5,CACHE_LINE_SIZE-1
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andc r3,r3,r5
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subf r4,r3,r4
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add r4,r4,r5
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srwi. r4,r4,LG_CACHE_LINE_SIZE
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beqlr
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mtctr r4
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mr r6,r3
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1: dcbst 0,r3
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addi r3,r3,CACHE_LINE_SIZE
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bdnz 1b
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sync /* wait for dcbst's to get to ram */
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mtctr r4
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2: icbi 0,r6
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addi r6,r6,CACHE_LINE_SIZE
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bdnz 2b
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sync /* additional sync needed on g4 */
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isync
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blr
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