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https://gitlab.com/qemu-project/openbios.git
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97eb20b042
Split adb.[ch] and part of cuda.c to adb_bus.[ch], adb_kbd.[ch] and adb_mouse.[ch]. git-svn-id: svn://coreboot.org/openbios/openbios-devel@350 f158a5a8-5612-0410-a976-696ce0be7e32
304 lines
7.7 KiB
C
304 lines
7.7 KiB
C
#include "openbios/config.h"
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#include "openbios/bindings.h"
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#include "libc/byteorder.h"
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#include "libc/vsprintf.h"
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#include "cuda.h"
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//#define DEBUG_CUDA
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#ifdef DEBUG_CUDA
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#define CUDA_DPRINTF(fmt, args...) \
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do { printk("CUDA - %s: " fmt, __func__ , ##args); } while (0)
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#else
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#define CUDA_DPRINTF(fmt, args...) do { } while (0)
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#endif
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#define IO_CUDA_OFFSET 0x00016000
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#define IO_CUDA_SIZE 0x00002000
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/* VIA registers - spaced 0x200 bytes apart */
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#define RS 0x200 /* skip between registers */
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#define B 0 /* B-side data */
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#define A RS /* A-side data */
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#define DIRB (2*RS) /* B-side direction (1=output) */
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#define DIRA (3*RS) /* A-side direction (1=output) */
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#define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */
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#define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */
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#define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */
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#define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */
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#define T2CL (8*RS) /* Timer 2 ctr/latch (low 8 bits) */
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#define T2CH (9*RS) /* Timer 2 counter (high 8 bits) */
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#define SR (10*RS) /* Shift register */
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#define ACR (11*RS) /* Auxiliary control register */
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#define PCR (12*RS) /* Peripheral control register */
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#define IFR (13*RS) /* Interrupt flag register */
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#define IER (14*RS) /* Interrupt enable register */
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#define ANH (15*RS) /* A-side data, no handshake */
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/* Bits in B data register: all active low */
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#define TREQ 0x08 /* Transfer request (input) */
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#define TACK 0x10 /* Transfer acknowledge (output) */
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#define TIP 0x20 /* Transfer in progress (output) */
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/* Bits in ACR */
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#define SR_CTRL 0x1c /* Shift register control bits */
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#define SR_EXT 0x0c /* Shift on external clock */
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#define SR_OUT 0x10 /* Shift out if 1 */
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/* Bits in IFR and IER */
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#define IER_SET 0x80 /* set bits in IER */
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#define IER_CLR 0 /* clear bits in IER */
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#define SR_INT 0x04 /* Shift register full/empty */
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#define CUDA_BUF_SIZE 16
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#define ADB_PACKET 0
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#define CUDA_PACKET 1
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/* CUDA commands (2nd byte) */
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#define CUDA_POWERDOWN 0xa
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#define CUDA_RESET_SYSTEM 0x11
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static uint8_t cuda_readb (cuda_t *dev, int reg)
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{
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return *(volatile uint8_t *)(dev->base + reg);
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}
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static void cuda_writeb (cuda_t *dev, int reg, uint8_t val)
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{
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*(volatile uint8_t *)(dev->base + reg) = val;
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}
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static void cuda_wait_irq (cuda_t *dev)
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{
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int val;
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// CUDA_DPRINTF("\n");
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for(;;) {
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val = cuda_readb(dev, IFR);
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cuda_writeb(dev, IFR, val & 0x7f);
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if (val & SR_INT)
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break;
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}
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}
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static int cuda_request (cuda_t *dev, uint8_t pkt_type, const uint8_t *buf,
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int buf_len, uint8_t *obuf)
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{
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int i, obuf_len, val;
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cuda_writeb(dev, ACR, cuda_readb(dev, ACR) | SR_OUT);
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cuda_writeb(dev, SR, pkt_type);
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cuda_writeb(dev, B, cuda_readb(dev, B) & ~TIP);
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if (buf) {
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//CUDA_DPRINTF("Send buf len: %d\n", buf_len);
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/* send 'buf' */
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for(i = 0; i < buf_len; i++) {
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cuda_wait_irq(dev);
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cuda_writeb(dev, SR, buf[i]);
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cuda_writeb(dev, B, cuda_readb(dev, B) ^ TACK);
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}
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}
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cuda_wait_irq(dev);
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cuda_writeb(dev, ACR, cuda_readb(dev, ACR) & ~SR_OUT);
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cuda_readb(dev, SR);
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cuda_writeb(dev, B, cuda_readb(dev, B) | TIP | TACK);
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obuf_len = 0;
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if (obuf) {
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cuda_wait_irq(dev);
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cuda_readb(dev, SR);
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cuda_writeb(dev, B, cuda_readb(dev, B) & ~TIP);
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for(;;) {
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cuda_wait_irq(dev);
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val = cuda_readb(dev, SR);
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if (obuf_len < CUDA_BUF_SIZE)
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obuf[obuf_len++] = val;
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if (cuda_readb(dev, B) & TREQ)
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break;
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cuda_writeb(dev, B, cuda_readb(dev, B) ^ TACK);
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}
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cuda_writeb(dev, B, cuda_readb(dev, B) | TIP | TACK);
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cuda_wait_irq(dev);
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cuda_readb(dev, SR);
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}
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// CUDA_DPRINTF("Got len: %d\n", obuf_len);
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return obuf_len;
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}
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static int cuda_adb_req (void *host, const uint8_t *snd_buf, int len,
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uint8_t *rcv_buf)
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{
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uint8_t buffer[CUDA_BUF_SIZE], *pos;
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// CUDA_DPRINTF("len: %d %02x\n", len, snd_buf[0]);
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len = cuda_request(host, ADB_PACKET, snd_buf, len, buffer);
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if (len > 1 && buffer[0] == ADB_PACKET) {
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pos = buffer + 2;
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len -= 2;
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} else {
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pos = buffer + 1;
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len = -1;
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}
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memcpy(rcv_buf, pos, len);
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return len;
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}
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DECLARE_UNNAMED_NODE(ob_cuda, INSTALL_OPEN, sizeof(int));
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static cuda_t *main_cuda;
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static void
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ppc32_reset_all(void)
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{
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uint8_t cmdbuf[2], obuf[64];
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cmdbuf[0] = CUDA_RESET_SYSTEM;
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cuda_request(main_cuda, CUDA_PACKET, cmdbuf, sizeof(cmdbuf), obuf);
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}
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static void
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ppc32_poweroff(void)
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{
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uint8_t cmdbuf[2], obuf[64];
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cmdbuf[0] = CUDA_POWERDOWN;
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cuda_request(main_cuda, CUDA_PACKET, cmdbuf, sizeof(cmdbuf), obuf);
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}
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static void
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ob_cuda_initialize (int *idx)
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{
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phandle_t ph=get_cur_dev();
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int props[2];
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push_str("via-cuda");
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fword("device-type");
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set_int_property(ph, "#address-cells", 1);
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set_int_property(ph, "#size-cells", 0);
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set_property(ph, "compatible", "cuda", 5);
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props[0] = __cpu_to_be32(IO_CUDA_OFFSET);
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props[1] = __cpu_to_be32(IO_CUDA_SIZE);
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set_property(ph, "reg", (char *)&props, sizeof(props));
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set_int_property(ph, "interrupt-parent", pic_handle);
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// HEATHROW
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set_int_property(ph, "interrupts", 0x12);
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bind_func("ppc32-reset-all", ppc32_reset_all);
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push_str("' ppc32-reset-all to reset-all");
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fword("eval");
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PUSH(0);
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fword("active-package!");
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bind_func("poweroff", ppc32_poweroff);
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}
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static void
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ob_cuda_open(int *idx)
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{
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RET(-1);
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}
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static void
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ob_cuda_close(int *idx)
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{
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}
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static void
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ob_cuda_decode_unit(void *private)
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{
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PUSH(0);
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fword("decode-unit-pci-bus");
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}
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static void
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ob_cuda_encode_unit(void *private)
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{
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fword("encode-unit-pci");
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}
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NODE_METHODS(ob_cuda) = {
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{ NULL, ob_cuda_initialize },
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{ "open", ob_cuda_open },
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{ "close", ob_cuda_close },
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{ "decode-unit", ob_cuda_decode_unit },
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{ "encode-unit", ob_cuda_encode_unit },
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};
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DECLARE_UNNAMED_NODE(rtc, INSTALL_OPEN, sizeof(int));
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static void
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rtc_open(int *idx)
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{
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RET(-1);
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}
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NODE_METHODS(rtc) = {
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{ "open", rtc_open },
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};
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static void
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rtc_init(char *path)
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{
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phandle_t ph, aliases;
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char buf[64];
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snprintf(buf, sizeof(buf), "%s/rtc", path);
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REGISTER_NAMED_NODE(rtc, buf);
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ph = find_dev(buf);
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set_property(ph, "device_type", "rtc", 4);
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set_property(ph, "compatible", "rtc", 4);
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aliases = find_dev("/aliases");
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set_property(aliases, "rtc", buf, strlen(buf) + 1);
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}
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cuda_t *cuda_init (const char *path, uint32_t base)
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{
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cuda_t *cuda;
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char buf[64];
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phandle_t aliases;
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base += IO_CUDA_OFFSET;
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CUDA_DPRINTF(" base=%08x\n", base);
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cuda = malloc(sizeof(cuda_t));
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if (cuda == NULL)
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return NULL;
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snprintf(buf, sizeof(buf), "%s/via-cuda", path);
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REGISTER_NAMED_NODE(ob_cuda, buf);
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aliases = find_dev("/aliases");
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set_property(aliases, "via-cuda", buf, strlen(buf) + 1);
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cuda->base = base;
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cuda_writeb(cuda, B, cuda_readb(cuda, B) | TREQ | TIP);
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#ifdef CONFIG_DRIVER_ADB
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cuda->adb_bus = adb_bus_new(cuda, &cuda_adb_req);
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if (cuda->adb_bus == NULL) {
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free(cuda);
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return NULL;
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}
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adb_bus_init(buf, cuda->adb_bus);
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#endif
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rtc_init(buf);
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main_cuda = cuda;
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return cuda;
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}
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