mirror of
https://gitlab.com/qemu-project/openbios.git
synced 2024-02-13 08:34:06 +08:00
0fcbe4e047
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@siriusit.co.uk> git-svn-id: svn://coreboot.org/openbios/trunk/openbios-devel@897 f158a5a8-5612-0410-a976-696ce0be7e32
664 lines
13 KiB
C
664 lines
13 KiB
C
/* lib.c
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* tag: simple function library
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*
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* Copyright (C) 2003 Stefan Reinauer
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*
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* See the file "COPYING" for further information about
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* the copyright and warranty status of this work.
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*/
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#include "config.h"
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#include "libc/vsprintf.h"
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#include "libopenbios/bindings.h"
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#include "spitfire.h"
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#include "libopenbios/sys_info.h"
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#include "boot.h"
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#include "ofmem_sparc64.h"
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static ucell *va2ttedata = 0;
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/* Format a string and print it on the screen, just like the libc
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* function printf.
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*/
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int printk( const char *fmt, ... )
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{
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char *p, buf[512];
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va_list args;
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int i;
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va_start(args, fmt);
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i = vsnprintf(buf, sizeof(buf), fmt, args);
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va_end(args);
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for( p=buf; *p; p++ )
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putchar(*p);
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return i;
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}
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void *malloc(int size)
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{
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return ofmem_malloc(size);
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}
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void* realloc( void *ptr, size_t size )
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{
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return ofmem_realloc(ptr, size);
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}
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void free(void *ptr)
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{
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ofmem_free(ptr);
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}
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#define PAGE_SIZE_4M (4 * 1024 * 1024)
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#define PAGE_SIZE_512K (512 * 1024)
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#define PAGE_SIZE_64K (64 * 1024)
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#define PAGE_SIZE_8K (8 * 1024)
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#define PAGE_MASK_4M (4 * 1024 * 1024 - 1)
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#define PAGE_MASK_512K (512 * 1024 - 1)
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#define PAGE_MASK_64K (64 * 1024 - 1)
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#define PAGE_MASK_8K (8 * 1024 - 1)
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static void
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mmu_open(void)
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{
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RET(-1);
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}
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static void
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mmu_close(void)
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{
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}
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void ofmem_walk_boot_map(translation_entry_cb cb)
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{
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unsigned long phys, virt, size, mode, data, mask;
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unsigned int i;
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for (i = 0; i < 64; i++) {
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data = spitfire_get_dtlb_data(i);
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if (data & SPITFIRE_TTE_VALID) {
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switch ((data >> 61) & 3) {
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default:
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case 0x0: /* 8k */
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mask = 0xffffffffffffe000ULL;
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size = PAGE_SIZE_8K;
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break;
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case 0x1: /* 64k */
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mask = 0xffffffffffff0000ULL;
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size = PAGE_SIZE_64K;
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break;
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case 0x2: /* 512k */
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mask = 0xfffffffffff80000ULL;
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size = PAGE_SIZE_512K;
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break;
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case 0x3: /* 4M */
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mask = 0xffffffffffc00000ULL;
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size = PAGE_SIZE_4M;
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break;
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}
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virt = spitfire_get_dtlb_tag(i);
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virt &= mask;
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/* extract 41bit physical address */
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phys = data & 0x000001fffffff000ULL;
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phys &= mask;
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mode = data & 0xfff;
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cb(phys, virt, size, mode);
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}
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}
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}
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/*
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3.6.5 translate
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( virt -- false | phys.lo ... phys.hi mode true )
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*/
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static void
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mmu_translate(void)
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{
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ucell virt, phys, mode;
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virt = POP();
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phys = ofmem_translate(virt, &mode);
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if (phys != -1UL) {
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PUSH(phys & 0xffffffff);
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PUSH(phys >> 32);
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PUSH(mode);
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PUSH(-1);
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}
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else {
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PUSH(0);
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}
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}
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/*
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* D5.3 pgmap@ ( va -- tte )
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*/
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static void
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pgmap_fetch(void)
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{
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translation_t *t = *g_ofmem_translations;
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unsigned long va, tte_data;
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va = POP();
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/* Search the ofmem linked list for this virtual address */
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while (t != NULL) {
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/* Find the correct range */
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if (va >= t->virt && va < (t->virt + t->size)) {
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/* valid tte, 8k size */
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tte_data = SPITFIRE_TTE_VALID;
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/* mix in phys address mode */
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tte_data |= t->mode;
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/* mix in page physical address = t->phys + offset */
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tte_data |= t->phys + (va - t->virt);
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/* return tte_data */
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PUSH(tte_data);
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return;
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}
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t = t->next;
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}
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/* If we get here, there was no entry */
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PUSH(0);
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}
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static void
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dtlb_load2(unsigned long vaddr, unsigned long tte_data)
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{
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asm("stxa %0, [%1] %2\n"
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"stxa %3, [%%g0] %4\n"
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: : "r" (vaddr), "r" (48), "i" (ASI_DMMU),
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"r" (tte_data), "i" (ASI_DTLB_DATA_IN));
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}
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static void
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dtlb_load3(unsigned long vaddr, unsigned long tte_data,
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unsigned long tte_index)
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{
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asm("stxa %0, [%1] %2\n"
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"stxa %3, [%4] %5\n"
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: : "r" (vaddr), "r" (48), "i" (ASI_DMMU),
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"r" (tte_data), "r" (tte_index << 3), "i" (ASI_DTLB_DATA_ACCESS));
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}
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static unsigned long
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dtlb_faultva(void)
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{
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unsigned long faultva;
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asm("ldxa [%1] %2, %0\n"
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: "=r" (faultva)
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: "r" (48), "i" (ASI_DMMU));
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return faultva;
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}
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/*
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( index tte_data vaddr -- ? )
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*/
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static void
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dtlb_load(void)
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{
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unsigned long vaddr, tte_data, idx;
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vaddr = POP();
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tte_data = POP();
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idx = POP();
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dtlb_load3(vaddr, tte_data, idx);
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}
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/* MMU D-TLB miss handler */
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void
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dtlb_miss_handler(void)
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{
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unsigned long faultva, tte_data = 0;
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/* Grab fault address from MMU and round to nearest 8k page */
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faultva = dtlb_faultva();
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faultva >>= 13;
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faultva <<= 13;
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/* If a valid va>tte-data routine has been set, invoke that Forth xt instead */
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if (va2ttedata && *va2ttedata != 0) {
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/* va>tte-data ( addr cnum -- false | tte-data true ) */
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PUSH(faultva);
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PUSH(0);
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enterforth(*va2ttedata);
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/* Check the result first... */
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tte_data = POP();
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if (!tte_data) {
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bug();
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} else {
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/* Grab the real data */
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tte_data = POP();
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}
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} else {
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/* Search the ofmem linked list for this virtual address */
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PUSH(faultva);
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pgmap_fetch();
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tte_data = POP();
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}
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if (tte_data) {
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/* Update MMU */
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dtlb_load2(faultva, tte_data);
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} else {
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/* If we got here, there was no translation so fail */
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bug();
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}
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}
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static void
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itlb_load2(unsigned long vaddr, unsigned long tte_data)
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{
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asm("stxa %0, [%1] %2\n"
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"stxa %3, [%%g0] %4\n"
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: : "r" (vaddr), "r" (48), "i" (ASI_IMMU),
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"r" (tte_data), "i" (ASI_ITLB_DATA_IN));
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}
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static void
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itlb_load3(unsigned long vaddr, unsigned long tte_data,
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unsigned long tte_index)
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{
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asm("stxa %0, [%1] %2\n"
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"stxa %3, [%4] %5\n"
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: : "r" (vaddr), "r" (48), "i" (ASI_IMMU),
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"r" (tte_data), "r" (tte_index << 3), "i" (ASI_ITLB_DATA_ACCESS));
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}
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/*
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( index tte_data vaddr -- ? )
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*/
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static void
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itlb_load(void)
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{
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unsigned long vaddr, tte_data, idx;
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vaddr = POP();
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tte_data = POP();
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idx = POP();
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itlb_load3(vaddr, tte_data, idx);
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}
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static unsigned long
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itlb_faultva(void)
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{
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unsigned long faultva;
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asm("ldxa [%1] %2, %0\n"
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: "=r" (faultva)
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: "r" (48), "i" (ASI_IMMU));
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return faultva;
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}
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/* MMU I-TLB miss handler */
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void
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itlb_miss_handler(void)
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{
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unsigned long faultva, tte_data = 0;
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/* Grab fault address from MMU and round to nearest 8k page */
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faultva = itlb_faultva();
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faultva >>= 13;
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faultva <<= 13;
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/* If a valid va>tte-data routine has been set, invoke that Forth xt instead */
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if (va2ttedata && *va2ttedata != 0) {
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/* va>tte-data ( addr cnum -- false | tte-data true ) */
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PUSH(faultva);
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PUSH(0);
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enterforth(*va2ttedata);
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/* Check the result first... */
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tte_data = POP();
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if (!tte_data) {
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bug();
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} else {
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/* Grab the real data */
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tte_data = POP();
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}
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} else {
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/* Search the ofmem linked list for this virtual address */
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PUSH(faultva);
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pgmap_fetch();
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tte_data = POP();
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}
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if (tte_data) {
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/* Update MMU */
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itlb_load2(faultva, tte_data);
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} else {
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/* If we got here, there was no translation so fail */
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bug();
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}
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}
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static void
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map_pages(unsigned long phys, unsigned long virt,
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unsigned long size, unsigned long mode)
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{
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unsigned long tte_data, currsize;
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/* aligned to 8k page */
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size = (size + PAGE_MASK_8K) & ~PAGE_MASK_8K;
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while (size > 0) {
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currsize = size;
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if (currsize >= PAGE_SIZE_4M &&
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(virt & PAGE_MASK_4M) == 0 &&
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(phys & PAGE_MASK_4M) == 0) {
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currsize = PAGE_SIZE_4M;
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tte_data = 6ULL << 60;
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} else if (currsize >= PAGE_SIZE_512K &&
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(virt & PAGE_MASK_512K) == 0 &&
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(phys & PAGE_MASK_512K) == 0) {
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currsize = PAGE_SIZE_512K;
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tte_data = 4ULL << 60;
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} else if (currsize >= PAGE_SIZE_64K &&
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(virt & PAGE_MASK_64K) == 0 &&
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(phys & PAGE_MASK_64K) == 0) {
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currsize = PAGE_SIZE_64K;
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tte_data = 2ULL << 60;
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} else {
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currsize = PAGE_SIZE_8K;
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tte_data = 0;
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}
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tte_data |= phys | mode | SPITFIRE_TTE_VALID;
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itlb_load2(virt, tte_data);
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dtlb_load2(virt, tte_data);
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size -= currsize;
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phys += currsize;
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virt += currsize;
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}
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}
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void ofmem_map_pages(ucell phys, ucell virt, ucell size, ucell mode)
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{
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return map_pages(phys, virt, size, mode);
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}
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/*
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3.6.5 map
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( phys.lo ... phys.hi virt size mode -- )
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*/
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static void
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mmu_map(void)
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{
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ucell virt, size, mode, phys;
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mode = POP();
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size = POP();
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virt = POP();
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phys = POP();
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phys <<= 32;
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phys |= POP();
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ofmem_map(phys, virt, size, mode);
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}
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static void
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itlb_demap(unsigned long vaddr)
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{
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asm("stxa %0, [%0] %1\n"
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: : "r" (vaddr), "i" (ASI_IMMU_DEMAP));
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}
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static void
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dtlb_demap(unsigned long vaddr)
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{
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asm("stxa %0, [%0] %1\n"
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: : "r" (vaddr), "i" (ASI_DMMU_DEMAP));
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}
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static void
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unmap_pages(ucell virt, ucell size)
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{
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ucell va;
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/* align address to 8k */
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virt &= ~PAGE_MASK_8K;
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/* align size to 8k */
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size = (size + PAGE_MASK_8K) & ~PAGE_MASK_8K;
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for (va = virt; va < virt + size; va += PAGE_SIZE_8K) {
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itlb_demap(va);
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dtlb_demap(va);
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}
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}
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void ofmem_arch_unmap_pages(ucell virt, ucell size)
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{
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unmap_pages(virt, size);
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}
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void ofmem_arch_early_map_pages(ucell phys, ucell virt, ucell size, ucell mode)
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{
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if (mode & SPITFIRE_TTE_LOCKED) {
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// install locked tlb entries now
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ofmem_map_pages(phys, virt, size, mode);
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}
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}
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/*
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3.6.5 unmap
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( virt size -- )
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*/
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static void
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mmu_unmap(void)
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{
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ucell virt, size;
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size = POP();
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virt = POP();
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ofmem_unmap(virt, size);
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}
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|
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/*
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3.6.5 claim
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( virt size align -- base )
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*/
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static void
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mmu_claim(void)
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{
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ucell virt=-1UL, size, align;
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align = POP();
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size = POP();
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if (!align) {
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virt = POP();
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}
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virt = ofmem_claim_virt(virt, size, align);
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PUSH(virt);
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}
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|
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/*
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3.6.5 release
|
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( virt size -- )
|
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*/
|
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static void
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mmu_release(void)
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{
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ucell virt, size;
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size = POP();
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virt = POP();
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|
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ofmem_release_virt(virt, size);
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}
|
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|
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/* ( phys size align --- base ) */
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static void
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mem_claim( void )
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{
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ucell phys=-1UL, size, align;
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align = POP();
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size = POP();
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if (!align) {
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phys = POP();
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phys <<= 32;
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phys |= POP();
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}
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phys = ofmem_claim_phys(phys, size, align);
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PUSH(phys & 0xffffffffUL);
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PUSH(phys >> 32);
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}
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|
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/* ( phys size --- ) */
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static void
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mem_release( void )
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{
|
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ucell phys, size;
|
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size = POP();
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phys = POP();
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phys <<= 32;
|
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phys |= POP();
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|
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ofmem_release_phys(phys, size);
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}
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|
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/* ( name-cstr phys size align --- phys ) */
|
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static void
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mem_retain ( void )
|
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{
|
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ucell phys=-1UL, size, align;
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|
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align = POP();
|
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size = POP();
|
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if (!align) {
|
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phys = POP();
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phys <<= 32;
|
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phys |= POP();
|
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}
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|
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/* Currently do nothing with the name */
|
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POP();
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|
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phys = ofmem_retain(phys, size, align);
|
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|
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PUSH(phys & 0xffffffffUL);
|
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PUSH(phys >> 32);
|
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}
|
|
|
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/* ( virt size align -- baseaddr|-1 ) */
|
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static void
|
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ciface_claim( void )
|
|
{
|
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ucell align = POP();
|
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ucell size = POP();
|
|
ucell virt = POP();
|
|
ucell ret = ofmem_claim( virt, size, align );
|
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|
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/* printk("ciface_claim: %08x %08x %x\n", virt, size, align ); */
|
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PUSH( ret );
|
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}
|
|
|
|
/* ( virt size -- ) */
|
|
static void
|
|
ciface_release( void )
|
|
{
|
|
POP();
|
|
POP();
|
|
}
|
|
|
|
DECLARE_NODE(memory, INSTALL_OPEN, 0, "/memory");
|
|
|
|
NODE_METHODS( memory ) = {
|
|
{ "claim", mem_claim },
|
|
{ "release", mem_release },
|
|
{ "SUNW,retain", mem_retain },
|
|
};
|
|
|
|
DECLARE_NODE(mmu, INSTALL_OPEN, 0, "/virtual-memory");
|
|
|
|
NODE_METHODS(mmu) = {
|
|
{ "open", mmu_open },
|
|
{ "close", mmu_close },
|
|
{ "translate", mmu_translate },
|
|
{ "SUNW,dtlb-load", dtlb_load },
|
|
{ "SUNW,itlb-load", itlb_load },
|
|
{ "map", mmu_map },
|
|
{ "unmap", mmu_unmap },
|
|
{ "claim", mmu_claim },
|
|
{ "release", mmu_release },
|
|
};
|
|
|
|
void ob_mmu_init(const char *cpuname, uint64_t ram_size)
|
|
{
|
|
/* memory node */
|
|
REGISTER_NODE_METHODS(memory, "/memory");
|
|
|
|
/* MMU node */
|
|
REGISTER_NODE_METHODS(mmu, "/virtual-memory");
|
|
|
|
ofmem_register(find_dev("/memory"), find_dev("/virtual-memory"));
|
|
|
|
push_str("/chosen");
|
|
fword("find-device");
|
|
|
|
push_str("/virtual-memory");
|
|
fword("open-dev");
|
|
fword("encode-int");
|
|
push_str("mmu");
|
|
fword("property");
|
|
|
|
push_str("/memory");
|
|
fword("find-device");
|
|
|
|
/* All memory: 0 to RAM_size */
|
|
PUSH(0);
|
|
fword("encode-int");
|
|
PUSH(0);
|
|
fword("encode-int");
|
|
fword("encode+");
|
|
PUSH((int)(ram_size >> 32));
|
|
fword("encode-int");
|
|
fword("encode+");
|
|
PUSH((int)(ram_size & 0xffffffff));
|
|
fword("encode-int");
|
|
fword("encode+");
|
|
push_str("reg");
|
|
fword("property");
|
|
|
|
push_str("/openprom/client-services");
|
|
fword("find-device");
|
|
bind_func("cif-claim", ciface_claim);
|
|
bind_func("cif-release", ciface_release);
|
|
|
|
/* Other MMU functions */
|
|
PUSH(0);
|
|
fword("active-package!");
|
|
bind_func("pgmap@", pgmap_fetch);
|
|
|
|
/* Find address of va2ttedata defer word contents for MMU miss handlers */
|
|
va2ttedata = (ucell *)findword("va>tte-data");
|
|
va2ttedata++;
|
|
}
|