mirror of
https://gitlab.com/qemu-project/openbios.git
synced 2024-02-13 08:34:06 +08:00
317816c4ba
- refactor scan procedure to start with PCI host controller - initiate scan of subordinate PCI bus from PCI host and PCI-to-PCI bridges - find out PCI subordinate bus numbers and write them to bride devices - automated assignment of "reg", "ranges", and "bus-range" properties Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com> git-svn-id: svn://coreboot.org/openbios/trunk/openbios-devel@786 f158a5a8-5612-0410-a976-696ce0be7e32
56 lines
1.4 KiB
C
56 lines
1.4 KiB
C
typedef struct pci_config_t pci_config_t;
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struct pci_config_t {
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char path[256];
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uint32_t dev; /* bus, dev, fn */
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uint32_t regions[7];
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uint32_t assigned[7];
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uint32_t sizes[7];
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int irq_pin;
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int irq_line;
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u32 primary_bus;
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u32 secondary_bus;
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u32 subordinate_bus;
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};
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typedef struct pci_dev_t pci_dev_t;
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struct pci_dev_t {
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uint16_t vendor;
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uint16_t product;
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const char *type;
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const char *name;
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const char *model;
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const char *compat;
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int acells;
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int scells;
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int icells;
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int (*config_cb)(const pci_config_t *config);
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const void *private;
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};
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extern int ide_config_cb2(const pci_config_t *config);
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extern int eth_config_cb(const pci_config_t *config);
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extern int macio_heathrow_config_cb(const pci_config_t *config);
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extern int macio_keylargo_config_cb(const pci_config_t *config);
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extern int vga_config_cb(const pci_config_t *config);
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extern int host_config_cb(const pci_config_t *config);
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extern int sabre_config_cb(const pci_config_t *config);
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extern int bridge_config_cb(const pci_config_t *config);
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extern int ebus_config_cb(const pci_config_t *config);
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static inline int pci_compat_len(const pci_dev_t *dev)
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{
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int len, ret;
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const char *path = dev->compat;
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ret = 0;
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while ((len = strlen(path)) != 0) {
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ret += len + 1;
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path += len + 1;
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}
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return ret;
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}
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extern const pci_dev_t *pci_find_device(uint8_t class, uint8_t subclass,
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uint8_t iface, uint16_t vendor,
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uint16_t product);
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