mirror of
https://gitlab.com/qemu-project/openbios.git
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d06b24d10f
git-svn-id: svn://coreboot.org/openbios/openbios-devel@120 f158a5a8-5612-0410-a976-696ce0be7e32
398 lines
8.5 KiB
C
398 lines
8.5 KiB
C
/*
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* OpenBIOS SBus driver
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*
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* (C) 2004 Stefan Reinauer <stepan@openbios.org>
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* (C) 2005 Ed Schouten <ed@fxq.nl>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2
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*
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*/
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#include "openbios/config.h"
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#include "openbios/bindings.h"
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#include "openbios/kernel.h"
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#include "libc/byteorder.h"
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#include "libc/vsprintf.h"
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#include "openbios/drivers.h"
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#define SBUS_REGS 0x28
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#define SBUS_SLOTS 16
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static void
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ob_sbus_node_init(unsigned long bus, unsigned long base)
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{
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void *regs;
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push_str("/iommu/sbus");
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fword("find-device");
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PUSH(bus);
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fword("encode-int");
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PUSH(base);
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fword("encode-int");
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fword("encode+");
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PUSH(SBUS_REGS);
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fword("encode-int");
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fword("encode+");
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push_str("reg");
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fword("property");
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regs = map_io(base, SBUS_REGS);
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PUSH((unsigned long)regs);
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fword("encode-int");
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push_str("address");
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fword("property");
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}
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static void
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ob_le_init(unsigned int slot, unsigned long base, unsigned long offset)
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{
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push_str("/iommu/sbus/ledma");
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fword("find-device");
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PUSH(slot);
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fword("encode-int");
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PUSH(offset + 0x00400010);
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fword("encode-int");
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fword("encode+");
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PUSH(0x00000020);
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fword("encode-int");
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fword("encode+");
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push_str("reg");
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fword("property");
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push_str("/iommu/sbus/ledma/le");
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fword("find-device");
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PUSH(slot);
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fword("encode-int");
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PUSH(offset + 0x00c00000);
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fword("encode-int");
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fword("encode+");
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PUSH(0x00000004);
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fword("encode-int");
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fword("encode+");
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push_str("reg");
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fword("property");
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}
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static void
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ob_tcx_init(unsigned int slot, unsigned long base)
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{
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push_str("/iommu/sbus/SUNW,tcx");
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fword("find-device");
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PUSH(slot);
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fword("encode-int");
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PUSH(0x00800000);
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fword("encode-int");
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fword("encode+");
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PUSH(0x00100000);
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fword("encode-int");
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fword("encode+");
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PUSH(slot);
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fword("encode-int");
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fword("encode+");
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PUSH(0x02000000);
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fword("encode-int");
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fword("encode+");
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PUSH(0x00000001);
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fword("encode-int");
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fword("encode+");
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PUSH(slot);
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fword("encode-int");
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fword("encode+");
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PUSH(0x04000000);
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fword("encode-int");
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fword("encode+");
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PUSH(0x00000001);
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fword("encode-int");
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fword("encode+");
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PUSH(slot);
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fword("encode-int");
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fword("encode+");
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PUSH(0x06000000);
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fword("encode-int");
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fword("encode+");
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PUSH(0x00800000);
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fword("encode-int");
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fword("encode+");
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PUSH(slot);
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fword("encode-int");
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fword("encode+");
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PUSH(0x0a000000);
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fword("encode-int");
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fword("encode+");
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PUSH(0x00000001);
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fword("encode-int");
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fword("encode+");
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PUSH(slot);
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fword("encode-int");
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fword("encode+");
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PUSH(0x0c000000);
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fword("encode-int");
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fword("encode+");
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PUSH(0x00000001);
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fword("encode-int");
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fword("encode+");
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PUSH(slot);
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fword("encode-int");
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fword("encode+");
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PUSH(0x0e000000);
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fword("encode-int");
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fword("encode+");
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PUSH(0x00000001);
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fword("encode-int");
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fword("encode+");
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PUSH(slot);
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fword("encode-int");
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fword("encode+");
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PUSH(0x00700000);
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fword("encode-int");
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fword("encode+");
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PUSH(0x00001000);
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fword("encode-int");
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fword("encode+");
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PUSH(slot);
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fword("encode-int");
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fword("encode+");
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PUSH(0x00200000);
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fword("encode-int");
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fword("encode+");
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PUSH(0x00000004);
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fword("encode-int");
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fword("encode+");
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PUSH(slot);
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fword("encode-int");
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fword("encode+");
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PUSH(0x00300000);
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fword("encode-int");
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fword("encode+");
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PUSH(0x0000081c);
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fword("encode-int");
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fword("encode+");
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PUSH(slot);
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fword("encode-int");
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fword("encode+");
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PUSH(0x00000000);
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fword("encode-int");
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fword("encode+");
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PUSH(0x00010000);
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fword("encode-int");
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fword("encode+");
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PUSH(slot);
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fword("encode-int");
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fword("encode+");
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PUSH(0x00240000);
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fword("encode-int");
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fword("encode+");
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PUSH(0x00000004);
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fword("encode-int");
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fword("encode+");
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PUSH(slot);
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fword("encode-int");
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fword("encode+");
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PUSH(0x00280000);
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fword("encode-int");
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fword("encode+");
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PUSH(0x00000001);
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fword("encode-int");
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fword("encode+");
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push_str("reg");
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fword("property");
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}
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static void
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ob_macio_init(unsigned int slot, unsigned long base, unsigned long offset)
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{
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// All devices were integrated to NCR89C100, see
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// http://www.ibiblio.org/pub/historic-linux/early-ports/Sparc/NCR/NCR89C100.txt
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// NCR 53c9x, aka ESP. See
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// http://www.ibiblio.org/pub/historic-linux/early-ports/Sparc/NCR/NCR53C9X.txt
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#ifdef CONFIG_DRIVER_ESP
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ob_esp_init(slot, base, offset);
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#endif
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// NCR 92C990, Am7990, Lance. See http://www.amd.com
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ob_le_init(slot, base, offset);
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// Parallel port
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//ob_bpp_init(base);
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// Power management
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//ob_power_init(base);
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}
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static void
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sbus_probe_slot_ss5(unsigned int slot, unsigned long base)
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{
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// OpenBIOS and Qemu don't know how to do Sbus probing
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switch(slot) {
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case 3: // SUNW,tcx
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ob_tcx_init(slot, base);
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break;
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case 4: // SUNW,CS4231
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//ob_cs4231_init(slot, base);
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break;
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case 5: // MACIO: le, esp, bpp, power-management
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ob_macio_init(slot, base, 0x08000000);
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break;
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default:
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break;
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}
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}
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static void
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sbus_probe_slot_ss10(unsigned int slot, unsigned long base)
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{
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// OpenBIOS and Qemu don't know how to do Sbus probing
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switch(slot) {
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case 2: // SUNW,tcx
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ob_tcx_init(slot, base);
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break;
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case 0xf: // le, esp, bpp, power-management
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ob_macio_init(slot, base, 0);
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break;
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default:
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break;
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}
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}
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static void
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ob_sbus_open(int *idx)
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{
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int ret=1;
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RET ( -ret );
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}
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static void
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ob_sbus_close(int *idx)
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{
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selfword("close-deblocker");
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}
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static void
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ob_sbus_initialize(int *idx)
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{
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}
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NODE_METHODS(ob_sbus_node) = {
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{ NULL, ob_sbus_initialize },
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{ "open", ob_sbus_open },
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{ "close", ob_sbus_close },
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};
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static const unsigned long sbus_offsets_ss5[SBUS_SLOTS][5] = {
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{ 0, 0, 0x0, 0x20000000, 0x10000000,},
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{ 1, 0, 0x0, 0x30000000, 0x10000000,},
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{ 2, 0, 0x0, 0x40000000, 0x10000000,},
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{ 3, 0, 0x0, 0x50000000, 0x10000000,},
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{ 4, 0, 0x0, 0x60000000, 0x10000000,},
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{ 5, 0, 0x0, 0x70000000, 0x10000000,},
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};
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static const unsigned long sbus_offsets_ss10[SBUS_SLOTS][5] = {
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{ 0, 0, 0xe, 0x00000000, 0x10000000,},
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{ 1, 0, 0xe, 0x10000000, 0x10000000,},
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{ 2, 0, 0xe, 0x20000000, 0x10000000,},
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{ 3, 0, 0xe, 0x30000000, 0x10000000,},
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[0xf] = { 0xf, 0, 0xe, 0xf0000000, 0x10000000,},
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};
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static void
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ob_add_sbus_range(const unsigned long *range, int notfirst)
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{
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if (!notfirst) {
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push_str("/iommu/sbus");
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fword("find-device");
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}
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PUSH(range[0]);
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fword("encode-int");
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if (notfirst)
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fword("encode+");
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PUSH(range[1]);
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fword("encode-int");
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fword("encode+");
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PUSH(range[2]);
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fword("encode-int");
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fword("encode+");
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PUSH(range[3]);
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fword("encode-int");
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fword("encode+");
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PUSH(range[4]);
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fword("encode-int");
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fword("encode+");
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}
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static int
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ob_sbus_init_ss5(unsigned long bus, unsigned long base)
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{
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unsigned int slot;
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int notfirst = 0;
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for (slot = 0; slot < SBUS_SLOTS; slot++) {
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if (sbus_offsets_ss5[slot][4] > 0)
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ob_add_sbus_range(sbus_offsets_ss5[slot], notfirst++);
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}
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push_str("ranges");
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fword("property");
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for (slot = 0; slot < SBUS_SLOTS; slot++) {
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if (sbus_offsets_ss5[slot][4] > 0)
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sbus_probe_slot_ss5(slot, sbus_offsets_ss5[slot][3]);
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}
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return 0;
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}
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static int
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ob_sbus_init_ss10(unsigned long bus, unsigned long base)
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{
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unsigned int slot;
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int notfirst = 0;
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for (slot = 0; slot < SBUS_SLOTS; slot++) {
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if (sbus_offsets_ss10[slot][4] > 0)
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ob_add_sbus_range(sbus_offsets_ss10[slot], notfirst++);
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}
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push_str("ranges");
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fword("property");
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for (slot = 0; slot < SBUS_SLOTS; slot++) {
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if (sbus_offsets_ss10[slot][4] > 0)
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sbus_probe_slot_ss10(slot, sbus_offsets_ss10[slot][3]);
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}
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return 0;
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}
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int ob_sbus_init(unsigned long bus, unsigned long base, int machine_id)
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{
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ob_sbus_node_init(bus, base);
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switch (machine_id) {
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case 0x72:
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return ob_sbus_init_ss10(bus, base);
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case 0x80:
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return ob_sbus_init_ss5(bus, base);
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default:
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return -1;
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}
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}
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