mirror of
https://gitlab.com/qemu-project/openbios.git
synced 2024-02-13 08:34:06 +08:00
f446864114
git-svn-id: svn://coreboot.org/openbios/openbios-devel@270 f158a5a8-5612-0410-a976-696ce0be7e32
938 lines
21 KiB
C
938 lines
21 KiB
C
/* tag: openbios forth environment, executable code
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*
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* Copyright (C) 2003 Patrick Mauritz, Stefan Reinauer
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*
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* See the file "COPYING" for further information about
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* the copyright and warranty status of this work.
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*/
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#include "openbios/config.h"
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#include "openbios/bindings.h"
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#include "openbios/drivers.h"
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#include "asm/types.h"
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#include "dict.h"
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#include "openbios/kernel.h"
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#include "openbios/stack.h"
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#include "openbios/nvram.h"
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#include "sys_info.h"
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#include "openbios.h"
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#include "openbios/pci.h"
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#include "asm/pci.h"
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#include "libc/byteorder.h"
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#define cpu_to_be16(x) __cpu_to_be16(x)
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#include "openbios/firmware_abi.h"
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#include "boot.h"
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#include "../../drivers/timer.h" // XXX
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#include "asi.h"
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#include "spitfire.h"
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#include "libc/vsprintf.h"
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#define NO_QEMU_PROTOS
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#include "openbios/fw_cfg.h"
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#define BIOS_CFG_CMD 0x510
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#define BIOS_CFG_DATA 0x511
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#define APB_SPECIAL_BASE 0x1fe00000000ULL
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#define PCI_CONFIG (APB_SPECIAL_BASE + 0x1000000ULL)
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#define APB_MEM_BASE 0x1ff00000000ULL
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static unsigned char intdict[256 * 1024];
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// XXX
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#define NVRAM_SIZE 0x2000
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#define NVRAM_IDPROM 0x1fd0
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#define NVRAM_OB_START (sizeof(ohwcfg_v3_t) + sizeof(struct sparc_arch_cfg))
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#define NVRAM_OB_SIZE ((NVRAM_IDPROM - NVRAM_OB_START) & ~15)
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ohwcfg_v3_t nv_info;
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#define OBIO_CMDLINE_MAX 256
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static char obio_cmdline[OBIO_CMDLINE_MAX];
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static uint8_t idprom[32];
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struct hwdef {
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pci_arch_t pci;
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uint8_t machine_id_low, machine_id_high;
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};
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static const struct hwdef hwdefs[] = {
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{
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.pci.cfg_addr = PCI_CONFIG,
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.pci.cfg_data = 0,
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.pci.cfg_base = 0x80000000ULL,
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.pci.cfg_len = 0,
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.pci.mem_base = 0,
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.pci.mem_len = 0,
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.pci.io_base = 0,
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.pci.io_len = 0,
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.machine_id_low = 0,
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.machine_id_high = 255,
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},
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};
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struct cpudef {
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unsigned long iu_version;
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const char *name;
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};
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#define PAGE_SIZE_4M (4 * 1024 * 1024)
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#define PAGE_SIZE_512K (512 * 1024)
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#define PAGE_SIZE_64K (64 * 1024)
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#define PAGE_SIZE_8K (8 * 1024)
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#define PAGE_MASK_4M (4 * 1024 * 1024 - 1)
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#define PAGE_MASK_512K (512 * 1024 - 1)
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#define PAGE_MASK_64K (64 * 1024 - 1)
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#define PAGE_MASK_8K (8 * 1024 - 1)
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#define UUID_FMT "%02x%02x%02x%02x-%02x%02x-%02x%02x-%02x%02x-%02x%02x%02x%02x%02x%02x"
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static void
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mmu_open(void)
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{
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RET(-1);
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}
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static void
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mmu_close(void)
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{
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}
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static int
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spitfire_translate(unsigned long virt, unsigned long *p_phys,
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unsigned long *p_data, unsigned long *p_size)
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{
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unsigned long phys, tag, data, mask, size;
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unsigned int i;
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for (i = 0; i < 64; i++) {
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data = spitfire_get_dtlb_data(i);
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if (data & 0x8000000000000000) { // Valid entry?
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switch ((data >> 61) & 3) {
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default:
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case 0x0: // 8k
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mask = 0xffffffffffffe000ULL;
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size = PAGE_SIZE_8K;
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break;
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case 0x1: // 64k
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mask = 0xffffffffffff0000ULL;
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size = PAGE_SIZE_64K;
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break;
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case 0x2: // 512k
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mask = 0xfffffffffff80000ULL;
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size = PAGE_SIZE_512K;
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break;
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case 0x3: // 4M
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mask = 0xffffffffffc00000ULL;
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size = PAGE_SIZE_4M;
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break;
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}
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tag = spitfire_get_dtlb_tag(i);
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if ((virt & mask) == (tag & mask)) {
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phys = data & mask & 0x000001fffffff000;
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phys |= virt & ~mask;
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*p_phys = phys;
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*p_data = data & 0xfff;
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*p_size = size;
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return -1;
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}
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}
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}
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return 0;
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}
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/*
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3.6.5 translate
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( virt -- false | phys.lo ... phys.hi mode true )
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*/
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static void
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mmu_translate(void)
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{
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unsigned long virt, phys, data, size;
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virt = POP();
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if (spitfire_translate(virt, &phys, &data, &size)) {
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PUSH(phys & 0xffffffff);
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PUSH(phys >> 32);
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PUSH(data);
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PUSH(-1);
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return;
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}
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PUSH(0);
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}
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static void
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dtlb_load2(unsigned long vaddr, unsigned long tte_data)
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{
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asm("stxa %0, [%1] %2\n"
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"stxa %3, [%%g0] %4\n"
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: : "r" (vaddr), "r" (48), "i" (ASI_DMMU),
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"r" (tte_data), "i" (ASI_DTLB_DATA_IN));
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}
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static void
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dtlb_load3(unsigned long vaddr, unsigned long tte_data,
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unsigned long tte_index)
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{
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asm("stxa %0, [%1] %2\n"
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"stxa %3, [%4] %5\n"
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: : "r" (vaddr), "r" (48), "i" (ASI_DMMU),
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"r" (tte_data), "r" (tte_index << 3), "i" (ASI_DTLB_DATA_ACCESS));
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}
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/*
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( index tte_data vaddr -- ? )
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*/
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static void
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dtlb_load(void)
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{
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unsigned long vaddr, tte_data, idx;
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vaddr = POP();
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tte_data = POP();
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idx = POP();
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dtlb_load3(vaddr, tte_data, idx);
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}
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static void
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itlb_load2(unsigned long vaddr, unsigned long tte_data)
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{
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asm("stxa %0, [%1] %2\n"
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"stxa %3, [%%g0] %4\n"
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: : "r" (vaddr), "r" (48), "i" (ASI_IMMU),
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"r" (tte_data), "i" (ASI_ITLB_DATA_IN));
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}
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static void
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itlb_load3(unsigned long vaddr, unsigned long tte_data,
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unsigned long tte_index)
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{
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asm("stxa %0, [%1] %2\n"
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"stxa %3, [%4] %5\n"
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: : "r" (vaddr), "r" (48), "i" (ASI_IMMU),
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"r" (tte_data), "r" (tte_index << 3), "i" (ASI_ITLB_DATA_ACCESS));
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}
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/*
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( index tte_data vaddr -- ? )
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*/
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static void
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itlb_load(void)
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{
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unsigned long vaddr, tte_data, idx;
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vaddr = POP();
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tte_data = POP();
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idx = POP();
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itlb_load3(vaddr, tte_data, idx);
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}
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static void
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map_pages(unsigned long virt, unsigned long size, unsigned long phys)
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{
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unsigned long tte_data, currsize;
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size = (size + PAGE_MASK_8K) & ~PAGE_MASK_8K;
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while (size >= PAGE_SIZE_8K) {
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currsize = size;
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if (currsize >= PAGE_SIZE_4M &&
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(virt & PAGE_MASK_4M) == 0 &&
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(phys & PAGE_MASK_4M) == 0) {
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currsize = PAGE_SIZE_4M;
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tte_data = 6ULL << 60;
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} else if (currsize >= PAGE_SIZE_512K &&
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(virt & PAGE_MASK_512K) == 0 &&
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(phys & PAGE_MASK_512K) == 0) {
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currsize = PAGE_SIZE_512K;
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tte_data = 4ULL << 60;
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} else if (currsize >= PAGE_SIZE_64K &&
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(virt & PAGE_MASK_64K) == 0 &&
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(phys & PAGE_MASK_64K) == 0) {
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currsize = PAGE_SIZE_64K;
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tte_data = 2ULL << 60;
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} else {
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currsize = PAGE_SIZE_8K;
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tte_data = 0;
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}
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tte_data |= phys | 0x8000000000000036ULL;
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dtlb_load2(virt, tte_data);
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itlb_load2(virt, tte_data);
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size -= currsize;
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phys += currsize;
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virt += currsize;
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}
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}
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/*
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3.6.5 map
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( phys.lo ... phys.hi virt size mode -- )
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*/
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static void
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mmu_map(void)
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{
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unsigned long virt, size, mode, phys;
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mode = POP();
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size = POP();
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virt = POP();
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phys = POP();
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phys <<= 32;
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phys |= POP();
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map_pages(virt, size, phys);
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}
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static void
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itlb_demap(unsigned long vaddr)
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{
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asm("stxa %0, [%0] %1\n"
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: : "r" (vaddr), "i" (ASI_IMMU_DEMAP));
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}
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static void
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dtlb_demap(unsigned long vaddr)
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{
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asm("stxa %0, [%0] %1\n"
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: : "r" (vaddr), "i" (ASI_DMMU_DEMAP));
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}
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static void
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unmap_pages(unsigned long virt, unsigned long size)
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{
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unsigned long phys, data;
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unsigned long tte_data, currsize;
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// align size
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size = (size + PAGE_MASK_8K) & ~PAGE_MASK_8K;
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while (spitfire_translate(virt, &phys, &data, &currsize)) {
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itlb_demap(virt & ~0x1fffULL);
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dtlb_demap(virt & ~0x1fffULL);
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size -= currsize;
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virt += currsize;
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}
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}
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/*
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3.6.5 unmap
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( virt size -- )
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*/
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static void
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mmu_unmap(void)
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{
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unsigned long virt, size;
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size = POP();
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virt = POP();
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unmap_pages(virt, size);
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}
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/*
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3.6.5 claim
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( virt size align -- base )
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*/
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static void
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mmu_claim(void)
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{
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unsigned long virt, size, align;
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align = POP();
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size = POP();
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virt = POP();
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PUSH(virt); // XXX
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}
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/*
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3.6.5 release
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( virt size -- )
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*/
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static void
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mmu_release(void)
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{
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unsigned long virt, size;
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size = POP();
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virt = POP();
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// XXX
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}
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DECLARE_UNNAMED_NODE(mmu, INSTALL_OPEN, 0);
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NODE_METHODS(mmu) = {
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{ "open", mmu_open },
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{ "close", mmu_close },
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{ "translate", mmu_translate },
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{ "SUNW,dtlb-load", dtlb_load },
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{ "SUNW,itlb-load", itlb_load },
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{ "map", mmu_map },
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{ "unmap", mmu_unmap },
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{ "claim", mmu_claim },
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{ "release", mmu_release },
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};
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/*
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( addr -- ? )
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*/
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static void
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set_trap_table(void)
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{
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unsigned long addr;
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addr = POP();
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asm("wrpr %0, %%tba\n"
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: : "r" (addr));
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}
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static void cpu_generic_init(const struct cpudef *cpu)
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{
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unsigned long iu_version;
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char nodebuff[256];
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push_str("/");
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fword("find-device");
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fword("new-device");
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push_str(cpu->name);
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fword("device-name");
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push_str("cpu");
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fword("device-type");
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asm("rdpr %%ver, %0\n"
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: "=r"(iu_version) :);
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PUSH((iu_version >> 48) & 0xff);
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fword("encode-int");
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push_str("manufacturer#");
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fword("property");
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PUSH((iu_version >> 32) & 0xff);
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fword("encode-int");
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push_str("implementation#");
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fword("property");
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PUSH((iu_version >> 24) & 0xff);
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fword("encode-int");
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push_str("mask#");
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fword("property");
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PUSH(9);
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fword("encode-int");
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push_str("sparc-version");
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fword("property");
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PUSH(1);
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fword("encode-int");
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push_str("cpuid");
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fword("property");
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fword("finish-device");
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// MMU node
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sprintf(nodebuff, "/%s", cpu->name);
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push_str(nodebuff);
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fword("find-device");
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fword("new-device");
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push_str("mmu");
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fword("device-name");
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fword("finish-device");
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sprintf(nodebuff, "/%s/mmu", cpu->name);
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REGISTER_NODE_METHODS(mmu, nodebuff);
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push_str("/chosen");
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fword("find-device");
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push_str(nodebuff);
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fword("open-dev");
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fword("encode-int");
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push_str("mmu");
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fword("property");
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// Trap table
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push_str("/openprom/client-services");
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fword("find-device");
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bind_func("SUNW,set-trap-table", set_trap_table);
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}
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static const struct cpudef sparc_defs[] = {
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{
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.iu_version = (0x04ULL << 48) | (0x02ULL << 32),
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.name = "FJSV,GP",
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},
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{
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.iu_version = (0x04ULL << 48) | (0x03ULL << 32),
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.name = "FJSV,GPUSK",
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},
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{
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.iu_version = (0x04ULL << 48) | (0x04ULL << 32),
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.name = "FJSV,GPUSC",
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},
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{
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.iu_version = (0x04ULL << 48) | (0x05ULL << 32),
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.name = "FJSV,GPUZC",
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},
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{
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.iu_version = (0x17ULL << 48) | (0x10ULL << 32),
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.name = "SUNW,UltraSPARC",
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},
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{
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.iu_version = (0x17ULL << 48) | (0x11ULL << 32),
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.name = "SUNW,UltraSPARC-II",
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},
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{
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.iu_version = (0x17ULL << 48) | (0x12ULL << 32),
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.name = "SUNW,UltraSPARC-IIi",
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},
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{
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.iu_version = (0x17ULL << 48) | (0x13ULL << 32),
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.name = "SUNW,UltraSPARC-IIe",
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},
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{
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.iu_version = (0x3eULL << 48) | (0x14ULL << 32),
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.name = "SUNW,UltraSPARC-III",
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},
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{
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.iu_version = (0x3eULL << 48) | (0x15ULL << 32),
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.name = "SUNW,UltraSPARC-III+",
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},
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{
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.iu_version = (0x3eULL << 48) | (0x16ULL << 32),
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.name = "SUNW,UltraSPARC-IIIi",
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},
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{
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.iu_version = (0x3eULL << 48) | (0x18ULL << 32),
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.name = "SUNW,UltraSPARC-IV",
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},
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{
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.iu_version = (0x3eULL << 48) | (0x19ULL << 32),
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.name = "SUNW,UltraSPARC-IV+",
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},
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{
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.iu_version = (0x3eULL << 48) | (0x22ULL << 32),
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.name = "SUNW,UltraSPARC-IIIi+",
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},
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{
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.iu_version = (0x3eULL << 48) | (0x23ULL << 32),
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.name = "SUNW,UltraSPARC-T1",
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},
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{
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.iu_version = (0x3eULL << 48) | (0x24ULL << 32),
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.name = "SUNW,UltraSPARC-T2",
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},
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{
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.iu_version = (0x22ULL << 48) | (0x10ULL << 32),
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.name = "SUNW,UltraSPARC",
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},
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};
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|
|
static const struct cpudef *
|
|
id_cpu(void)
|
|
{
|
|
unsigned long iu_version;
|
|
unsigned int i;
|
|
|
|
asm("rdpr %%ver, %0\n"
|
|
: "=r"(iu_version) :);
|
|
iu_version &= 0xffffffff00000000ULL;
|
|
|
|
for (i = 0; i < sizeof(sparc_defs)/sizeof(struct cpudef); i++) {
|
|
if (iu_version == sparc_defs[i].iu_version)
|
|
return &sparc_defs[i];
|
|
}
|
|
printk("Unknown cpu (psr %lx), freezing!\n", iu_version);
|
|
for (;;);
|
|
}
|
|
|
|
static uint8_t qemu_uuid[16];
|
|
|
|
void arch_nvram_get(char *data)
|
|
{
|
|
unsigned short i;
|
|
unsigned char *nvptr = (unsigned char *)&nv_info;
|
|
uint32_t size;
|
|
const struct cpudef *cpu;
|
|
const char *bootpath;
|
|
char buf[256];
|
|
uint32_t temp;
|
|
uint64_t ram_size;
|
|
|
|
for (i = 0; i < sizeof(ohwcfg_v3_t); i++) {
|
|
outb(i & 0xff, 0x74);
|
|
outb(i >> 8, 0x75);
|
|
*nvptr++ = inb(0x77);
|
|
}
|
|
|
|
outw(__cpu_to_le16(FW_CFG_SIGNATURE), BIOS_CFG_CMD);
|
|
for (i = 0; i < 4; i++)
|
|
buf[i] = inb(BIOS_CFG_DATA);
|
|
|
|
buf[4] = '\0';
|
|
|
|
printk("Configuration device id %s", buf);
|
|
|
|
outw(__cpu_to_le16(FW_CFG_ID), BIOS_CFG_CMD);
|
|
for (i = 0; i < 4; i++)
|
|
buf[i] = inb(BIOS_CFG_DATA);
|
|
|
|
temp = __le32_to_cpu(*(uint32_t *)buf);
|
|
printk(" version %d\n", temp);
|
|
|
|
kernel_image = nv_info.kernel_image;
|
|
kernel_size = nv_info.kernel_size;
|
|
size = nv_info.cmdline_size;
|
|
if (size > OBIO_CMDLINE_MAX - 1)
|
|
size = OBIO_CMDLINE_MAX - 1;
|
|
memcpy(&obio_cmdline, (void *)(long)nv_info.cmdline, size);
|
|
obio_cmdline[size] = '\0';
|
|
qemu_cmdline = (uint64_t)obio_cmdline;
|
|
cmdline_size = size;
|
|
boot_device = nv_info.boot_devices[0];
|
|
|
|
printk("kernel addr %lx size %lx\n", kernel_image, kernel_size);
|
|
if (size)
|
|
printk("kernel cmdline %s\n", obio_cmdline);
|
|
|
|
for (i = 0; i < NVRAM_OB_SIZE; i++) {
|
|
outb((i + NVRAM_OB_START) & 0xff, 0x74);
|
|
outb((i + NVRAM_OB_START) >> 8, 0x75);
|
|
data[i] = inb(0x77);
|
|
}
|
|
|
|
outw(__cpu_to_le16(FW_CFG_NB_CPUS), BIOS_CFG_CMD);
|
|
for (i = 0; i < 4; i++)
|
|
buf[i] = inb(BIOS_CFG_DATA);
|
|
|
|
temp = __le32_to_cpu(*(uint32_t *)buf);
|
|
|
|
printk("CPUs: %x", temp);
|
|
|
|
cpu = id_cpu();
|
|
//cpu->initfn();
|
|
cpu_generic_init(cpu);
|
|
printk(" x %s\n", cpu->name);
|
|
|
|
// Add /uuid
|
|
outw(__cpu_to_le16(FW_CFG_UUID), BIOS_CFG_CMD);
|
|
for (i = 0; i < 16; i++)
|
|
qemu_uuid[i] = inb(BIOS_CFG_DATA);
|
|
|
|
printk("UUID: " UUID_FMT "\n", qemu_uuid[0], qemu_uuid[1], qemu_uuid[2],
|
|
qemu_uuid[3], qemu_uuid[4], qemu_uuid[5], qemu_uuid[6],
|
|
qemu_uuid[7], qemu_uuid[8], qemu_uuid[9], qemu_uuid[10],
|
|
qemu_uuid[11], qemu_uuid[12], qemu_uuid[13], qemu_uuid[14],
|
|
qemu_uuid[15]);
|
|
|
|
push_str("/");
|
|
fword("find-device");
|
|
|
|
PUSH((long)&qemu_uuid);
|
|
PUSH(16);
|
|
fword("encode-bytes");
|
|
push_str("uuid");
|
|
fword("property");
|
|
|
|
// Add /idprom
|
|
for (i = 0; i < 32; i++) {
|
|
outb((i + 0x1fd8) & 0xff, 0x74);
|
|
outb((i + 0x1fd8) >> 8, 0x75);
|
|
idprom[i] = inb(0x77);
|
|
}
|
|
|
|
PUSH((long)&idprom);
|
|
PUSH(32);
|
|
fword("encode-bytes");
|
|
push_str("idprom");
|
|
fword("property");
|
|
|
|
PUSH(500 * 1000 * 1000);
|
|
fword("encode-int");
|
|
push_str("clock-frequency");
|
|
fword("property");
|
|
|
|
push_str("/memory");
|
|
fword("find-device");
|
|
|
|
outw(__cpu_to_le16(FW_CFG_RAM_SIZE), BIOS_CFG_CMD);
|
|
for (i = 0; i < 8; i++)
|
|
buf[i] = inb(BIOS_CFG_DATA);
|
|
|
|
ram_size = __le64_to_cpu(*(uint64_t *)buf);
|
|
|
|
// All memory: 0 to RAM_size
|
|
PUSH(0);
|
|
fword("encode-int");
|
|
PUSH(0);
|
|
fword("encode-int");
|
|
fword("encode+");
|
|
PUSH((int)(ram_size >> 32));
|
|
fword("encode-int");
|
|
fword("encode+");
|
|
PUSH((int)(ram_size & 0xffffffff));
|
|
fword("encode-int");
|
|
fword("encode+");
|
|
push_str("reg");
|
|
fword("property");
|
|
|
|
// Available memory: 0 to va2pa(_start)
|
|
PUSH(0);
|
|
fword("encode-int");
|
|
PUSH(0);
|
|
fword("encode-int");
|
|
fword("encode+");
|
|
PUSH((va2pa((unsigned long)&_data) - 8192) >> 32);
|
|
fword("encode-int");
|
|
fword("encode+");
|
|
PUSH((va2pa((unsigned long)&_data) - 8192) & 0xffffffff);
|
|
fword("encode-int");
|
|
fword("encode+");
|
|
push_str("available");
|
|
fword("property");
|
|
|
|
// XXX
|
|
// Translations
|
|
push_str("/virtual-memory");
|
|
fword("find-device");
|
|
|
|
// 0 to 16M: 1:1
|
|
PUSH(0);
|
|
fword("encode-int");
|
|
PUSH(0);
|
|
fword("encode-int");
|
|
fword("encode+");
|
|
PUSH(0);
|
|
fword("encode-int");
|
|
fword("encode+");
|
|
PUSH(16 * 1024 * 1024);
|
|
fword("encode-int");
|
|
fword("encode+");
|
|
PUSH(0x80000000);
|
|
fword("encode-int");
|
|
fword("encode+");
|
|
PUSH(0x00000036);
|
|
fword("encode-int");
|
|
fword("encode+");
|
|
|
|
// _start to _data: ROM used
|
|
PUSH(0);
|
|
fword("encode-int");
|
|
fword("encode+");
|
|
PUSH((unsigned long)&_start);
|
|
fword("encode-int");
|
|
fword("encode+");
|
|
PUSH(0);
|
|
fword("encode-int");
|
|
fword("encode+");
|
|
PUSH((unsigned long)&_data - (unsigned long)&_start);
|
|
fword("encode-int");
|
|
fword("encode+");
|
|
PUSH(0x800001ff);
|
|
fword("encode-int");
|
|
fword("encode+");
|
|
PUSH(0xf0000074);
|
|
fword("encode-int");
|
|
fword("encode+");
|
|
|
|
// _data to _end: end of RAM
|
|
PUSH(0);
|
|
fword("encode-int");
|
|
fword("encode+");
|
|
PUSH((unsigned long)&_data);
|
|
fword("encode-int");
|
|
fword("encode+");
|
|
PUSH(0);
|
|
fword("encode-int");
|
|
fword("encode+");
|
|
PUSH((unsigned long)&_data - (unsigned long)&_start);
|
|
fword("encode-int");
|
|
fword("encode+");
|
|
PUSH(((va2pa((unsigned long)&_data) - 8192) >> 32) | 0x80000000);
|
|
fword("encode-int");
|
|
fword("encode+");
|
|
PUSH(((va2pa((unsigned long)&_data) - 8192) & 0xffffffff) | 0x36);
|
|
fword("encode-int");
|
|
fword("encode+");
|
|
|
|
// VGA buffer (128k): 1:1
|
|
PUSH(0x1ff);
|
|
fword("encode-int");
|
|
fword("encode+");
|
|
PUSH(0x004a0000);
|
|
fword("encode-int");
|
|
fword("encode+");
|
|
PUSH(0);
|
|
fword("encode-int");
|
|
fword("encode+");
|
|
PUSH(128 * 1024);
|
|
fword("encode-int");
|
|
fword("encode+");
|
|
PUSH(0x800001ff);
|
|
fword("encode-int");
|
|
fword("encode+");
|
|
PUSH(0x004a0076);
|
|
fword("encode-int");
|
|
fword("encode+");
|
|
|
|
push_str("translations");
|
|
fword("property");
|
|
|
|
push_str("/chosen");
|
|
fword("find-device");
|
|
|
|
if (nv_info.boot_devices[0] == 'c')
|
|
bootpath = "/pci/isa/ide0/disk@0,0:a";
|
|
else
|
|
bootpath = "/pci/isa/ide1/cdrom@0,0:a";
|
|
push_str(bootpath);
|
|
fword("encode-string");
|
|
push_str("bootpath");
|
|
fword("property");
|
|
|
|
push_str(obio_cmdline);
|
|
fword("encode-string");
|
|
push_str("bootargs");
|
|
fword("property");
|
|
}
|
|
|
|
void arch_nvram_put(char *data)
|
|
{
|
|
unsigned short i;
|
|
|
|
for (i = 0; i < NVRAM_OB_SIZE; i++) {
|
|
outb((i + NVRAM_OB_START) & 0xff, 0x74);
|
|
outb((i + NVRAM_OB_START) >> 8, 0x75);
|
|
outb(data[i], 0x77);
|
|
}
|
|
}
|
|
|
|
int arch_nvram_size(void)
|
|
{
|
|
return NVRAM_OB_SIZE;
|
|
}
|
|
|
|
void setup_timers(void)
|
|
{
|
|
}
|
|
|
|
void udelay(unsigned int usecs)
|
|
{
|
|
}
|
|
|
|
static void init_memory(void)
|
|
{
|
|
|
|
/* push start and end of available memory to the stack
|
|
* so that the forth word QUIT can initialize memory
|
|
* management. For now we use hardcoded memory between
|
|
* 0x10000 and 0x9ffff (576k). If we need more memory
|
|
* than that we have serious bloat.
|
|
*/
|
|
|
|
PUSH((ucell)&_heap);
|
|
PUSH((ucell)&_eheap);
|
|
}
|
|
|
|
static void
|
|
arch_init( void )
|
|
{
|
|
unsigned int i;
|
|
uint8_t qemu_machine_type;
|
|
const struct hwdef *hwdef;
|
|
|
|
outw(__cpu_to_le16(FW_CFG_MACHINE_ID), BIOS_CFG_CMD);
|
|
qemu_machine_type = inb(BIOS_CFG_DATA);
|
|
|
|
for (i = 0; i < sizeof(hwdefs) / sizeof(struct hwdef); i++) {
|
|
if (hwdefs[i].machine_id_low <= qemu_machine_type &&
|
|
hwdefs[i].machine_id_high >= qemu_machine_type) {
|
|
hwdef = &hwdefs[i];
|
|
break;
|
|
}
|
|
}
|
|
if (!hwdef)
|
|
for(;;); // Internal inconsistency, hang
|
|
|
|
modules_init();
|
|
#ifdef CONFIG_DRIVER_PCI
|
|
//ob_pci_init();
|
|
#endif
|
|
#ifdef CONFIG_DRIVER_IDE
|
|
setup_timers();
|
|
ob_ide_init();
|
|
#endif
|
|
#ifdef CONFIG_DRIVER_FLOPPY
|
|
ob_floppy_init();
|
|
#endif
|
|
#ifdef CONFIG_DEBUG_CONSOLE_VIDEO
|
|
init_video();
|
|
#endif
|
|
|
|
nvconf_init();
|
|
ob_su_init(0x1fe02000000ULL, 0x3f8ULL, 0);
|
|
|
|
device_end();
|
|
|
|
bind_func("platform-boot", boot );
|
|
printk("\n"); // XXX needed for boot, why?
|
|
}
|
|
|
|
int openbios(void)
|
|
{
|
|
#ifdef CONFIG_DEBUG_CONSOLE
|
|
#ifdef CONFIG_DEBUG_CONSOLE_SERIAL
|
|
uart_init(CONFIG_SERIAL_PORT, CONFIG_SERIAL_SPEED);
|
|
#endif
|
|
#ifdef CONFIG_DEBUG_CONSOLE_VGA
|
|
video_init();
|
|
#endif
|
|
/* Clear the screen. */
|
|
cls();
|
|
printk("OpenBIOS for Sparc64\n");
|
|
#endif
|
|
|
|
collect_sys_info(&sys_info);
|
|
|
|
dict=intdict;
|
|
load_dictionary((char *)sys_info.dict_start,
|
|
(unsigned long)sys_info.dict_end
|
|
- (unsigned long)sys_info.dict_start);
|
|
|
|
#ifdef CONFIG_DEBUG_BOOT
|
|
printk("forth started.\n");
|
|
printk("initializing memory...");
|
|
#endif
|
|
|
|
init_memory();
|
|
|
|
#ifdef CONFIG_DEBUG_BOOT
|
|
printk("done\n");
|
|
#endif
|
|
|
|
PUSH_xt( bind_noname_func(arch_init) );
|
|
fword("PREPOST-initializer");
|
|
|
|
PC = (ucell)findword("initialize-of");
|
|
|
|
if (!PC) {
|
|
printk("panic: no dictionary entry point.\n");
|
|
return -1;
|
|
}
|
|
#ifdef CONFIG_DEBUG_DICTIONARY
|
|
printk("done (%d bytes).\n", dicthead);
|
|
printk("Jumping to dictionary...\n");
|
|
#endif
|
|
|
|
enterforth((xt_t)PC);
|
|
printk("falling off...\n");
|
|
return 0;
|
|
}
|