119 lines
2.5 KiB
C
119 lines
2.5 KiB
C
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/*
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* Copyright (c) 2018 Western Digital Corporation or its affiliates.
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*
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* Authors:
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* Anup Patel <anup.patel@wdc.com>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#include <sbi/riscv_io.h>
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#include <plat/fdt.h>
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#include <plat/irqchip/plic.h>
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#define PLIC_PRIORITY_BASE 0x0
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#define PLIC_PENDING_BASE 0x1000
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#define PLIC_ENABLE_BASE 0x2000
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#define PLIC_ENABLE_STRIDE 0x80
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#define PLIC_CONTEXT_BASE 0x200000
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#define PLIC_CONTEXT_STRIDE 0x1000
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static u32 plic_hart_count;
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static u32 plic_num_sources;
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static volatile void *plic_base;
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static void plic_set_priority(u32 source, u32 val)
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{
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writel(val, plic_base);
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}
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static void plic_set_m_thresh(u32 hartid, u32 val)
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{
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volatile void *plic_m_thresh = plic_base +
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PLIC_CONTEXT_BASE +
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PLIC_CONTEXT_STRIDE * (2 * hartid);
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writel(val, plic_m_thresh);
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}
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static void plic_set_s_thresh(u32 hartid, u32 val)
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{
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volatile void *plic_s_thresh = plic_base +
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PLIC_CONTEXT_BASE +
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PLIC_CONTEXT_STRIDE * (2 * hartid + 1);
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writel(val, plic_s_thresh);
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}
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static void plic_set_s_ie(u32 hartid, u32 word_index, u32 val)
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{
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volatile void *plic_s_ie = plic_base +
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PLIC_ENABLE_BASE +
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PLIC_ENABLE_STRIDE * (2 * hartid + 1);
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writel(val, plic_s_ie + word_index * 4);
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}
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static void plic_fdt_fixup_prop(const struct fdt_node *node,
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const struct fdt_prop *prop,
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void *priv)
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{
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u32 *cells;
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u32 i, cells_count;
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if (!prop)
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return;
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if (fdt_strcmp(prop->name, "interrupts-extended"))
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return;
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cells = prop->value;
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cells_count = prop->len / sizeof(u32);
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if (!cells_count)
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return;
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for (i = 0; i < cells_count; i++) {
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if (i % 4 == 1)
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cells[i] = fdt_rev32(0xffffffff);
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}
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}
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int plic_fdt_fixup(void *fdt, const char *compat)
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{
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fdt_compat_node_prop(fdt, compat, plic_fdt_fixup_prop, NULL);
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return 0;
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}
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int plic_warm_irqchip_init(u32 target_hart)
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{
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size_t i, ie_words = plic_num_sources / 32 + 1;
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if (plic_hart_count <= target_hart)
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return -1;
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/* By default, enable all IRQs for S-mode of target HART */
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for (i = 0; i < ie_words; i++)
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plic_set_s_ie(target_hart, i, -1);
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/* By default, enable M-mode threshold */
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plic_set_m_thresh(target_hart, 1);
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/* By default, disable S-mode threshold */
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plic_set_s_thresh(target_hart, 0);
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return 0;
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}
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int plic_cold_irqchip_init(unsigned long base,
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u32 num_sources, u32 hart_count)
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{
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int i;
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plic_hart_count = hart_count;
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plic_num_sources = num_sources;
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plic_base = (void *)base;
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/* Configure default priorities of all IRQs */
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for (i = 0; i < plic_num_sources; i++)
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plic_set_priority(i, 1);
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return 0;
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}
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