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Makefile: Force GCC to preprocess the linker file 

To avoid this message (and subsequent errors):
    warning: linker input file unused because linking not done
force GCC to treat the linker script preprocessing as a C file.

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Alistair Francis 2019-01-02 13:59:49 -08:00 committed by Anup Patel
parent eeab92f242
commit 5cbc24b95a
1 changed files with 1 additions and 1 deletions
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Makefile
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@ -165,7 +165,7 @@ inst_header_dir = $(CMD_PREFIX)mkdir -p $(1); \
cp -rf $(2) $(1) cp -rf $(2) $(1)
compile_cpp = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \ compile_cpp = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
echo " CPP $(subst $(build_dir)/,,$(1))"; \ echo " CPP $(subst $(build_dir)/,,$(1))"; \
$(CPP) $(CPPFLAGS) $(2) | grep -v "\#" > $(1) $(CPP) $(CPPFLAGS) -x c $(2) | grep -v "\#" > $(1)
compile_cc_dep = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \ compile_cc_dep = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
echo " CC-DEP $(subst $(build_dir)/,,$(1))"; \ echo " CC-DEP $(subst $(build_dir)/,,$(1))"; \
echo -n `dirname $(1)`/ > $(1) && \ echo -n `dirname $(1)`/ > $(1) && \