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lib: utils: Remove redundant parameters from PLIC init functions 

The "target_hart" and "hart_count" parameters of PLIC cold and
warm init functions are only used for sanity checks and not
required in PLIC initialization.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
This commit is contained in:
Anup Patel 2020-05-12 10:14:43 +05:30 committed by Anup Patel
parent 89ba63493c
commit 73d6ef3b29
10 changed files with 22 additions and 48 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
include/sbi_utils/irqchip/plic.h
View File

@ -12,9 +12,9 @@
#include <sbi/sbi_types.h>
int plic_warm_irqchip_init(u32 target_hart, int m_cntx_id, int s_cntx_id);
int plic_warm_irqchip_init(int m_cntx_id, int s_cntx_id);
int plic_cold_irqchip_init(unsigned long base, u32 num_sources, u32 hart_count);
int plic_cold_irqchip_init(unsigned long base, u32 num_sources);
void plic_set_thresh(u32 cntxid, u32 val);

10
lib/utils/irqchip/fdt_irqchip_plic.c
View File

@ -21,8 +21,7 @@ static int irqchip_plic_warm_init(void)
{
u32 hartid = current_hartid();
return plic_warm_irqchip_init(hartid,
plic_hartid2context[hartid][0],
return plic_warm_irqchip_init(plic_hartid2context[hartid][0],
plic_hartid2context[hartid][1]);
}
@ -78,18 +77,13 @@ static int irqchip_plic_cold_init(void *fdt, int nodeoff,
const struct fdt_match *match)
{
int rc;
u32 max_hartid;
struct platform_plic_data plic;
rc = fdt_parse_max_hart_id(fdt, &max_hartid);
if (rc)
return rc;
rc = fdt_parse_plic_node(fdt, nodeoff, &plic);
if (rc)
return rc;
rc = plic_cold_irqchip_init(plic.addr, plic.num_src, max_hartid + 1);
rc = plic_cold_irqchip_init(plic.addr, plic.num_src);
if (rc)
return rc;

9
lib/utils/irqchip/plic.c
View File

@ -20,7 +20,6 @@
#define PLIC_CONTEXT_BASE 0x200000
#define PLIC_CONTEXT_STRIDE 0x1000
static u32 plic_hart_count;
static u32 plic_num_sources;
static volatile void *plic_base;
@ -45,13 +44,10 @@ void plic_set_ie(u32 cntxid, u32 word_index, u32 val)
writel(val, plic_ie + word_index * 4);
}
int plic_warm_irqchip_init(u32 target_hart, int m_cntx_id, int s_cntx_id)
int plic_warm_irqchip_init(int m_cntx_id, int s_cntx_id)
{
size_t i, ie_words = plic_num_sources / 32 + 1;
if (plic_hart_count <= target_hart)
return -1;
/* By default, disable all IRQs for M-mode of target HART */
if (m_cntx_id > -1) {
for (i = 0; i < ie_words; i++)
@ -75,11 +71,10 @@ int plic_warm_irqchip_init(u32 target_hart, int m_cntx_id, int s_cntx_id)
return 0;
}
int plic_cold_irqchip_init(unsigned long base, u32 num_sources, u32 hart_count)
int plic_cold_irqchip_init(unsigned long base, u32 num_sources)
{
int i;
plic_hart_count = hart_count;
plic_num_sources = num_sources;
plic_base = (void *)base;

5
platform/andes/ae350/platform.c
View File

@ -71,13 +71,12 @@ static int ae350_irqchip_init(bool cold_boot)
if (cold_boot) {
ret = plic_cold_irqchip_init(AE350_PLIC_ADDR,
AE350_PLIC_NUM_SOURCES,
AE350_HART_COUNT);
AE350_PLIC_NUM_SOURCES);
if (ret)
return ret;
}
return plic_warm_irqchip_init(hartid, 2 * hartid, 2 * hartid + 1);
return plic_warm_irqchip_init(2 * hartid, 2 * hartid + 1);
}
/* Initialize IPI for current HART. */

11
platform/fpga/ariane/platform.c
View File

@ -63,13 +63,10 @@ static int ariane_console_init(void)
ARIANE_UART_REG_WIDTH);
}
static int plic_ariane_warm_irqchip_init(u32 target_hart,
int m_cntx_id, int s_cntx_id)
static int plic_ariane_warm_irqchip_init(int m_cntx_id, int s_cntx_id)
{
size_t i, ie_words = ARIANE_PLIC_NUM_SOURCES / 32 + 1;
if (ARIANE_HART_COUNT <= target_hart)
return -1;
/* By default, enable all IRQs for M-mode of target HART */
if (m_cntx_id > -1) {
for (i = 0; i < ie_words; i++)
@ -99,14 +96,12 @@ static int ariane_irqchip_init(bool cold_boot)
int ret;
if (cold_boot) {
ret = plic_cold_irqchip_init(ARIANE_PLIC_ADDR,
ARIANE_PLIC_NUM_SOURCES,
ret = plic_cold_irqchip_init(ARIANE_PLIC_NUM_SOURCES,
ARIANE_HART_COUNT);
if (ret)
return ret;
}
return plic_ariane_warm_irqchip_init(hartid,
2 * hartid, 2 * hartid + 1);
return plic_ariane_warm_irqchip_init(2 * hartid, 2 * hartid + 1);
}
/*

11
platform/fpga/openpiton/platform.c
View File

@ -95,13 +95,10 @@ static int openpiton_console_init(void)
OPENPITON_DEFAULT_UART_REG_WIDTH);
}
static int plic_openpiton_warm_irqchip_init(u32 target_hart,
int m_cntx_id, int s_cntx_id)
static int plic_openpiton_warm_irqchip_init(int m_cntx_id, int s_cntx_id)
{
size_t i, ie_words = plic.num_src / 32 + 1;
if (target_hart >= OPENPITON_DEFAULT_HART_COUNT)
return -1;
/* By default, enable all IRQs for M-mode of target HART */
if (m_cntx_id > -1) {
for (i = 0; i < ie_words; i++)
@ -132,13 +129,11 @@ static int openpiton_irqchip_init(bool cold_boot)
if (cold_boot) {
ret = plic_cold_irqchip_init(plic.addr,
plic.num_src,
OPENPITON_DEFAULT_HART_COUNT);
plic.num_src);
if (ret)
return ret;
}
return plic_openpiton_warm_irqchip_init(hartid,
2 * hartid, 2 * hartid + 1);
return plic_openpiton_warm_irqchip_init(2 * hartid, 2 * hartid + 1);
}
/*

5
platform/kendryte/k210/platform.c
View File

@ -59,13 +59,12 @@ static int k210_irqchip_init(bool cold_boot)
if (cold_boot) {
rc = plic_cold_irqchip_init(K210_PLIC_BASE_ADDR,
K210_PLIC_NUM_SOURCES,
K210_HART_COUNT);
K210_PLIC_NUM_SOURCES);
if (rc)
return rc;
}
return plic_warm_irqchip_init(hartid, hartid * 2, hartid * 2 + 1);
return plic_warm_irqchip_init(hartid * 2, hartid * 2 + 1);
}
static int k210_ipi_init(bool cold_boot)

5
platform/nuclei/ux600/platform.c
View File

@ -74,13 +74,12 @@ static int ux600_irqchip_init(bool cold_boot)
if (cold_boot) {
rc = plic_cold_irqchip_init(UX600_PLIC_ADDR,
UX600_PLIC_NUM_SOURCES,
UX600_HART_COUNT);
UX600_PLIC_NUM_SOURCES);
if (rc)
return rc;
}
return plic_warm_irqchip_init(hartid, (hartid) ? (2 * hartid - 1) : 0,
return plic_warm_irqchip_init((hartid) ? (2 * hartid - 1) : 0,
(hartid) ? (2 * hartid) : -1);
}

5
platform/sifive/fu540/platform.c
View File

@ -89,13 +89,12 @@ static int fu540_irqchip_init(bool cold_boot)
if (cold_boot) {
rc = plic_cold_irqchip_init(FU540_PLIC_ADDR,
FU540_PLIC_NUM_SOURCES,
FU540_HART_COUNT);
FU540_PLIC_NUM_SOURCES);
if (rc)
return rc;
}
return plic_warm_irqchip_init(hartid, (hartid) ? (2 * hartid - 1) : 0,
return plic_warm_irqchip_init((hartid) ? (2 * hartid - 1) : 0,
(hartid) ? (2 * hartid) : -1);
}

5
platform/template/platform.c
View File

@ -71,13 +71,12 @@ static int platform_irqchip_init(bool cold_boot)
/* Example if the generic PLIC driver is used */
if (cold_boot) {
ret = plic_cold_irqchip_init(PLATFORM_PLIC_ADDR,
PLATFORM_PLIC_NUM_SOURCES,
PLATFORM_HART_COUNT);
PLATFORM_PLIC_NUM_SOURCES);
if (ret)
return ret;
}
return plic_warm_irqchip_init(hartid, 2 * hartid, 2 * hartid + 1);
return plic_warm_irqchip_init(2 * hartid, 2 * hartid + 1);
}
/*