platform: Setup serial console device in early_init()

The sbi_console_init() does not do any special initialization so
setup serial console device in early_init() so that console prints
work as early as possible.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-By: Himanshu Chauhan <hchauhan@ventanamicro.com>
This commit is contained in:
Anup Patel 2024-07-04 12:15:58 +05:30 committed by Anup Patel
parent 4afb57c9eb
commit 9e8a18fd0d
6 changed files with 43 additions and 78 deletions

View File

@ -7,7 +7,6 @@
#include <sbi/riscv_asm.h>
#include <sbi/riscv_encoding.h>
#include <sbi/riscv_io.h>
#include <sbi/sbi_console.h>
#include <sbi/sbi_const.h>
#include <sbi/sbi_hart.h>
#include <sbi/sbi_platform.h>
@ -67,8 +66,15 @@ static struct aclint_mtimer_data mtimer = {
*/
static int ariane_early_init(bool cold_boot)
{
/* For now nothing to do. */
if (!cold_boot)
return 0;
return uart8250_init(ARIANE_UART_ADDR,
ARIANE_UART_FREQ,
ARIANE_UART_BAUDRATE,
ARIANE_UART_REG_SHIFT,
ARIANE_UART_REG_WIDTH,
ARIANE_UART_REG_OFFSET);
}
/*
@ -87,19 +93,6 @@ static int ariane_final_init(bool cold_boot)
return 0;
}
/*
* Initialize the ariane console.
*/
static int ariane_console_init(void)
{
return uart8250_init(ARIANE_UART_ADDR,
ARIANE_UART_FREQ,
ARIANE_UART_BAUDRATE,
ARIANE_UART_REG_SHIFT,
ARIANE_UART_REG_WIDTH,
ARIANE_UART_REG_OFFSET);
}
static int plic_ariane_warm_irqchip_init(int m_cntx_id, int s_cntx_id)
{
int ret;
@ -175,7 +168,6 @@ static int ariane_timer_init(bool cold_boot)
const struct sbi_platform_operations platform_ops = {
.early_init = ariane_early_init,
.final_init = ariane_final_init,
.console_init = ariane_console_init,
.irqchip_init = ariane_irqchip_init,
.ipi_init = ariane_ipi_init,
.timer_init = ariane_timer_init,

View File

@ -6,7 +6,6 @@
#include <sbi/riscv_asm.h>
#include <sbi/riscv_encoding.h>
#include <sbi/riscv_io.h>
#include <sbi/sbi_console.h>
#include <sbi/sbi_const.h>
#include <sbi/sbi_hart.h>
#include <sbi/sbi_platform.h>
@ -103,7 +102,10 @@ static int openpiton_early_init(bool cold_boot)
ACLINT_DEFAULT_MTIMECMP_OFFSET;
}
return 0;
return uart8250_init(uart.addr, uart.freq, uart.baud,
OPENPITON_DEFAULT_UART_REG_SHIFT,
OPENPITON_DEFAULT_UART_REG_WIDTH,
OPENPITON_DEFAULT_UART_REG_OFFSET);
}
/*
@ -122,19 +124,6 @@ static int openpiton_final_init(bool cold_boot)
return 0;
}
/*
* Initialize the openpiton console.
*/
static int openpiton_console_init(void)
{
return uart8250_init(uart.addr,
uart.freq,
uart.baud,
OPENPITON_DEFAULT_UART_REG_SHIFT,
OPENPITON_DEFAULT_UART_REG_WIDTH,
OPENPITON_DEFAULT_UART_REG_OFFSET);
}
static int plic_openpiton_warm_irqchip_init(int m_cntx_id, int s_cntx_id)
{
int ret;
@ -210,7 +199,6 @@ static int openpiton_timer_init(bool cold_boot)
const struct sbi_platform_operations platform_ops = {
.early_init = openpiton_early_init,
.final_init = openpiton_final_init,
.console_init = openpiton_console_init,
.irqchip_init = openpiton_irqchip_init,
.ipi_init = openpiton_ipi_init,
.timer_init = openpiton_timer_init,

View File

@ -221,9 +221,19 @@ static int generic_nascent_init(void)
static int generic_early_init(bool cold_boot)
{
if (cold_boot)
int rc;
if (cold_boot) {
fdt_reset_init();
if (semihosting_enabled())
rc = semihosting_init();
else
rc = fdt_serial_init();
if (rc)
return rc;
}
if (!generic_plat || !generic_plat->early_init)
return 0;
@ -378,14 +388,6 @@ static uint64_t generic_pmu_xlate_to_mhpmevent(uint32_t event_idx,
return evt_val;
}
static int generic_console_init(void)
{
if (semihosting_enabled())
return semihosting_init();
else
return fdt_serial_init();
}
const struct sbi_platform_operations platform_ops = {
.cold_boot_allowed = generic_cold_boot_allowed,
.nascent_init = generic_nascent_init,
@ -395,7 +397,6 @@ const struct sbi_platform_operations platform_ops = {
.final_exit = generic_final_exit,
.extensions_init = generic_extensions_init,
.domains_init = generic_domains_init,
.console_init = generic_console_init,
.irqchip_init = fdt_irqchip_init,
.irqchip_exit = fdt_irqchip_exit,
.ipi_init = fdt_ipi_init,

View File

@ -9,7 +9,6 @@
#include <sbi/riscv_asm.h>
#include <sbi/riscv_encoding.h>
#include <sbi/sbi_console.h>
#include <sbi/sbi_const.h>
#include <sbi/sbi_platform.h>
#include <sbi/sbi_system.h>
@ -109,10 +108,13 @@ static struct sbi_system_reset_device k210_reset = {
static int k210_early_init(bool cold_boot)
{
if (cold_boot)
if (!cold_boot)
return 0;
sbi_system_reset_add_device(&k210_reset);
return 0;
return sifive_uart_init(K210_UART_BASE_ADDR, k210_get_clk_freq(),
K210_UART_BAUDRATE);
}
static int k210_final_init(bool cold_boot)
@ -130,12 +132,6 @@ static int k210_final_init(bool cold_boot)
return 0;
}
static int k210_console_init(void)
{
return sifive_uart_init(K210_UART_BASE_ADDR, k210_get_clk_freq(),
K210_UART_BAUDRATE);
}
static int k210_irqchip_init(bool cold_boot)
{
int rc;
@ -181,8 +177,6 @@ const struct sbi_platform_operations platform_ops = {
.final_init = k210_final_init,
.console_init = k210_console_init,
.irqchip_init = k210_irqchip_init,
.ipi_init = k210_ipi_init,

View File

@ -11,7 +11,6 @@
#include <sbi/riscv_asm.h>
#include <sbi/riscv_io.h>
#include <sbi/riscv_encoding.h>
#include <sbi/sbi_console.h>
#include <sbi/sbi_const.h>
#include <sbi/sbi_platform.h>
#include <sbi/sbi_system.h>
@ -150,7 +149,9 @@ static int ux600_early_init(bool cold_boot)
{
u32 regval;
if (cold_boot)
if (!cold_boot)
return 0;
sbi_system_reset_add_device(&ux600_reset);
/* Measure CPU Frequency using Timer */
@ -163,7 +164,9 @@ static int ux600_early_init(bool cold_boot)
regval = readl((void *)(UX600_GPIO_ADDR + UX600_GPIO_IOF_EN_OFS)) |
UX600_GPIO_IOF_UART0_MASK;
writel(regval, (void *)(UX600_GPIO_ADDR + UX600_GPIO_IOF_EN_OFS));
return 0;
return sifive_uart_init(UX600_DEBUG_UART, ux600_clk_freq,
UX600_UART_BAUDRATE);
}
static void ux600_modify_dt(void *fdt)
@ -184,12 +187,6 @@ static int ux600_final_init(bool cold_boot)
return 0;
}
static int ux600_console_init(void)
{
return sifive_uart_init(UX600_DEBUG_UART, ux600_clk_freq,
UX600_UART_BAUDRATE);
}
static int ux600_irqchip_init(bool cold_boot)
{
int rc;
@ -234,7 +231,6 @@ static int ux600_timer_init(bool cold_boot)
const struct sbi_platform_operations platform_ops = {
.early_init = ux600_early_init,
.final_init = ux600_final_init,
.console_init = ux600_console_init,
.irqchip_init = ux600_irqchip_init,
.ipi_init = ux600_ipi_init,
.timer_init = ux600_timer_init,

View File

@ -64,7 +64,12 @@ static struct aclint_mtimer_data mtimer = {
*/
static int platform_early_init(bool cold_boot)
{
if (!cold_boot)
return 0;
/* Example if the generic UART8250 driver is used */
return uart8250_init(PLATFORM_UART_ADDR, PLATFORM_UART_INPUT_FREQ,
PLATFORM_UART_BAUDRATE, 0, 1, 0);
}
/*
@ -75,16 +80,6 @@ static int platform_final_init(bool cold_boot)
return 0;
}
/*
* Initialize the platform console.
*/
static int platform_console_init(void)
{
/* Example if the generic UART8250 driver is used */
return uart8250_init(PLATFORM_UART_ADDR, PLATFORM_UART_INPUT_FREQ,
PLATFORM_UART_BAUDRATE, 0, 1, 0);
}
/*
* Initialize the platform interrupt controller for current HART.
*/
@ -143,7 +138,6 @@ static int platform_timer_init(bool cold_boot)
const struct sbi_platform_operations platform_ops = {
.early_init = platform_early_init,
.final_init = platform_final_init,
.console_init = platform_console_init,
.irqchip_init = platform_irqchip_init,
.ipi_init = platform_ipi_init,
.timer_init = platform_timer_init