On latest Linux kernel (i.e. 5.2-rc1), we get large TLB flush
request for user space addresses (typically, start=x and end=-1).
This is caused by Linux kernel commit a21344dfc6 ("riscv: fix
sbi_remote_sfence_vma{,_asid}").
It's not practical to execute large number of sfence instructions
for a large TLB flush range because it takes too much time and
eventually causes CPU stall in Linux kernel.
This patch addresses above issue by upgrading TLB flush range to
TLB flush all whenever TLB flush range is greater than 1GB.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Noisy commit, no functional changes.
Generated with an current upstream clang-format and:
clang-format -i $(find . -name \*.[ch])
Signed-off-by: Olof Johansson <olof@lixom.net>
Simulatenous requests for tlbflush IPIs can have overlapping address
ranges.
Ignore if address range is same or within already existing fifo entries.
Update the tlb flush info in fifo directly if the one of the existing
entry lies within the new flush request.
Delete all entries if flush all request is recieved for the vma.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
This patch does following improvements to sbi_fifo:
1. Use valid SBI_Exxxx error codes instead of -1
2. The sbi_fifo_is_full() and sbi_fifo_is_empty() did
not acquire qlock before accessing head and tail
hence fixed it
3. Added avail member for ease in debugging and simplifying
head/tail updates.
Due to above changes size of sbi_fifo changes from 48 bytes
to 56 bytes.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Currently, there is no provision for tracking multiple IPIs sent
to a single hart at the same time by different harts.
Use a fifo manage the outstanding requests. While dequeueing, read all
the entries once, because we have only 1 bit to track the type of IPI.
Once the queue is full, busy wait until the there is space available in
queue. This is not the most elegant approach. It should be changed in
favor of a wakeup event once available in opensbi.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
The sbi_unpriv.h has quite a few load_xyz() and store_xyz() helper
routines based on RISC-V inline assembly for unpriviledged accesses
from M-mode. These helper routines are similar to helper routines
present in riscv_locks.h, riscv_io.h, and riscv_atomic.h so let's
rename sbi_unpriv.h to riscv_unpriv.h.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Currently, global page mappings are not flushed if start and size
arguments are zero.
Flush entire TLB if both size and start argument is passed as zero.
Fixes : 90cb491 (lib: Implement sfence.vma correctly)
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Currently, OpenSBI doesn't distinguish between sfence.vma
and sfence.vm asid calls. Moreover, it ignores the page
ranges and just flush entire TLB everytime.
Fix the sfence implementation by keeping all the tlb flush
info in scratch area.
The relevant Linux kernel code was added by
https://patchwork.kernel.org/project/linux-riscv/list/?series=89695
However, this patch is backward compatible with older version kernel
that doesn't have the above patches as well.
Fixes#87
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Create a sbi_ipi_data structure that holds unpacked IPI information. At
the same time remove ipi_type from the sbi_scratch struct and use a
fixed offset to access it.
This structure fits in behind the sbi_scratch structure.
This fixes https://github.com/riscv/opensbi/issues/81
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
The mask shift in for-loop of sbi_ipi_send_many() is
broken with commit 918c1354b7
("lib: Improve delivery of SBI_IPI_EVENT_HALT")
This patch fix it.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
When sbi_ipi_send_many gets called with the current hartid
included on pmask (or when pmask is NULL), and we send
a HALT event, since the for loop works sequentially over
all hartids on the mask, we may send a HALT event to the
current hart before the loop finishes. So we will halt
the current hart before it can deliver a HALT IPI to the
rest and some harts will remain active.
Make sure we send an IPI to the current hart after we've
finished with everybody else.
Signed-off-by: Nick Kossifidis <mick@ics.forth.gr>
Some older toolchains may not have all the csr's defined. Update all
the csr functions to use the CSR_ #define values instead of the
toolchain defined values.
Suggested-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
This patch updates copyright header in all files as follows:
1. Makes "SPDX-License-Identifier: BSD-2-Clause" as first line
2. Change copyright year to 2019 for Western Digital
Signed-off-by: Anup Patel <anup.patel@wdc.com>
For better naming, we rename ipi_inject() to ipi_send() in
struct sbi_platform. We also replace term "inject" with
"send" in all related places.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
The source_hart and hartid parameter is really not required in
IPI callbacks of sbi_platform because current hartid can always
be obtained by calling sbi_current_hartid() API.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
S-mode software may send IPI to self. For example,
tlbflush may be executed for the same hart.
Let the hart send IPI to itself. It's an overhead
but doesn't break anything. However, if we don't
allow it, it breaks if S-mode keep sending IPIs.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
IPIs are updated in scratch space by source hart.
However, different harts or same hart may want to
send different IPIs before previous IPI was read
by the target hart. Currently, previous IPI type
is overwritten in that case.
Use atomic bit set/clear operations to update IPIs.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Instead of having separate ipi_init() hooks for cold and warm boot,
this patch updates struct sbi_platform to have just one ipi_init()
hook. The type of boot (cold or warm) is now a boolean flag parameter
for the updated ipi_init() hook.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
As of now, uboot doesn't have support for SMP.
Moreover, unleashed board has a E51 hart which
doesn't not support S mode.
We should only boot only 1 non-zero hart.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Anup Patel