opensbi/include
Eric Lin a2807646a8 include: Adjust Sscofpmf mhpmevent mask for upper 6 bits
Currently, OpenSBI reserves the upper 16 bits in mhpmevent for
the Sscofpmf extension.

However, according to the Sscofpmf extension specification [1],
it only defines the upper 6 bits in mhpmevent for privilege mode
inhibit and counter overflow disable. Other bits are defined by
the platform for event selection.

Since vendors might define raw event encoding exceeding 48 bits in
mhpmevent, we should adjust the MHPMEVENT_SSCOF_MASK to support it.

Link: https://github.com/riscv/riscv-isa-manual [1]
Signed-off-by: Eric Lin <eric.lin@sifive.com>
Reviewed-By: Xiang W <wxjstz@126.com>
Reviewed-By: Anup Patel <anup@brainfault.org>
2024-08-01 20:13:18 +05:30
..
sbi include: Adjust Sscofpmf mhpmevent mask for upper 6 bits 2024-08-01 20:13:18 +05:30
sbi_utils lib: utils/timer: mtimer: only use regname for aclint 2023-12-27 11:57:33 +05:30