278 lines
6.3 KiB
C
278 lines
6.3 KiB
C
/*
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2021 YADRO
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*
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* Authors:
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* Nikita Shubin <n.shubin@yadro.com>
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*/
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#include <sbi/riscv_io.h>
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#include <sbi/sbi_error.h>
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#include <sbi/sbi_timer.h>
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#include <sbi_utils/fdt/fdt_helper.h>
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#include <sbi_utils/i2c/fdt_i2c.h>
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#define SIFIVE_I2C_ADAPTER_MAX 2
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#define SIFIVE_I2C_PRELO 0x00
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#define SIFIVE_I2C_PREHI 0x04
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#define SIFIVE_I2C_CTR 0x08
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#define SIFIVE_I2C_TXR 0x00c
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#define SIFIVE_I2C_RXR SIFIVE_I2C_TXR
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#define SIFIVE_I2C_CR 0x010
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#define SIFIVE_I2C_SR SIFIVE_I2C_CR
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#define SIFIVE_I2C_CTR_IEN (1 << 6)
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#define SIFIVE_I2C_CTR_EN (1 << 7)
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#define SIFIVE_I2C_CMD_IACK (1 << 0)
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#define SIFIVE_I2C_CMD_ACK (1 << 3)
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#define SIFIVE_I2C_CMD_WR (1 << 4)
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#define SIFIVE_I2C_CMD_RD (1 << 5)
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#define SIFIVE_I2C_CMD_STO (1 << 6)
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#define SIFIVE_I2C_CMD_STA (1 << 7)
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#define SIFIVE_I2C_STATUS_IF (1 << 0)
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#define SIFIVE_I2C_STATUS_TIP (1 << 1)
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#define SIFIVE_I2C_STATUS_AL (1 << 5)
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#define SIFIVE_I2C_STATUS_BUSY (1 << 6)
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#define SIFIVE_I2C_STATUS_RXACK (1 << 7)
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#define SIFIVE_I2C_WRITE_BIT (0 << 0)
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#define SIFIVE_I2C_READ_BIT (1 << 0)
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struct sifive_i2c_adapter {
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unsigned long addr;
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struct i2c_adapter adapter;
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};
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static unsigned int sifive_i2c_adapter_count;
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static struct sifive_i2c_adapter
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sifive_i2c_adapter_array[SIFIVE_I2C_ADAPTER_MAX];
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extern struct fdt_i2c_adapter fdt_i2c_adapter_sifive;
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static inline void sifive_i2c_setreg(struct sifive_i2c_adapter *adap,
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uint8_t reg, uint8_t value)
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{
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writel(value, (volatile char *)adap->addr + reg);
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}
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static inline uint8_t sifive_i2c_getreg(struct sifive_i2c_adapter *adap,
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uint8_t reg)
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{
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return readl((volatile char *)adap->addr + reg);
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}
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static int sifive_i2c_adapter_rxack(struct sifive_i2c_adapter *adap)
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{
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uint8_t val = sifive_i2c_getreg(adap, SIFIVE_I2C_SR);
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if (val & SIFIVE_I2C_STATUS_RXACK)
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return SBI_EIO;
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return 0;
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}
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static int sifive_i2c_adapter_poll(struct sifive_i2c_adapter *adap,
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uint32_t mask)
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{
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unsigned int timeout = 1; // [msec]
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int count = 0;
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uint8_t val;
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sbi_timer_udelay(80); // worst case if bus speed is 100 kHz
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do {
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val = sifive_i2c_getreg(adap, SIFIVE_I2C_SR);
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if (!(val & mask))
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return 0;
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sbi_timer_udelay(1);
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count += 1;
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if (count == (timeout * 1000))
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return SBI_ETIMEDOUT;
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} while (1);
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}
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#define sifive_i2c_adapter_poll_tip(adap) \
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sifive_i2c_adapter_poll(adap, SIFIVE_I2C_STATUS_TIP)
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#define sifive_i2c_adapter_poll_busy(adap) \
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sifive_i2c_adapter_poll(adap, SIFIVE_I2C_STATUS_BUSY)
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static int sifive_i2c_adapter_start(struct sifive_i2c_adapter *adap,
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uint8_t addr, uint8_t bit)
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{
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uint8_t val = (addr << 1) | bit;
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sifive_i2c_setreg(adap, SIFIVE_I2C_TXR, val);
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val = SIFIVE_I2C_CMD_STA | SIFIVE_I2C_CMD_WR | SIFIVE_I2C_CMD_IACK;
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sifive_i2c_setreg(adap, SIFIVE_I2C_CR, val);
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return sifive_i2c_adapter_poll_tip(adap);
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}
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static int sifive_i2c_adapter_write(struct i2c_adapter *ia, uint8_t addr,
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uint8_t reg, uint8_t *buffer, int len)
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{
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struct sifive_i2c_adapter *adap =
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container_of(ia, struct sifive_i2c_adapter, adapter);
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int rc = sifive_i2c_adapter_start(adap, addr, SIFIVE_I2C_WRITE_BIT);
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if (rc)
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return rc;
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rc = sifive_i2c_adapter_rxack(adap);
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if (rc)
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return rc;
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/* set register address */
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sifive_i2c_setreg(adap, SIFIVE_I2C_TXR, reg);
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sifive_i2c_setreg(adap, SIFIVE_I2C_CR, SIFIVE_I2C_CMD_WR |
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SIFIVE_I2C_CMD_IACK);
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rc = sifive_i2c_adapter_poll_tip(adap);
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if (rc)
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return rc;
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rc = sifive_i2c_adapter_rxack(adap);
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if (rc)
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return rc;
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/* set value */
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while (len) {
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sifive_i2c_setreg(adap, SIFIVE_I2C_TXR, *buffer);
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sifive_i2c_setreg(adap, SIFIVE_I2C_CR, SIFIVE_I2C_CMD_WR |
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SIFIVE_I2C_CMD_IACK);
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rc = sifive_i2c_adapter_poll_tip(adap);
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if (rc)
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return rc;
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rc = sifive_i2c_adapter_rxack(adap);
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if (rc)
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return rc;
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buffer++;
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len--;
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}
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sifive_i2c_setreg(adap, SIFIVE_I2C_CR, SIFIVE_I2C_CMD_STO |
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SIFIVE_I2C_CMD_IACK);
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/* poll BUSY instead of ACK*/
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rc = sifive_i2c_adapter_poll_busy(adap);
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if (rc)
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return rc;
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sifive_i2c_setreg(adap, SIFIVE_I2C_CR, SIFIVE_I2C_CMD_IACK);
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return 0;
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}
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static int sifive_i2c_adapter_read(struct i2c_adapter *ia, uint8_t addr,
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uint8_t reg, uint8_t *buffer, int len)
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{
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struct sifive_i2c_adapter *adap =
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container_of(ia, struct sifive_i2c_adapter, adapter);
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int rc;
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rc = sifive_i2c_adapter_start(adap, addr, SIFIVE_I2C_WRITE_BIT);
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if (rc)
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return rc;
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rc = sifive_i2c_adapter_rxack(adap);
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if (rc)
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return rc;
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sifive_i2c_setreg(adap, SIFIVE_I2C_TXR, reg);
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sifive_i2c_setreg(adap, SIFIVE_I2C_CR, SIFIVE_I2C_CMD_WR |
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SIFIVE_I2C_CMD_IACK);
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rc = sifive_i2c_adapter_poll_tip(adap);
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if (rc)
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return rc;
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rc = sifive_i2c_adapter_rxack(adap);
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if (rc)
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return rc;
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/* setting addr with high 0 bit */
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rc = sifive_i2c_adapter_start(adap, addr, SIFIVE_I2C_READ_BIT);
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if (rc)
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return rc;
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rc = sifive_i2c_adapter_rxack(adap);
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if (rc)
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return rc;
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while (len) {
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if (len == 1)
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sifive_i2c_setreg(adap, SIFIVE_I2C_CR,
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SIFIVE_I2C_CMD_ACK |
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SIFIVE_I2C_CMD_RD |
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SIFIVE_I2C_CMD_IACK);
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else
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sifive_i2c_setreg(adap, SIFIVE_I2C_CR,
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SIFIVE_I2C_CMD_RD |
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SIFIVE_I2C_CMD_IACK);
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rc = sifive_i2c_adapter_poll_tip(adap);
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if (rc)
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return rc;
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*buffer = sifive_i2c_getreg(adap, SIFIVE_I2C_RXR);
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buffer++;
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len--;
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}
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sifive_i2c_setreg(adap, SIFIVE_I2C_CR, SIFIVE_I2C_CMD_STO |
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SIFIVE_I2C_CMD_IACK);
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rc = sifive_i2c_adapter_poll_busy(adap);
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if (rc)
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return rc;
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sifive_i2c_setreg(adap, SIFIVE_I2C_CR, SIFIVE_I2C_CMD_IACK);
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return 0;
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}
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static int sifive_i2c_init(void *fdt, int nodeoff,
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const struct fdt_match *match)
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{
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int rc;
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struct sifive_i2c_adapter *adapter;
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uint64_t addr;
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if (sifive_i2c_adapter_count >= SIFIVE_I2C_ADAPTER_MAX)
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return SBI_ENOSPC;
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adapter = &sifive_i2c_adapter_array[sifive_i2c_adapter_count];
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rc = fdt_get_node_addr_size(fdt, nodeoff, 0, &addr, NULL);
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if (rc)
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return rc;
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adapter->addr = addr;
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adapter->adapter.driver = &fdt_i2c_adapter_sifive;
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adapter->adapter.id = nodeoff;
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adapter->adapter.write = sifive_i2c_adapter_write;
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adapter->adapter.read = sifive_i2c_adapter_read;
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rc = i2c_adapter_add(&adapter->adapter);
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if (rc)
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return rc;
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sifive_i2c_adapter_count++;
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return 0;
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}
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static const struct fdt_match sifive_i2c_match[] = {
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{ .compatible = "sifive,i2c0" },
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{ },
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};
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struct fdt_i2c_adapter fdt_i2c_adapter_sifive = {
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.match_table = sifive_i2c_match,
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.init = sifive_i2c_init,
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};
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