163 lines
3.4 KiB
C
163 lines
3.4 KiB
C
/*
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2019 Western Digital Corporation or its affiliates.
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*
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* Authors:
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* Anup Patel <anup.patel@wdc.com>
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*/
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#include <sbi/riscv_io.h>
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#include <sbi/riscv_atomic.h>
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#include <sbi/sbi_hart.h>
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#include <sbi_utils/sys/clint.h>
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static u32 clint_ipi_hart_count;
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static volatile void *clint_ipi_base;
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static volatile u32 *clint_ipi;
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void clint_ipi_send(u32 target_hart)
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{
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if (clint_ipi_hart_count <= target_hart)
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return;
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/* Set CLINT IPI */
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writel(1, &clint_ipi[target_hart]);
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}
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void clint_ipi_sync(u32 target_hart)
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{
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u32 target_ipi, incoming_ipi;
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u32 source_hart = sbi_current_hartid();
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if (clint_ipi_hart_count <= target_hart)
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return;
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/* Wait until target HART has handled IPI */
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incoming_ipi = 0;
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while (1) {
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target_ipi = readl(&clint_ipi[target_hart]);
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if (!target_ipi)
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break;
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incoming_ipi |=
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atomic_raw_xchg_uint(&clint_ipi[source_hart], 0);
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}
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if (incoming_ipi)
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writel(incoming_ipi, &clint_ipi[source_hart]);
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}
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void clint_ipi_clear(u32 target_hart)
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{
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if (clint_ipi_hart_count <= target_hart)
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return;
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/* Clear CLINT IPI */
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writel(0, &clint_ipi[target_hart]);
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}
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int clint_warm_ipi_init(void)
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{
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u32 hartid = sbi_current_hartid();
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if (!clint_ipi_base)
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return -1;
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/* Clear CLINT IPI */
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clint_ipi_clear(hartid);
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return 0;
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}
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int clint_cold_ipi_init(unsigned long base, u32 hart_count)
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{
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/* Figure-out CLINT IPI register address */
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clint_ipi_hart_count = hart_count;
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clint_ipi_base = (void *)base;
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clint_ipi = (u32 *)clint_ipi_base;
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return 0;
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}
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static u32 clint_time_hart_count;
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static volatile void *clint_time_base;
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static volatile u64 *clint_time_val;
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static volatile u64 *clint_time_cmp;
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u64 clint_timer_value(void)
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{
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#if __riscv_xlen == 64
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return readq_relaxed(clint_time_val);
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#else
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u64 tmp;
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tmp = readl_relaxed((void *)clint_time_val + 0x04);
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tmp <<= 32;
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tmp |= readl_relaxed(clint_time_val);
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return tmp;
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#endif
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}
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void clint_timer_event_stop(void)
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{
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u32 target_hart = sbi_current_hartid();
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if (clint_time_hart_count <= target_hart)
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return;
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/* Clear CLINT Time Compare */
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#if __riscv_xlen == 64
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writeq_relaxed(-1ULL, &clint_time_cmp[target_hart]);
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#else
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writel_relaxed(-1UL, &clint_time_cmp[target_hart]);
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writel_relaxed(-1UL, (void *)(&clint_time_cmp[target_hart]) + 0x04);
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#endif
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}
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void clint_timer_event_start(u64 next_event)
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{
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u32 target_hart = sbi_current_hartid();
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if (clint_time_hart_count <= target_hart)
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return;
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/* Program CLINT Time Compare */
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#if __riscv_xlen == 64
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writeq_relaxed(next_event, &clint_time_cmp[target_hart]);
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#else
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u32 mask = -1UL;
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writel_relaxed(next_event & mask, &clint_time_cmp[target_hart]);
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writel_relaxed(next_event >> 32,
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(void *)(&clint_time_cmp[target_hart]) + 0x04);
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#endif
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}
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int clint_warm_timer_init(void)
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{
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u32 target_hart = sbi_current_hartid();
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if (clint_time_hart_count <= target_hart || !clint_time_base)
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return -1;
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/* Clear CLINT Time Compare */
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#if __riscv_xlen == 64
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writeq_relaxed(-1ULL, &clint_time_cmp[target_hart]);
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#else
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writel_relaxed(-1UL, &clint_time_cmp[target_hart]);
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writel_relaxed(-1UL, (void *)(&clint_time_cmp[target_hart]) + 0x04);
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#endif
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return 0;
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}
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int clint_cold_timer_init(unsigned long base, u32 hart_count)
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{
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/* Figure-out CLINT Time register address */
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clint_time_hart_count = hart_count;
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clint_time_base = (void *)base;
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clint_time_val = (u64 *)(clint_time_base + 0xbff8);
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clint_time_cmp = (u64 *)(clint_time_base + 0x4000);
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return 0;
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}
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