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			85 lines
		
	
	
		
			2.7 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			85 lines
		
	
	
		
			2.7 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| // Definitions for X86 IO port access.
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| //
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| // Copyright (C) 2008  Kevin O'Connor <kevin@koconnor.net>
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| //
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| // This file may be distributed under the terms of the GNU LGPLv3 license.
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| //
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| // This file copied (somewhat) intact from SeaBIOS.
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| 
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| #ifndef IOPORT_H
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| #define IOPORT_H
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| 
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| #define PORT_DMA_ADDR_2        0x0004
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| #define PORT_DMA_CNT_2         0x0005
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| #define PORT_DMA1_MASK_REG     0x000a
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| #define PORT_DMA1_MODE_REG     0x000b
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| #define PORT_DMA1_CLEAR_FF_REG 0x000c
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| #define PORT_DMA1_MASTER_CLEAR 0x000d
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| #define PORT_PIC1_CMD          0x0020
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| #define PORT_PIC1_DATA         0x0021
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| #define PORT_PIT_COUNTER0      0x0040
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| #define PORT_PIT_COUNTER1      0x0041
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| #define PORT_PIT_COUNTER2      0x0042
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| #define PORT_PIT_MODE          0x0043
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| #define PORT_PS2_DATA          0x0060
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| #define PORT_PS2_CTRLB         0x0061
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| #define PORT_PS2_STATUS        0x0064
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| #define PORT_CMOS_INDEX        0x0070
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| #define PORT_CMOS_DATA         0x0071
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| #define PORT_DIAG              0x0080
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| #define PORT_DMA_PAGE_2        0x0081
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| #define PORT_A20               0x0092
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| #define PORT_PIC2_CMD          0x00a0
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| #define PORT_PIC2_DATA         0x00a1
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| #define PORT_SMI_CMD           0x00b2
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| #define PORT_SMI_STATUS        0x00b3
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| #define PORT_DMA2_MASK_REG     0x00d4
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| #define PORT_DMA2_MODE_REG     0x00d6
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| #define PORT_DMA2_MASTER_CLEAR 0x00da
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| #define PORT_MATH_CLEAR        0x00f0
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| #define PORT_ATA2_CMD_BASE     0x0170
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| #define PORT_ATA1_CMD_BASE     0x01f0
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| #define PORT_LPT2              0x0278
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| #define PORT_SERIAL4           0x02e8
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| #define PORT_SERIAL2           0x02f8
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| #define PORT_ATA2_CTRL_BASE    0x0374
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| #define PORT_LPT1              0x0378
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| #define PORT_SERIAL3           0x03e8
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| #define PORT_ATA1_CTRL_BASE    0x03f4
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| #define PORT_FD_BASE           0x03f0
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| #define PORT_FD_DOR            0x03f2
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| #define PORT_FD_STATUS         0x03f4
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| #define PORT_FD_DATA           0x03f5
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| #define PORT_HD_DATA           0x03f6
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| #define PORT_FD_DIR            0x03f7
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| #define PORT_SERIAL1           0x03f8
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| #define PORT_PIC1_ELCR         0x04d0
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| #define PORT_PIC2_ELCR         0x04d1
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| #define PORT_PCI_CMD           0x0cf8
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| #define PORT_PCI_REBOOT        0x0cf9
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| #define PORT_PCI_DATA          0x0cfc
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| #define PORT_BIOS_DEBUG        0x0402
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| #define PORT_QEMU_CFG_CTL      0x0510
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| #define PORT_QEMU_CFG_DATA     0x0511
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| #define PORT_ACPI_PM_BASE      0xb000
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| #define PORT_SMB_BASE          0xb100
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| #define PORT_BIOS_APM          0x8900
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| 
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| // Serial port offsets
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| #define SEROFF_DATA    0
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| #define SEROFF_DLL     0
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| #define SEROFF_IER     1
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| #define SEROFF_DLH     1
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| #define SEROFF_IIR     2
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| #define SEROFF_LCR     3
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| #define SEROFF_LSR     5
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| #define SEROFF_MSR     6
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| 
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| // PORT_A20 bitdefs
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| #define A20_ENABLE_BIT 0x02
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| 
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| // PORT_CMOS_INDEX nmi disable bit
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| #define NMI_DISABLE_BIT 0x80
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| 
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| #endif // ioport.h
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