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158 lines
3.6 KiB
C
158 lines
3.6 KiB
C
/* Common definitions for QEMU Emulation PALcode
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Copyright (C) 2011 Richard Henderson
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This file is part of QEMU PALcode.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the text
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of the GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; see the file COPYING. If not see
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<http://www.gnu.org/licenses/>. */
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#ifndef PAL_H
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#define PAL_H 1
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/* General Purpose Registers. */
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#define v0 $0
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#define t0 $1
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#define t1 $2
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#define t2 $3
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#define t3 $4
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#define t4 $5
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#define t5 $6
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#define a0 $16
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#define a1 $17
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#define a2 $18
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#define a3 $19
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#define a4 $20
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#define a5 $21
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#define t8 $22
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#define t9 $23
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#define t10 $24
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/* PALcode Shadow Registers. These registers are swapped out when
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QEMU is in PALmode. Unlike real hardware, there is no enable bit.
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However, also unlike real hardware, the originals can be accessed
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via MTPR/MFPR. */
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#define p0 $8
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#define p1 $9
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#define p2 $10
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#define p3 $11
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#define p4 $12
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#define p5 $13
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#define p6 $14 // Used to save exc_addr for machine check
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#define p7 $25
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/* QEMU Processor Registers. */
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#define qemu_ps 0
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#define qemu_fen 1
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#define qemu_pcc_ofs 2
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#define qemu_trap_arg0 3
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#define qemu_trap_arg1 4
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#define qemu_trap_arg2 5
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#define qemu_exc_addr 6
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#define qemu_palbr 7
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#define qemu_ptbr 8
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#define qemu_vptptr 9
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#define qemu_unique 10
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#define qemu_sysval 11
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#define qemu_usp 12
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#define qemu_shadow0 32
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#define qemu_shadow1 33
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#define qemu_shadow2 34
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#define qemu_shadow3 35
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#define qemu_shadow4 36
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#define qemu_shadow5 37
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#define qemu_shadow6 38
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#define qemu_shadow7 39
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/* PALcode Processor Register Private Storage. */
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#define pt0 40
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#define pt1 41
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#define pt2 42
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#define pt3 43
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#define pt4 44
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#define pt5 45
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#define pt6 46
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#define pt7 47
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#define pt8 48
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#define pt9 49
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#define pt10 50
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#define pt11 51
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#define pt12 52
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#define pt13 53
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#define pt14 54
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#define pt15 55
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#define pt16 56
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#define pt17 57
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#define pt18 58
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#define pt19 59
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#define pt20 60
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#define pt21 61
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#define pt22 62
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#define pt23 63
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/* QEMU function calls, via mtpr. */
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#define qemu_tbia 255
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#define qemu_tbis 254
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#define qemu_wait 253
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#define qemu_halt 252
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#define qemu_alarm 251
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#define qemu_walltime 250
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#define qemu_vmtime 249
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/* PALcode uses of the private storage slots. */
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#define ptEntUna pt0
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#define ptEntIF pt1
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#define ptEntSys pt2
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#define ptEntInt pt3
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#define ptEntArith pt4
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#define ptEntMM pt5
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#define ptMces pt6
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#define ptKsp pt7
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#define ptKgp pt8
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#define ptPcbb pt9
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#define ptPgp pt10
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#define ptMisc pt11
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#define ptMchk0 pt12
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#define ptMchk1 pt13
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#define ptMchk2 pt14
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#define ptMchk3 pt15
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#define ptMchk4 pt16
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#define ptMchk5 pt17
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#define ptSys0 pt18
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#define ptSys1 pt19
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/*
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* Shortcuts for various PALmode instructions.
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*/
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#define mtpr hw_mtpr
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#define mfpr hw_mfpr
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#define stq_p hw_stq/p
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#define stl_p hw_stl/p
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#define ldl_p hw_ldl/p
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#define ldq_p hw_ldq/p
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/* QEMU recognizes the EV4/EV5 HW_REI instruction as a special case of
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the EV6 HW_RET instruction. This pulls the destination address from
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the EXC_ADDR processor register. */
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#define hw_rei hw_ret ($31)
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.macro ENDFN function
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.type \function, @function
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.size \function, . - \function
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.endm
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#endif /* PAL_H */
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