2020-02-21 15:35:08 +01:00
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/*
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2022-01-26 10:59:30 +00:00
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* Copyright (C) 2020-2022 Intel Corporation
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2020-02-21 15:35:08 +01:00
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*
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* SPDX-License-Identifier: MIT
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*
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*/
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2020-02-23 22:44:01 +01:00
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#include "shared/source/command_container/command_encoder.h"
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2022-01-12 16:57:42 +00:00
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#include "shared/source/command_stream/linear_stream.h"
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2022-01-26 10:59:30 +00:00
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#include "shared/source/memory_manager/graphics_allocation.h"
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2021-01-21 13:10:13 +01:00
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#include "shared/test/common/helpers/default_hw_info.h"
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2021-04-13 14:00:07 +02:00
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#include "shared/test/common/helpers/unit_test_helper.h"
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2021-12-14 17:40:08 +00:00
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#include "shared/test/common/test_macros/test.h"
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2020-02-23 09:03:33 +01:00
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2020-02-21 15:35:08 +01:00
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using namespace NEO;
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2020-07-23 09:43:52 +02:00
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using CommandEncoderTests = ::testing::Test;
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2020-02-21 15:35:08 +01:00
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HWTEST_F(CommandEncoderTests, givenImmDataWriteWhenProgrammingMiFlushDwThenSetAllRequiredFields) {
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using MI_FLUSH_DW = typename FamilyType::MI_FLUSH_DW;
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uint8_t buffer[2 * sizeof(MI_FLUSH_DW)] = {};
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LinearStream linearStream(buffer, sizeof(buffer));
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uint64_t gpuAddress = 0x1230000;
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uint64_t immData = 456;
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2021-06-17 11:55:28 +00:00
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MiFlushArgs args;
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args.commandWithPostSync = true;
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2021-12-21 18:13:53 +00:00
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EncodeMiFlushDW<FamilyType>::programMiFlushDw(linearStream, gpuAddress, immData, args, *defaultHwInfo);
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2020-02-21 15:35:08 +01:00
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auto miFlushDwCmd = reinterpret_cast<MI_FLUSH_DW *>(buffer);
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2020-03-12 10:49:20 +01:00
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unsigned int sizeMultiplier = 1;
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if (UnitTestHelper<FamilyType>::additionalMiFlushDwRequired) {
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sizeMultiplier = 2;
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uint64_t gpuAddress = 0x0;
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uint64_t immData = 0;
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EXPECT_EQ(MI_FLUSH_DW::POST_SYNC_OPERATION_NO_WRITE, miFlushDwCmd->getPostSyncOperation());
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EXPECT_EQ(gpuAddress, miFlushDwCmd->getDestinationAddress());
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EXPECT_EQ(immData, miFlushDwCmd->getImmediateData());
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miFlushDwCmd++;
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}
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EXPECT_EQ(sizeMultiplier * sizeof(MI_FLUSH_DW), linearStream.getUsed());
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2020-02-21 15:35:08 +01:00
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EXPECT_EQ(MI_FLUSH_DW::POST_SYNC_OPERATION_WRITE_IMMEDIATE_DATA_QWORD, miFlushDwCmd->getPostSyncOperation());
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EXPECT_EQ(gpuAddress, miFlushDwCmd->getDestinationAddress());
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EXPECT_EQ(immData, miFlushDwCmd->getImmediateData());
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2021-06-17 11:55:28 +00:00
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EXPECT_EQ(0u, static_cast<uint32_t>(miFlushDwCmd->getNotifyEnable()));
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2020-02-21 15:35:08 +01:00
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}
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2020-04-03 17:38:09 +02:00
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HWTEST_F(CommandEncoderTests, whenEncodeMemoryPrefetchCalledThenDoNothing) {
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uint8_t buffer[MemoryConstants::pageSize] = {};
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LinearStream linearStream(buffer, sizeof(buffer));
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2022-02-04 13:59:01 +00:00
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GraphicsAllocation allocation(0, AllocationType::UNKNOWN, nullptr, 123, 456, 789, MemoryPool::LocalMemory);
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2020-04-08 17:44:12 +02:00
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2021-03-24 12:02:04 +00:00
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EncodeMemoryPrefetch<FamilyType>::programMemoryPrefetch(linearStream, allocation, 2, 0, *defaultHwInfo);
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2020-04-03 17:38:09 +02:00
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EXPECT_EQ(0u, linearStream.getUsed());
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2021-03-24 12:02:04 +00:00
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EXPECT_EQ(0u, EncodeMemoryPrefetch<FamilyType>::getSizeForMemoryPrefetch(2));
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2020-04-03 17:38:09 +02:00
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}
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2020-06-05 16:12:49 +02:00
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HWCMDTEST_F(IGFX_GEN8_CORE, CommandEncoderTests, WhenAnyParameterIsProvidedThenRuntimeGenerationLocalIdsIsRequired) {
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uint32_t workDim = 1;
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uint32_t simd = 8;
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size_t lws[3] = {16, 1, 1};
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std::array<uint8_t, 3> walkOrder = {};
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uint32_t requiredWalkOrder = 0u;
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EXPECT_TRUE(EncodeDispatchKernel<FamilyType>::isRuntimeLocalIdsGenerationRequired(
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workDim, lws, walkOrder, true, requiredWalkOrder, simd));
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}
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2021-06-17 11:55:28 +00:00
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HWTEST_F(CommandEncoderTests, givenNotify) {
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using MI_FLUSH_DW = typename FamilyType::MI_FLUSH_DW;
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uint8_t buffer[2 * sizeof(MI_FLUSH_DW)] = {};
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LinearStream linearStream(buffer, sizeof(buffer));
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uint64_t gpuAddress = 0x1230000;
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uint64_t immData = 456;
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MiFlushArgs args;
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args.commandWithPostSync = true;
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args.notifyEnable = true;
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2021-12-21 18:13:53 +00:00
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EncodeMiFlushDW<FamilyType>::programMiFlushDw(linearStream, gpuAddress, immData, args, *defaultHwInfo);
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2021-06-17 11:55:28 +00:00
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auto miFlushDwCmd = reinterpret_cast<MI_FLUSH_DW *>(buffer);
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unsigned int sizeMultiplier = 1;
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if (UnitTestHelper<FamilyType>::additionalMiFlushDwRequired) {
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sizeMultiplier = 2;
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uint64_t gpuAddress = 0x0;
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uint64_t immData = 0;
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EXPECT_EQ(MI_FLUSH_DW::POST_SYNC_OPERATION_NO_WRITE, miFlushDwCmd->getPostSyncOperation());
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EXPECT_EQ(gpuAddress, miFlushDwCmd->getDestinationAddress());
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EXPECT_EQ(immData, miFlushDwCmd->getImmediateData());
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miFlushDwCmd++;
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}
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EXPECT_EQ(sizeMultiplier * sizeof(MI_FLUSH_DW), linearStream.getUsed());
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EXPECT_EQ(MI_FLUSH_DW::POST_SYNC_OPERATION_WRITE_IMMEDIATE_DATA_QWORD, miFlushDwCmd->getPostSyncOperation());
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EXPECT_EQ(gpuAddress, miFlushDwCmd->getDestinationAddress());
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EXPECT_EQ(immData, miFlushDwCmd->getImmediateData());
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EXPECT_EQ(1u, static_cast<uint32_t>(miFlushDwCmd->getNotifyEnable()));
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}
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2021-06-23 15:26:56 +00:00
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HWCMDTEST_F(IGFX_GEN8_CORE, CommandEncoderTests, whenAppendParamsForImageFromBufferThenNothingChanges) {
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auto surfaceState = FamilyType::cmdInitRenderSurfaceState;
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auto expectedState = surfaceState;
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EXPECT_EQ(0, memcmp(&expectedState, &surfaceState, sizeof(surfaceState)));
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EncodeSurfaceState<FamilyType>::appendParamsForImageFromBuffer(&surfaceState);
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EXPECT_EQ(0, memcmp(&expectedState, &surfaceState, sizeof(surfaceState)));
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}
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