2020-01-17 08:56:05 +01:00
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/*
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2023-01-19 12:26:21 +00:00
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* Copyright (C) 2020-2023 Intel Corporation
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2020-01-17 08:56:05 +01:00
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*
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* SPDX-License-Identifier: MIT
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*
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*/
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#pragma once
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2020-02-23 22:44:01 +01:00
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#include "shared/source/command_container/command_encoder.h"
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#include "shared/source/command_stream/linear_stream.h"
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2022-09-07 14:27:09 +00:00
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#include "shared/source/debugger/debugger_l0.h"
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2020-02-23 22:44:01 +01:00
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#include "shared/source/device/device.h"
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#include "shared/source/execution_environment/execution_environment.h"
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2022-12-15 17:32:03 +00:00
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#include "shared/source/execution_environment/root_device_environment.h"
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2020-06-23 12:03:43 +02:00
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#include "shared/source/gmm_helper/gmm_helper.h"
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2020-11-26 09:04:26 +00:00
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#include "shared/source/helpers/api_specific_config.h"
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#include "shared/source/helpers/bindless_heaps_helper.h"
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2023-02-28 21:08:09 +00:00
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#include "shared/source/helpers/blit_commands_helper.h"
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2023-03-06 12:42:09 +00:00
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#include "shared/source/helpers/definitions/command_encoder_args.h"
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2023-02-01 16:23:01 +00:00
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#include "shared/source/helpers/gfx_core_helper.h"
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2020-10-07 14:22:26 +02:00
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#include "shared/source/helpers/local_id_gen.h"
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2020-02-23 22:44:01 +01:00
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#include "shared/source/helpers/preamble.h"
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#include "shared/source/helpers/register_offsets.h"
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#include "shared/source/helpers/simd_helper.h"
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#include "shared/source/helpers/string.h"
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2021-01-29 10:17:10 +00:00
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#include "shared/source/image/image_surface_state.h"
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2022-01-26 10:59:30 +00:00
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#include "shared/source/indirect_heap/indirect_heap.h"
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2020-02-23 22:44:01 +01:00
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#include "shared/source/kernel/dispatch_kernel_encoder_interface.h"
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2023-12-15 14:36:11 +00:00
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#include "shared/source/kernel/implicit_args_helper.h"
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2020-10-07 14:22:26 +02:00
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#include "shared/source/kernel/kernel_descriptor.h"
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2023-03-10 12:28:11 +00:00
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#include "shared/source/os_interface/product_helper.h"
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2022-09-26 22:28:10 +00:00
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#include "shared/source/program/kernel_info.h"
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2020-01-17 08:56:05 +01:00
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2021-10-21 01:30:53 +00:00
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#include "encode_surface_state.inl"
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2022-12-29 12:27:52 +00:00
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#include "encode_surface_state_args.h"
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2021-10-21 01:30:53 +00:00
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2020-01-17 08:56:05 +01:00
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#include <algorithm>
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namespace NEO {
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template <typename Family>
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uint32_t EncodeStates<Family>::copySamplerState(IndirectHeap *dsh,
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uint32_t samplerStateOffset,
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uint32_t samplerCount,
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uint32_t borderColorOffset,
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2020-11-26 09:04:26 +00:00
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const void *fnDynamicStateHeap,
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2021-08-25 10:28:05 +00:00
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BindlessHeapsHelper *bindlessHeapHelper,
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2022-11-10 00:05:51 +00:00
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const RootDeviceEnvironment &rootDeviceEnvironment) {
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2020-01-17 08:56:05 +01:00
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auto sizeSamplerState = sizeof(SAMPLER_STATE) * samplerCount;
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2021-05-17 10:08:54 +00:00
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auto borderColorSize = samplerStateOffset - borderColorOffset;
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2020-01-17 08:56:05 +01:00
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2020-11-26 09:04:26 +00:00
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SAMPLER_STATE *dstSamplerState = nullptr;
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uint32_t samplerStateOffsetInDsh = 0;
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2020-01-17 08:56:05 +01:00
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2020-11-26 09:04:26 +00:00
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dsh->align(EncodeStates<Family>::alignIndirectStatePointer);
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uint32_t borderColorOffsetInDsh = 0;
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2023-06-26 17:49:16 +00:00
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if (!bindlessHeapHelper || (!bindlessHeapHelper->isGlobalDshSupported())) {
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2021-05-17 10:08:54 +00:00
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borderColorOffsetInDsh = static_cast<uint32_t>(dsh->getUsed());
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auto borderColor = dsh->getSpace(borderColorSize);
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memcpy_s(borderColor, borderColorSize, ptrOffset(fnDynamicStateHeap, borderColorOffset),
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borderColorSize);
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2020-11-26 09:04:26 +00:00
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dsh->align(INTERFACE_DESCRIPTOR_DATA::SAMPLERSTATEPOINTER_ALIGN_SIZE);
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samplerStateOffsetInDsh = static_cast<uint32_t>(dsh->getUsed());
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2021-05-17 10:08:54 +00:00
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2020-11-26 09:04:26 +00:00
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dstSamplerState = reinterpret_cast<SAMPLER_STATE *>(dsh->getSpace(sizeSamplerState));
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} else {
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2021-05-17 10:08:54 +00:00
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auto borderColor = reinterpret_cast<const SAMPLER_BORDER_COLOR_STATE *>(ptrOffset(fnDynamicStateHeap, borderColorOffset));
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if (borderColor->getBorderColorRed() != 0.0f ||
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borderColor->getBorderColorGreen() != 0.0f ||
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borderColor->getBorderColorBlue() != 0.0f ||
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(borderColor->getBorderColorAlpha() != 0.0f && borderColor->getBorderColorAlpha() != 1.0f)) {
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UNRECOVERABLE_IF(true);
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} else if (borderColor->getBorderColorAlpha() == 0.0f) {
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borderColorOffsetInDsh = bindlessHeapHelper->getDefaultBorderColorOffset();
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} else {
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borderColorOffsetInDsh = bindlessHeapHelper->getAlphaBorderColorOffset();
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2020-11-26 09:04:26 +00:00
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}
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dsh->align(INTERFACE_DESCRIPTOR_DATA::SAMPLERSTATEPOINTER_ALIGN_SIZE);
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2023-12-13 16:09:52 +00:00
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auto samplerStateInDsh = bindlessHeapHelper->allocateSSInHeap(sizeSamplerState, nullptr, BindlessHeapsHelper::BindlesHeapType::globalDsh);
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2020-11-26 09:04:26 +00:00
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dstSamplerState = reinterpret_cast<SAMPLER_STATE *>(samplerStateInDsh.ssPtr);
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samplerStateOffsetInDsh = static_cast<uint32_t>(samplerStateInDsh.surfaceStateOffset);
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}
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2020-01-17 08:56:05 +01:00
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2022-11-10 00:05:51 +00:00
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auto &helper = rootDeviceEnvironment.getHelper<ProductHelper>();
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auto &hwInfo = *rootDeviceEnvironment.getHardwareInfo();
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2020-04-27 18:55:26 +02:00
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auto srcSamplerState = reinterpret_cast<const SAMPLER_STATE *>(ptrOffset(fnDynamicStateHeap, samplerStateOffset));
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SAMPLER_STATE state = {};
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2020-01-17 08:56:05 +01:00
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for (uint32_t i = 0; i < samplerCount; i++) {
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2020-04-27 18:55:26 +02:00
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state = srcSamplerState[i];
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state.setIndirectStatePointer(static_cast<uint32_t>(borderColorOffsetInDsh));
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2022-11-10 00:05:51 +00:00
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helper.adjustSamplerState(&state, hwInfo);
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2020-04-27 18:55:26 +02:00
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dstSamplerState[i] = state;
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2020-01-17 08:56:05 +01:00
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}
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return samplerStateOffsetInDsh;
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2020-11-26 09:04:26 +00:00
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} // namespace NEO
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2020-10-07 14:22:26 +02:00
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2020-01-17 08:56:05 +01:00
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template <typename Family>
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void EncodeMathMMIO<Family>::encodeMulRegVal(CommandContainer &container, uint32_t offset, uint32_t val, uint64_t dstAddress) {
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int logLws = 0;
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int i = val;
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while (val >> logLws) {
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logLws++;
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}
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2023-12-04 13:53:09 +00:00
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EncodeSetMMIO<Family>::encodeREG(container, RegisterOffsets::csGprR0, offset);
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EncodeSetMMIO<Family>::encodeIMM(container, RegisterOffsets::csGprR1, 0, true);
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2020-01-17 08:56:05 +01:00
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i = 0;
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while (i < logLws) {
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if (val & (1 << i)) {
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2023-12-19 07:40:17 +00:00
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EncodeMath<Family>::addition(container, AluRegisters::gpr1,
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AluRegisters::gpr0, AluRegisters::gpr2);
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2023-12-04 13:53:09 +00:00
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EncodeSetMMIO<Family>::encodeREG(container, RegisterOffsets::csGprR1, RegisterOffsets::csGprR2);
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2020-01-17 08:56:05 +01:00
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}
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2023-12-19 07:40:17 +00:00
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EncodeMath<Family>::addition(container, AluRegisters::gpr0,
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AluRegisters::gpr0, AluRegisters::gpr2);
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2023-12-04 13:53:09 +00:00
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EncodeSetMMIO<Family>::encodeREG(container, RegisterOffsets::csGprR0, RegisterOffsets::csGprR2);
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2020-01-17 08:56:05 +01:00
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i++;
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}
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2023-12-04 13:53:09 +00:00
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EncodeStoreMMIO<Family>::encode(*container.getCommandStream(), RegisterOffsets::csGprR1, dstAddress, false);
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2020-01-17 08:56:05 +01:00
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}
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2020-02-05 13:38:11 -08:00
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/*
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* Compute *firstOperand > secondOperand and store the result in
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* MI_PREDICATE_RESULT where firstOperand is an device memory address.
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*
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* To calculate the "greater than" operation in the device,
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* (secondOperand - *firstOperand) is used, and if the carry flag register is
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* set, then (*firstOperand) is greater than secondOperand.
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*/
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2020-01-17 08:56:05 +01:00
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template <typename Family>
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2020-02-05 13:38:11 -08:00
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void EncodeMathMMIO<Family>::encodeGreaterThanPredicate(CommandContainer &container, uint64_t firstOperand, uint32_t secondOperand) {
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2023-12-04 13:53:09 +00:00
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EncodeSetMMIO<Family>::encodeMEM(container, RegisterOffsets::csGprR0, firstOperand);
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EncodeSetMMIO<Family>::encodeIMM(container, RegisterOffsets::csGprR1, secondOperand, true);
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2020-01-17 08:56:05 +01:00
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2023-12-19 07:40:17 +00:00
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/* RegisterOffsets::csGprR* registers map to AluRegisters::gpr* registers */
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EncodeMath<Family>::greaterThan(container, AluRegisters::gpr0,
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AluRegisters::gpr1, AluRegisters::gpr2);
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2020-01-17 08:56:05 +01:00
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2023-12-04 13:53:09 +00:00
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EncodeSetMMIO<Family>::encodeREG(container, RegisterOffsets::csPredicateResult, RegisterOffsets::csGprR2);
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2020-01-17 08:56:05 +01:00
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}
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2020-12-04 08:15:15 -08:00
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/*
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* Compute bitwise AND between a register value from regOffset and immVal
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* and store it into dstAddress.
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*/
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template <typename Family>
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2022-04-06 12:35:32 +00:00
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void EncodeMathMMIO<Family>::encodeBitwiseAndVal(CommandContainer &container, uint32_t regOffset, uint32_t immVal, uint64_t dstAddress,
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bool workloadPartition) {
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2023-12-04 13:53:09 +00:00
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EncodeSetMMIO<Family>::encodeREG(container, RegisterOffsets::csGprR13, regOffset);
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EncodeSetMMIO<Family>::encodeIMM(container, RegisterOffsets::csGprR14, immVal, true);
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2023-12-19 07:40:17 +00:00
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EncodeMath<Family>::bitwiseAnd(container, AluRegisters::gpr13,
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AluRegisters::gpr14,
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AluRegisters::gpr15);
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2020-12-04 08:15:15 -08:00
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EncodeStoreMMIO<Family>::encode(*container.getCommandStream(),
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2023-12-04 13:53:09 +00:00
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RegisterOffsets::csGprR15, dstAddress, workloadPartition);
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2020-12-04 08:15:15 -08:00
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}
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2020-02-03 17:15:04 -08:00
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/*
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* encodeAlu() performs operations that leave a state including the result of
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* an operation such as the carry flag, and the accu flag with subtraction and
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* addition result.
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*
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* Parameter "postOperationStateRegister" is the ALU register with the result
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* from the operation that the function caller is interested in obtaining.
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*
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* Parameter "finalResultRegister" is the final destination register where
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* data from "postOperationStateRegister" will be copied.
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*/
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2020-01-17 08:56:05 +01:00
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template <typename Family>
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2020-02-25 10:23:04 -08:00
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void EncodeMathMMIO<Family>::encodeAlu(MI_MATH_ALU_INST_INLINE *pAluParam, AluRegisters srcA, AluRegisters srcB, AluRegisters op, AluRegisters finalResultRegister, AluRegisters postOperationStateRegister) {
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2020-04-27 18:55:26 +02:00
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MI_MATH_ALU_INST_INLINE aluParam;
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aluParam.DW0.Value = 0x0;
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2023-12-19 07:40:17 +00:00
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aluParam.DW0.BitField.ALUOpcode = static_cast<uint32_t>(AluRegisters::opcodeLoad);
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aluParam.DW0.BitField.Operand1 = static_cast<uint32_t>(AluRegisters::srca);
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2020-04-27 18:55:26 +02:00
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aluParam.DW0.BitField.Operand2 = static_cast<uint32_t>(srcA);
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*pAluParam = aluParam;
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2020-01-17 08:56:05 +01:00
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pAluParam++;
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2020-04-27 18:55:26 +02:00
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aluParam.DW0.Value = 0x0;
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2023-12-19 07:40:17 +00:00
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aluParam.DW0.BitField.ALUOpcode = static_cast<uint32_t>(AluRegisters::opcodeLoad);
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aluParam.DW0.BitField.Operand1 = static_cast<uint32_t>(AluRegisters::srcb);
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2020-04-27 18:55:26 +02:00
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aluParam.DW0.BitField.Operand2 = static_cast<uint32_t>(srcB);
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*pAluParam = aluParam;
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2020-01-17 08:56:05 +01:00
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pAluParam++;
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2020-02-05 13:38:11 -08:00
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/* Order of operation: Operand1 <ALUOpcode> Operand2 */
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2020-04-27 18:55:26 +02:00
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aluParam.DW0.Value = 0x0;
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aluParam.DW0.BitField.ALUOpcode = static_cast<uint32_t>(op);
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aluParam.DW0.BitField.Operand1 = 0;
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aluParam.DW0.BitField.Operand2 = 0;
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*pAluParam = aluParam;
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2020-01-17 08:56:05 +01:00
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pAluParam++;
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2020-04-27 18:55:26 +02:00
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aluParam.DW0.Value = 0x0;
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2023-12-19 07:40:17 +00:00
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aluParam.DW0.BitField.ALUOpcode = static_cast<uint32_t>(AluRegisters::opcodeStore);
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2020-04-27 18:55:26 +02:00
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aluParam.DW0.BitField.Operand1 = static_cast<uint32_t>(finalResultRegister);
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aluParam.DW0.BitField.Operand2 = static_cast<uint32_t>(postOperationStateRegister);
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*pAluParam = aluParam;
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2020-01-17 08:56:05 +01:00
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pAluParam++;
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}
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template <typename Family>
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2020-02-25 10:23:04 -08:00
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uint32_t *EncodeMath<Family>::commandReserve(CommandContainer &container) {
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2022-03-23 08:57:31 +00:00
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return commandReserve(*container.getCommandStream());
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}
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template <typename Family>
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uint32_t *EncodeMath<Family>::commandReserve(LinearStream &cmdStream) {
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2023-12-04 13:53:09 +00:00
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size_t size = sizeof(MI_MATH) + sizeof(MI_MATH_ALU_INST_INLINE) * RegisterConstants::numAluInstForReadModifyWrite;
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2020-02-25 10:23:04 -08:00
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2022-03-23 08:57:31 +00:00
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auto cmd = reinterpret_cast<uint32_t *>(cmdStream.getSpace(size));
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2020-04-27 18:55:26 +02:00
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MI_MATH mathBuffer;
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mathBuffer.DW0.Value = 0x0;
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mathBuffer.DW0.BitField.InstructionType = MI_MATH::COMMAND_TYPE_MI_COMMAND;
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mathBuffer.DW0.BitField.InstructionOpcode = MI_MATH::MI_COMMAND_OPCODE_MI_MATH;
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2023-12-04 13:53:09 +00:00
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mathBuffer.DW0.BitField.DwordLength = RegisterConstants::numAluInstForReadModifyWrite - 1;
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2020-04-27 18:55:26 +02:00
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*reinterpret_cast<MI_MATH *>(cmd) = mathBuffer;
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2020-02-25 10:23:04 -08:00
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cmd++;
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|
|
return cmd;
|
|
|
|
|
}
|
|
|
|
|
|
2020-04-27 18:55:26 +02:00
|
|
|
template <typename Family>
|
|
|
|
|
void EncodeMathMMIO<Family>::encodeAluAdd(MI_MATH_ALU_INST_INLINE *pAluParam,
|
|
|
|
|
AluRegisters firstOperandRegister,
|
|
|
|
|
AluRegisters secondOperandRegister,
|
|
|
|
|
AluRegisters finalResultRegister) {
|
2023-12-19 07:40:17 +00:00
|
|
|
encodeAlu(pAluParam, firstOperandRegister, secondOperandRegister, AluRegisters::opcodeAdd, finalResultRegister, AluRegisters::accu);
|
2020-04-27 18:55:26 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
template <typename Family>
|
|
|
|
|
void EncodeMathMMIO<Family>::encodeAluSubStoreCarry(MI_MATH_ALU_INST_INLINE *pAluParam, AluRegisters regA, AluRegisters regB, AluRegisters finalResultRegister) {
|
|
|
|
|
/* regB is subtracted from regA */
|
2023-12-19 07:40:17 +00:00
|
|
|
encodeAlu(pAluParam, regA, regB, AluRegisters::opcodeSub, finalResultRegister, AluRegisters::cf);
|
2020-04-27 18:55:26 +02:00
|
|
|
}
|
|
|
|
|
|
2020-11-24 19:15:37 -08:00
|
|
|
template <typename Family>
|
|
|
|
|
void EncodeMathMMIO<Family>::encodeAluAnd(MI_MATH_ALU_INST_INLINE *pAluParam,
|
|
|
|
|
AluRegisters firstOperandRegister,
|
|
|
|
|
AluRegisters secondOperandRegister,
|
|
|
|
|
AluRegisters finalResultRegister) {
|
2023-12-19 07:40:17 +00:00
|
|
|
encodeAlu(pAluParam, firstOperandRegister, secondOperandRegister, AluRegisters::opcodeAnd, finalResultRegister, AluRegisters::accu);
|
2020-11-24 19:15:37 -08:00
|
|
|
}
|
|
|
|
|
|
2022-11-10 09:58:55 +00:00
|
|
|
template <typename Family>
|
|
|
|
|
void EncodeMathMMIO<Family>::encodeIncrementOrDecrement(LinearStream &cmdStream, AluRegisters operandRegister, IncrementOrDecrementOperation operationType) {
|
2023-12-04 13:53:09 +00:00
|
|
|
LriHelper<Family>::program(&cmdStream, RegisterOffsets::csGprR7, 1, true);
|
|
|
|
|
LriHelper<Family>::program(&cmdStream, RegisterOffsets::csGprR7 + 4, 0, true);
|
2022-11-10 09:58:55 +00:00
|
|
|
|
|
|
|
|
EncodeAluHelper<Family, 4> aluHelper;
|
2023-12-19 07:40:17 +00:00
|
|
|
aluHelper.setNextAlu(AluRegisters::opcodeLoad, AluRegisters::srca, operandRegister);
|
|
|
|
|
aluHelper.setNextAlu(AluRegisters::opcodeLoad, AluRegisters::srcb, AluRegisters::gpr7);
|
|
|
|
|
aluHelper.setNextAlu((operationType == IncrementOrDecrementOperation::increment) ? AluRegisters::opcodeAdd
|
|
|
|
|
: AluRegisters::opcodeSub);
|
|
|
|
|
aluHelper.setNextAlu(AluRegisters::opcodeStore, operandRegister, AluRegisters::accu);
|
2022-11-10 09:58:55 +00:00
|
|
|
|
|
|
|
|
aluHelper.copyToCmdStream(cmdStream);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
template <typename Family>
|
|
|
|
|
void EncodeMathMMIO<Family>::encodeIncrement(LinearStream &cmdStream, AluRegisters operandRegister) {
|
2023-12-19 07:40:17 +00:00
|
|
|
encodeIncrementOrDecrement(cmdStream, operandRegister, IncrementOrDecrementOperation::increment);
|
2022-11-10 09:58:55 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
template <typename Family>
|
|
|
|
|
void EncodeMathMMIO<Family>::encodeDecrement(LinearStream &cmdStream, AluRegisters operandRegister) {
|
2023-12-19 07:40:17 +00:00
|
|
|
encodeIncrementOrDecrement(cmdStream, operandRegister, IncrementOrDecrementOperation::decrement);
|
2022-11-10 09:58:55 +00:00
|
|
|
}
|
|
|
|
|
|
2020-02-25 10:23:04 -08:00
|
|
|
/*
|
|
|
|
|
* greaterThan() tests if firstOperandRegister is greater than
|
|
|
|
|
* secondOperandRegister.
|
|
|
|
|
*/
|
|
|
|
|
template <typename Family>
|
|
|
|
|
void EncodeMath<Family>::greaterThan(CommandContainer &container,
|
|
|
|
|
AluRegisters firstOperandRegister,
|
|
|
|
|
AluRegisters secondOperandRegister,
|
|
|
|
|
AluRegisters finalResultRegister) {
|
|
|
|
|
uint32_t *cmd = EncodeMath<Family>::commandReserve(container);
|
|
|
|
|
|
|
|
|
|
/* firstOperandRegister will be subtracted from secondOperandRegister */
|
2020-04-27 18:55:26 +02:00
|
|
|
EncodeMathMMIO<Family>::encodeAluSubStoreCarry(reinterpret_cast<MI_MATH_ALU_INST_INLINE *>(cmd),
|
2020-02-25 10:23:04 -08:00
|
|
|
secondOperandRegister,
|
|
|
|
|
firstOperandRegister,
|
|
|
|
|
finalResultRegister);
|
|
|
|
|
}
|
|
|
|
|
|
2020-02-25 10:23:04 -08:00
|
|
|
template <typename Family>
|
|
|
|
|
void EncodeMath<Family>::addition(CommandContainer &container,
|
2020-02-25 10:23:04 -08:00
|
|
|
AluRegisters firstOperandRegister,
|
|
|
|
|
AluRegisters secondOperandRegister,
|
|
|
|
|
AluRegisters finalResultRegister) {
|
2020-02-25 10:23:04 -08:00
|
|
|
uint32_t *cmd = EncodeMath<Family>::commandReserve(container);
|
|
|
|
|
|
2022-03-23 08:57:31 +00:00
|
|
|
EncodeMathMMIO<Family>::encodeAluAdd(reinterpret_cast<MI_MATH_ALU_INST_INLINE *>(cmd),
|
|
|
|
|
firstOperandRegister,
|
|
|
|
|
secondOperandRegister,
|
|
|
|
|
finalResultRegister);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
template <typename Family>
|
|
|
|
|
void EncodeMath<Family>::addition(LinearStream &cmdStream,
|
|
|
|
|
AluRegisters firstOperandRegister,
|
|
|
|
|
AluRegisters secondOperandRegister,
|
|
|
|
|
AluRegisters finalResultRegister) {
|
|
|
|
|
uint32_t *cmd = EncodeMath<Family>::commandReserve(cmdStream);
|
|
|
|
|
|
2020-04-27 18:55:26 +02:00
|
|
|
EncodeMathMMIO<Family>::encodeAluAdd(reinterpret_cast<MI_MATH_ALU_INST_INLINE *>(cmd),
|
|
|
|
|
firstOperandRegister,
|
2020-12-04 08:15:15 -08:00
|
|
|
secondOperandRegister,
|
|
|
|
|
finalResultRegister);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
template <typename Family>
|
|
|
|
|
void EncodeMath<Family>::bitwiseAnd(CommandContainer &container,
|
|
|
|
|
AluRegisters firstOperandRegister,
|
|
|
|
|
AluRegisters secondOperandRegister,
|
|
|
|
|
AluRegisters finalResultRegister) {
|
|
|
|
|
uint32_t *cmd = EncodeMath<Family>::commandReserve(container);
|
|
|
|
|
|
|
|
|
|
EncodeMathMMIO<Family>::encodeAluAnd(reinterpret_cast<MI_MATH_ALU_INST_INLINE *>(cmd),
|
|
|
|
|
firstOperandRegister,
|
2020-02-25 10:23:04 -08:00
|
|
|
secondOperandRegister,
|
|
|
|
|
finalResultRegister);
|
2020-01-17 08:56:05 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
template <typename Family>
|
2020-10-06 10:58:18 +02:00
|
|
|
inline void EncodeSetMMIO<Family>::encodeIMM(CommandContainer &container, uint32_t offset, uint32_t data, bool remap) {
|
2021-09-03 11:42:31 +00:00
|
|
|
EncodeSetMMIO<Family>::encodeIMM(*container.getCommandStream(), offset, data, remap);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
template <typename Family>
|
|
|
|
|
inline void EncodeSetMMIO<Family>::encodeMEM(CommandContainer &container, uint32_t offset, uint64_t address) {
|
|
|
|
|
EncodeSetMMIO<Family>::encodeMEM(*container.getCommandStream(), offset, address);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
template <typename Family>
|
|
|
|
|
inline void EncodeSetMMIO<Family>::encodeREG(CommandContainer &container, uint32_t dstOffset, uint32_t srcOffset) {
|
|
|
|
|
EncodeSetMMIO<Family>::encodeREG(*container.getCommandStream(), dstOffset, srcOffset);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
template <typename Family>
|
|
|
|
|
inline void EncodeSetMMIO<Family>::encodeIMM(LinearStream &cmdStream, uint32_t offset, uint32_t data, bool remap) {
|
|
|
|
|
LriHelper<Family>::program(&cmdStream,
|
2020-10-06 10:58:18 +02:00
|
|
|
offset,
|
|
|
|
|
data,
|
|
|
|
|
remap);
|
2020-01-17 08:56:05 +01:00
|
|
|
}
|
|
|
|
|
|
2022-09-07 14:27:09 +00:00
|
|
|
template <typename Family>
|
|
|
|
|
inline void EncodeStateBaseAddress<Family>::setSbaTrackingForL0DebuggerIfEnabled(bool trackingEnabled,
|
|
|
|
|
Device &device,
|
|
|
|
|
LinearStream &commandStream,
|
2022-11-22 20:07:45 +00:00
|
|
|
STATE_BASE_ADDRESS &sbaCmd, bool useFirstLevelBB) {
|
2022-09-07 14:27:09 +00:00
|
|
|
if (!trackingEnabled) {
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
NEO::Debugger::SbaAddresses sbaAddresses = {};
|
|
|
|
|
NEO::EncodeStateBaseAddress<Family>::setSbaAddressesForDebugger(sbaAddresses, sbaCmd);
|
2022-11-22 20:07:45 +00:00
|
|
|
device.getL0Debugger()->captureStateBaseAddress(commandStream, sbaAddresses, useFirstLevelBB);
|
2022-09-07 14:27:09 +00:00
|
|
|
}
|
|
|
|
|
|
2020-01-17 08:56:05 +01:00
|
|
|
template <typename Family>
|
2021-09-03 11:42:31 +00:00
|
|
|
void EncodeSetMMIO<Family>::encodeMEM(LinearStream &cmdStream, uint32_t offset, uint64_t address) {
|
2020-01-17 08:56:05 +01:00
|
|
|
MI_LOAD_REGISTER_MEM cmd = Family::cmdInitLoadRegisterMem;
|
|
|
|
|
cmd.setRegisterAddress(offset);
|
|
|
|
|
cmd.setMemoryAddress(address);
|
2020-10-20 15:14:56 +02:00
|
|
|
remapOffset(&cmd);
|
|
|
|
|
|
2021-09-03 11:42:31 +00:00
|
|
|
auto buffer = cmdStream.getSpaceForCmd<MI_LOAD_REGISTER_MEM>();
|
2020-04-08 18:33:03 +02:00
|
|
|
*buffer = cmd;
|
2020-01-17 08:56:05 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
template <typename Family>
|
2021-09-03 11:42:31 +00:00
|
|
|
void EncodeSetMMIO<Family>::encodeREG(LinearStream &cmdStream, uint32_t dstOffset, uint32_t srcOffset) {
|
2020-01-17 08:56:05 +01:00
|
|
|
MI_LOAD_REGISTER_REG cmd = Family::cmdInitLoadRegisterReg;
|
|
|
|
|
cmd.setSourceRegisterAddress(srcOffset);
|
|
|
|
|
cmd.setDestinationRegisterAddress(dstOffset);
|
2020-10-20 15:14:56 +02:00
|
|
|
remapOffset(&cmd);
|
2021-09-03 11:42:31 +00:00
|
|
|
auto buffer = cmdStream.getSpaceForCmd<MI_LOAD_REGISTER_REG>();
|
2020-04-08 18:33:03 +02:00
|
|
|
*buffer = cmd;
|
2020-01-17 08:56:05 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
template <typename Family>
|
2022-04-06 12:35:32 +00:00
|
|
|
void EncodeStoreMMIO<Family>::encode(LinearStream &csr, uint32_t offset, uint64_t address, bool workloadPartition) {
|
|
|
|
|
auto buffer = csr.getSpaceForCmd<MI_STORE_REGISTER_MEM>();
|
|
|
|
|
EncodeStoreMMIO<Family>::encode(buffer, offset, address, workloadPartition);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
template <typename Family>
|
|
|
|
|
inline void EncodeStoreMMIO<Family>::encode(MI_STORE_REGISTER_MEM *cmdBuffer, uint32_t offset, uint64_t address, bool workloadPartition) {
|
2020-01-17 08:56:05 +01:00
|
|
|
MI_STORE_REGISTER_MEM cmd = Family::cmdInitStoreRegisterMem;
|
|
|
|
|
cmd.setRegisterAddress(offset);
|
|
|
|
|
cmd.setMemoryAddress(address);
|
2022-04-06 12:35:32 +00:00
|
|
|
appendFlags(&cmd, workloadPartition);
|
|
|
|
|
*cmdBuffer = cmd;
|
2020-01-17 08:56:05 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
template <typename Family>
|
2021-10-21 01:30:53 +00:00
|
|
|
void EncodeSurfaceState<Family>::encodeBuffer(EncodeSurfaceStateArgs &args) {
|
|
|
|
|
auto surfaceState = reinterpret_cast<R_SURFACE_STATE *>(args.outMemory);
|
2023-01-19 12:26:21 +00:00
|
|
|
auto bufferSize = alignUp(args.size, getSurfaceBaseAddressAlignment());
|
2020-01-17 08:56:05 +01:00
|
|
|
|
2023-11-23 17:09:04 +00:00
|
|
|
SurfaceStateBufferLength length = {0};
|
2023-04-28 09:38:31 +00:00
|
|
|
length.length = static_cast<uint32_t>(bufferSize - 1);
|
2020-01-17 08:56:05 +01:00
|
|
|
|
2023-04-28 09:38:31 +00:00
|
|
|
surfaceState->setWidth(length.surfaceState.width + 1);
|
|
|
|
|
surfaceState->setHeight(length.surfaceState.height + 1);
|
|
|
|
|
surfaceState->setDepth(length.surfaceState.depth + 1);
|
2020-09-11 15:44:09 +02:00
|
|
|
|
2021-10-21 01:30:53 +00:00
|
|
|
surfaceState->setSurfaceType((args.graphicsAddress != 0) ? R_SURFACE_STATE::SURFACE_TYPE_SURFTYPE_BUFFER
|
|
|
|
|
: R_SURFACE_STATE::SURFACE_TYPE_SURFTYPE_NULL);
|
2020-09-15 20:27:18 +02:00
|
|
|
surfaceState->setSurfaceFormat(SURFACE_FORMAT::SURFACE_FORMAT_RAW);
|
|
|
|
|
surfaceState->setSurfaceVerticalAlignment(R_SURFACE_STATE::SURFACE_VERTICAL_ALIGNMENT_VALIGN_4);
|
2022-01-19 12:50:29 +00:00
|
|
|
surfaceState->setSurfaceHorizontalAlignment(R_SURFACE_STATE::SURFACE_HORIZONTAL_ALIGNMENT_HALIGN_DEFAULT);
|
2020-06-23 12:03:43 +02:00
|
|
|
|
2020-09-15 20:27:18 +02:00
|
|
|
surfaceState->setTileMode(R_SURFACE_STATE::TILE_MODE_LINEAR);
|
|
|
|
|
surfaceState->setVerticalLineStride(0);
|
|
|
|
|
surfaceState->setVerticalLineStrideOffset(0);
|
2021-10-21 01:30:53 +00:00
|
|
|
surfaceState->setMemoryObjectControlState(args.mocs);
|
|
|
|
|
surfaceState->setSurfaceBaseAddress(args.graphicsAddress);
|
2020-09-15 20:27:18 +02:00
|
|
|
|
|
|
|
|
surfaceState->setAuxiliarySurfaceMode(AUXILIARY_SURFACE_MODE::AUXILIARY_SURFACE_MODE_AUX_NONE);
|
2020-06-23 12:03:43 +02:00
|
|
|
|
2021-10-21 01:30:53 +00:00
|
|
|
setCoherencyType(surfaceState, args.cpuCoherent ? R_SURFACE_STATE::COHERENCY_TYPE_IA_COHERENT : R_SURFACE_STATE::COHERENCY_TYPE_GPU_COHERENT);
|
2021-04-13 00:36:24 +00:00
|
|
|
|
2021-12-01 18:11:27 +00:00
|
|
|
auto compressionEnabled = args.allocation ? args.allocation->isCompressionEnabled() : false;
|
|
|
|
|
if (compressionEnabled && !args.forceNonAuxMode) {
|
2020-06-23 12:03:43 +02:00
|
|
|
// Its expected to not program pitch/qpitch/baseAddress for Aux surface in CCS scenarios
|
2021-04-13 00:36:24 +00:00
|
|
|
setCoherencyType(surfaceState, R_SURFACE_STATE::COHERENCY_TYPE_GPU_COHERENT);
|
2021-01-29 15:40:17 +00:00
|
|
|
setBufferAuxParamsForCCS(surfaceState);
|
2020-06-23 12:03:43 +02:00
|
|
|
}
|
2020-01-17 08:56:05 +01:00
|
|
|
|
2023-11-30 08:32:25 +00:00
|
|
|
if (debugManager.flags.DisableCachingForStatefulBufferAccess.get()) {
|
2021-10-21 01:30:53 +00:00
|
|
|
surfaceState->setMemoryObjectControlState(args.gmmHelper->getMOCS(GMM_RESOURCE_USAGE_OCL_BUFFER_CACHELINE_MISALIGNED));
|
2020-06-23 12:03:43 +02:00
|
|
|
}
|
2020-09-15 20:27:18 +02:00
|
|
|
|
2021-10-21 01:30:53 +00:00
|
|
|
EncodeSurfaceState<Family>::encodeExtraBufferParams(args);
|
|
|
|
|
|
|
|
|
|
EncodeSurfaceState<Family>::appendBufferSurfaceState(args);
|
2020-06-23 12:03:43 +02:00
|
|
|
}
|
2020-09-15 20:27:18 +02:00
|
|
|
|
2020-10-07 14:22:26 +02:00
|
|
|
template <typename Family>
|
|
|
|
|
void EncodeSurfaceState<Family>::getSshAlignedPointer(uintptr_t &ptr, size_t &offset) {
|
|
|
|
|
auto sshAlignmentMask =
|
|
|
|
|
getSurfaceBaseAddressAlignmentMask();
|
|
|
|
|
uintptr_t alignedPtr = ptr & sshAlignmentMask;
|
|
|
|
|
|
|
|
|
|
offset = 0;
|
|
|
|
|
if (ptr != alignedPtr) {
|
|
|
|
|
offset = ptrDiff(ptr, alignedPtr);
|
|
|
|
|
ptr = alignedPtr;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// Returned binding table pointer is relative to given heap (which is assumed to be the Surface state base addess)
|
|
|
|
|
// as required by the INTERFACE_DESCRIPTOR_DATA.
|
|
|
|
|
template <typename Family>
|
2023-03-23 13:47:39 +00:00
|
|
|
size_t EncodeSurfaceState<Family>::pushBindingTableAndSurfaceStates(IndirectHeap &dstHeap,
|
2020-10-07 14:22:26 +02:00
|
|
|
const void *srcKernelSsh, size_t srcKernelSshSize,
|
|
|
|
|
size_t numberOfBindingTableStates, size_t offsetOfBindingTable) {
|
|
|
|
|
using BINDING_TABLE_STATE = typename Family::BINDING_TABLE_STATE;
|
|
|
|
|
using INTERFACE_DESCRIPTOR_DATA = typename Family::INTERFACE_DESCRIPTOR_DATA;
|
|
|
|
|
using RENDER_SURFACE_STATE = typename Family::RENDER_SURFACE_STATE;
|
|
|
|
|
|
|
|
|
|
size_t sshSize = srcKernelSshSize;
|
|
|
|
|
DEBUG_BREAK_IF(srcKernelSsh == nullptr);
|
|
|
|
|
|
|
|
|
|
auto srcSurfaceState = srcKernelSsh;
|
|
|
|
|
// Allocate space for new ssh data
|
|
|
|
|
auto dstSurfaceState = dstHeap.getSpace(sshSize);
|
|
|
|
|
|
|
|
|
|
// Compiler sends BTI table that is already populated with surface state pointers relative to local SSH.
|
|
|
|
|
// We may need to patch these pointers so that they are relative to surface state base address
|
|
|
|
|
if (dstSurfaceState == dstHeap.getCpuBase()) {
|
|
|
|
|
// nothing to patch, we're at the start of heap (which is assumed to be the surface state base address)
|
|
|
|
|
// we need to simply copy the ssh (including BTIs from compiler)
|
|
|
|
|
memcpy_s(dstSurfaceState, sshSize, srcSurfaceState, sshSize);
|
|
|
|
|
return offsetOfBindingTable;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// We can copy-over the surface states, but BTIs will need to be patched
|
|
|
|
|
memcpy_s(dstSurfaceState, sshSize, srcSurfaceState, offsetOfBindingTable);
|
|
|
|
|
|
|
|
|
|
uint32_t surfaceStatesOffset = static_cast<uint32_t>(ptrDiff(dstSurfaceState, dstHeap.getCpuBase()));
|
|
|
|
|
|
|
|
|
|
// march over BTIs and offset the pointers based on surface state base address
|
|
|
|
|
auto *dstBtiTableBase = reinterpret_cast<BINDING_TABLE_STATE *>(ptrOffset(dstSurfaceState, offsetOfBindingTable));
|
|
|
|
|
DEBUG_BREAK_IF(reinterpret_cast<uintptr_t>(dstBtiTableBase) % INTERFACE_DESCRIPTOR_DATA::BINDINGTABLEPOINTER_ALIGN_SIZE != 0);
|
|
|
|
|
auto *srcBtiTableBase = reinterpret_cast<const BINDING_TABLE_STATE *>(ptrOffset(srcSurfaceState, offsetOfBindingTable));
|
|
|
|
|
BINDING_TABLE_STATE bti = Family::cmdInitBindingTableState;
|
|
|
|
|
for (uint32_t i = 0, e = static_cast<uint32_t>(numberOfBindingTableStates); i != e; ++i) {
|
|
|
|
|
uint32_t localSurfaceStateOffset = srcBtiTableBase[i].getSurfaceStatePointer();
|
|
|
|
|
uint32_t offsetedSurfaceStateOffset = localSurfaceStateOffset + surfaceStatesOffset;
|
|
|
|
|
bti.setSurfaceStatePointer(offsetedSurfaceStateOffset); // patch just the SurfaceStatePointer bits
|
|
|
|
|
dstBtiTableBase[i] = bti;
|
|
|
|
|
DEBUG_BREAK_IF(bti.getRawData(0) % sizeof(BINDING_TABLE_STATE::SURFACESTATEPOINTER_ALIGN_SIZE) != 0);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return ptrDiff(dstBtiTableBase, dstHeap.getCpuBase());
|
|
|
|
|
}
|
|
|
|
|
|
2020-11-25 10:17:31 +00:00
|
|
|
template <typename Family>
|
2022-08-23 11:48:18 +00:00
|
|
|
inline void EncodeSurfaceState<Family>::encodeExtraCacheSettings(R_SURFACE_STATE *surfaceState, const EncodeSurfaceStateArgs &args) {}
|
2020-11-25 10:17:31 +00:00
|
|
|
|
2021-01-29 10:17:10 +00:00
|
|
|
template <typename Family>
|
2021-01-29 15:40:17 +00:00
|
|
|
void EncodeSurfaceState<Family>::setImageAuxParamsForCCS(R_SURFACE_STATE *surfaceState, Gmm *gmm) {
|
2021-01-29 10:17:10 +00:00
|
|
|
using AUXILIARY_SURFACE_MODE = typename Family::RENDER_SURFACE_STATE::AUXILIARY_SURFACE_MODE;
|
|
|
|
|
// Its expected to not program pitch/qpitch/baseAddress for Aux surface in CCS scenarios
|
|
|
|
|
surfaceState->setAuxiliarySurfaceMode(AUXILIARY_SURFACE_MODE::AUXILIARY_SURFACE_MODE_AUX_CCS_E);
|
|
|
|
|
setFlagsForMediaCompression(surfaceState, gmm);
|
|
|
|
|
|
|
|
|
|
setClearColorParams(surfaceState, gmm);
|
|
|
|
|
setUnifiedAuxBaseAddress<Family>(surfaceState, gmm);
|
|
|
|
|
}
|
|
|
|
|
|
2021-01-29 15:40:17 +00:00
|
|
|
template <typename Family>
|
|
|
|
|
void EncodeSurfaceState<Family>::setBufferAuxParamsForCCS(R_SURFACE_STATE *surfaceState) {
|
|
|
|
|
using AUXILIARY_SURFACE_MODE = typename R_SURFACE_STATE::AUXILIARY_SURFACE_MODE;
|
|
|
|
|
|
|
|
|
|
surfaceState->setAuxiliarySurfaceMode(AUXILIARY_SURFACE_MODE::AUXILIARY_SURFACE_MODE_AUX_CCS_E);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
template <typename Family>
|
|
|
|
|
bool EncodeSurfaceState<Family>::isAuxModeEnabled(R_SURFACE_STATE *surfaceState, Gmm *gmm) {
|
|
|
|
|
using AUXILIARY_SURFACE_MODE = typename R_SURFACE_STATE::AUXILIARY_SURFACE_MODE;
|
|
|
|
|
|
|
|
|
|
return (surfaceState->getAuxiliarySurfaceMode() == AUXILIARY_SURFACE_MODE::AUXILIARY_SURFACE_MODE_AUX_CCS_E);
|
|
|
|
|
}
|
|
|
|
|
|
2021-06-23 15:26:56 +00:00
|
|
|
template <typename Family>
|
|
|
|
|
void EncodeSurfaceState<Family>::appendParamsForImageFromBuffer(R_SURFACE_STATE *surfaceState) {
|
|
|
|
|
}
|
|
|
|
|
|
2023-12-01 14:30:28 +00:00
|
|
|
template <typename Family>
|
|
|
|
|
inline void EncodeDispatchKernel<Family>::encodeCommon(CommandContainer &container, EncodeDispatchKernelArgs &args) {
|
2023-12-04 12:20:54 +00:00
|
|
|
using DefaultWalkerType = typename Family::DefaultWalkerType;
|
|
|
|
|
EncodeDispatchKernel<Family>::template encode<DefaultWalkerType>(container, args);
|
2023-12-01 14:30:28 +00:00
|
|
|
}
|
|
|
|
|
|
2020-01-17 08:56:05 +01:00
|
|
|
template <typename Family>
|
2023-02-02 18:57:24 +00:00
|
|
|
void *EncodeDispatchKernel<Family>::getInterfaceDescriptor(CommandContainer &container, IndirectHeap *childDsh, uint32_t &iddOffset) {
|
2020-01-17 08:56:05 +01:00
|
|
|
|
2023-03-16 10:09:21 +00:00
|
|
|
if (container.nextIddInBlockRef() == container.getNumIddPerBlock()) {
|
2023-06-05 16:53:29 +00:00
|
|
|
|
|
|
|
|
void *heapPointer = nullptr;
|
|
|
|
|
size_t heapSize = sizeof(INTERFACE_DESCRIPTOR_DATA) * container.getNumIddPerBlock();
|
|
|
|
|
if (childDsh != nullptr) {
|
|
|
|
|
childDsh->align(EncodeStates<Family>::alignInterfaceDescriptorData);
|
|
|
|
|
heapPointer = childDsh->getSpace(heapSize);
|
2020-12-04 11:28:18 +00:00
|
|
|
} else {
|
2023-12-13 16:09:52 +00:00
|
|
|
container.getIndirectHeap(HeapType::dynamicState)->align(EncodeStates<Family>::alignInterfaceDescriptorData);
|
|
|
|
|
heapPointer = container.getHeapSpaceAllowGrow(HeapType::dynamicState, heapSize);
|
2020-12-04 11:28:18 +00:00
|
|
|
}
|
2023-06-05 16:53:29 +00:00
|
|
|
container.setIddBlock(heapPointer);
|
2023-03-16 10:09:21 +00:00
|
|
|
container.nextIddInBlockRef() = 0;
|
2020-01-17 08:56:05 +01:00
|
|
|
}
|
|
|
|
|
|
2023-03-16 10:09:21 +00:00
|
|
|
iddOffset = container.nextIddInBlockRef();
|
2020-01-17 08:56:05 +01:00
|
|
|
auto interfaceDescriptorData = static_cast<INTERFACE_DESCRIPTOR_DATA *>(container.getIddBlock());
|
2023-03-16 10:09:21 +00:00
|
|
|
container.nextIddInBlockRef()++;
|
|
|
|
|
return &interfaceDescriptorData[iddOffset];
|
2020-01-17 08:56:05 +01:00
|
|
|
}
|
2020-05-11 18:20:21 +02:00
|
|
|
|
2020-07-06 22:55:37 +02:00
|
|
|
template <typename Family>
|
|
|
|
|
bool EncodeDispatchKernel<Family>::inlineDataProgrammingRequired(const KernelDescriptor &kernelDesc) {
|
|
|
|
|
auto checkKernelForInlineData = true;
|
2023-11-30 08:32:25 +00:00
|
|
|
if (debugManager.flags.EnablePassInlineData.get() != -1) {
|
|
|
|
|
checkKernelForInlineData = !!debugManager.flags.EnablePassInlineData.get();
|
2020-07-06 22:55:37 +02:00
|
|
|
}
|
|
|
|
|
if (checkKernelForInlineData) {
|
|
|
|
|
return kernelDesc.kernelAttributes.flags.passInlineData;
|
|
|
|
|
}
|
|
|
|
|
return false;
|
|
|
|
|
}
|
|
|
|
|
|
2021-09-03 11:42:31 +00:00
|
|
|
template <typename Family>
|
2023-11-23 13:58:58 +00:00
|
|
|
template <typename WalkerType>
|
2023-12-09 19:26:30 +00:00
|
|
|
void EncodeDispatchKernel<Family>::adjustTimestampPacket(WalkerType &walkerCmd, const EncodeDispatchKernelArgs &args) {}
|
2020-11-24 16:16:55 +00:00
|
|
|
|
2021-09-24 12:20:21 +00:00
|
|
|
template <typename Family>
|
2021-10-06 17:32:04 +00:00
|
|
|
void EncodeIndirectParams<Family>::encode(CommandContainer &container, uint64_t crossThreadDataGpuVa, DispatchKernelEncoderI *dispatchInterface, uint64_t implicitArgsGpuPtr) {
|
2021-09-24 12:20:21 +00:00
|
|
|
const auto &kernelDescriptor = dispatchInterface->getKernelDescriptor();
|
|
|
|
|
setGroupCountIndirect(container, kernelDescriptor.payloadMappings.dispatchTraits.numWorkGroups, crossThreadDataGpuVa);
|
|
|
|
|
setGlobalWorkSizeIndirect(container, kernelDescriptor.payloadMappings.dispatchTraits.globalWorkSize, crossThreadDataGpuVa, dispatchInterface->getGroupSize());
|
2021-09-24 12:20:21 +00:00
|
|
|
UNRECOVERABLE_IF(NEO::isValidOffset(kernelDescriptor.payloadMappings.dispatchTraits.workDim) && (kernelDescriptor.payloadMappings.dispatchTraits.workDim & 0b11) != 0u);
|
2021-09-24 12:20:21 +00:00
|
|
|
setWorkDimIndirect(container, kernelDescriptor.payloadMappings.dispatchTraits.workDim, crossThreadDataGpuVa, dispatchInterface->getGroupSize());
|
2021-09-24 12:20:21 +00:00
|
|
|
if (implicitArgsGpuPtr) {
|
|
|
|
|
CrossThreadDataOffset groupCountOffset[] = {offsetof(ImplicitArgs, groupCountX), offsetof(ImplicitArgs, groupCountY), offsetof(ImplicitArgs, groupCountZ)};
|
|
|
|
|
CrossThreadDataOffset globalSizeOffset[] = {offsetof(ImplicitArgs, globalSizeX), offsetof(ImplicitArgs, globalSizeY), offsetof(ImplicitArgs, globalSizeZ)};
|
|
|
|
|
setGroupCountIndirect(container, groupCountOffset, implicitArgsGpuPtr);
|
|
|
|
|
setGlobalWorkSizeIndirect(container, globalSizeOffset, implicitArgsGpuPtr, dispatchInterface->getGroupSize());
|
|
|
|
|
setWorkDimIndirect(container, offsetof(ImplicitArgs, numWorkDim), implicitArgsGpuPtr, dispatchInterface->getGroupSize());
|
|
|
|
|
}
|
2021-09-24 12:20:21 +00:00
|
|
|
}
|
|
|
|
|
|
2020-01-17 08:56:05 +01:00
|
|
|
template <typename Family>
|
2021-10-06 17:32:04 +00:00
|
|
|
void EncodeIndirectParams<Family>::setGroupCountIndirect(CommandContainer &container, const NEO::CrossThreadDataOffset offsets[3], uint64_t crossThreadAddress) {
|
2020-10-07 14:22:26 +02:00
|
|
|
for (int i = 0; i < 3; ++i) {
|
|
|
|
|
if (NEO::isUndefinedOffset(offsets[i])) {
|
|
|
|
|
continue;
|
|
|
|
|
}
|
2023-12-04 13:53:09 +00:00
|
|
|
EncodeStoreMMIO<Family>::encode(*container.getCommandStream(), RegisterOffsets::gpgpuDispatchDim[i], ptrOffset(crossThreadAddress, offsets[i]), false);
|
2020-10-07 14:22:26 +02:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2021-06-25 13:35:30 +00:00
|
|
|
template <typename Family>
|
2021-10-06 17:32:04 +00:00
|
|
|
void EncodeIndirectParams<Family>::setWorkDimIndirect(CommandContainer &container, const NEO::CrossThreadDataOffset workDimOffset, uint64_t crossThreadAddress, const uint32_t *groupSize) {
|
2021-06-25 13:35:30 +00:00
|
|
|
if (NEO::isValidOffset(workDimOffset)) {
|
2021-10-06 17:32:04 +00:00
|
|
|
auto dstPtr = ptrOffset(crossThreadAddress, workDimOffset);
|
2023-12-04 13:53:09 +00:00
|
|
|
constexpr uint32_t resultRegister = RegisterOffsets::csGprR0;
|
2023-12-19 07:40:17 +00:00
|
|
|
constexpr AluRegisters resultAluRegister = AluRegisters::gpr0;
|
2021-09-24 12:20:21 +00:00
|
|
|
const uint32_t offset = static_cast<uint32_t>((1ull << 8 * (dstPtr & 0b11)) - 1);
|
|
|
|
|
const uint32_t memoryMask = std::numeric_limits<uint32_t>::max() - static_cast<uint32_t>((1ull << 8 * ((dstPtr & 0b11) + 1)) - 1) + offset;
|
2021-06-25 13:35:30 +00:00
|
|
|
|
2021-10-05 16:53:00 +00:00
|
|
|
/*
|
|
|
|
|
* if ( groupSize[2] > 1 || groupCount[2] > 1 ) { workdim = 3 }
|
|
|
|
|
* else if ( groupSize[1] + groupCount[1] > 2 ) { workdim = 2 }
|
|
|
|
|
* else { workdim = 1 }
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
if (groupSize[2] > 1) {
|
2022-05-16 13:46:02 +00:00
|
|
|
EncodeSetMMIO<Family>::encodeIMM(container, resultRegister, 3 << (8 * (dstPtr & 0b11)), true);
|
2021-10-05 16:53:00 +00:00
|
|
|
} else {
|
2021-06-25 13:35:30 +00:00
|
|
|
|
2023-12-04 13:53:09 +00:00
|
|
|
constexpr uint32_t groupCount2Register = RegisterOffsets::csGprR1;
|
2023-12-19 07:40:17 +00:00
|
|
|
constexpr AluRegisters groupCount2AluRegister = AluRegisters::gpr1;
|
2021-06-25 13:35:30 +00:00
|
|
|
|
2023-12-04 13:53:09 +00:00
|
|
|
constexpr uint32_t groupSize1Register = RegisterOffsets::csGprR0;
|
2023-12-19 07:40:17 +00:00
|
|
|
constexpr AluRegisters groupSize1AluRegister = AluRegisters::gpr0;
|
2021-06-25 13:35:30 +00:00
|
|
|
|
2023-12-04 13:53:09 +00:00
|
|
|
constexpr uint32_t groupCount1Register = RegisterOffsets::csGprR1;
|
2023-12-19 07:40:17 +00:00
|
|
|
constexpr AluRegisters groupCount1AluRegister = AluRegisters::gpr1;
|
2021-06-25 13:35:30 +00:00
|
|
|
|
2023-12-19 07:40:17 +00:00
|
|
|
constexpr AluRegisters sumAluRegister = AluRegisters::gpr0;
|
2021-06-25 13:35:30 +00:00
|
|
|
|
2023-12-19 07:40:17 +00:00
|
|
|
constexpr AluRegisters workDimEq3AluRegister = AluRegisters::gpr3;
|
2021-06-25 13:35:30 +00:00
|
|
|
|
2023-12-19 07:40:17 +00:00
|
|
|
constexpr AluRegisters workDimGe2AluRegister = AluRegisters::gpr4;
|
2021-06-25 13:35:30 +00:00
|
|
|
|
2023-12-04 13:53:09 +00:00
|
|
|
constexpr uint32_t constantOneRegister = RegisterOffsets::csGprR5;
|
2023-12-19 07:40:17 +00:00
|
|
|
constexpr AluRegisters constantOneAluRegister = AluRegisters::gpr5;
|
2023-12-04 13:53:09 +00:00
|
|
|
constexpr uint32_t constantTwoRegister = RegisterOffsets::csGprR6;
|
2023-12-19 07:40:17 +00:00
|
|
|
constexpr AluRegisters constantTwoAluRegister = AluRegisters::gpr6;
|
2021-06-25 13:35:30 +00:00
|
|
|
|
2023-12-04 13:53:09 +00:00
|
|
|
constexpr uint32_t backupRegister = RegisterOffsets::csGprR7;
|
2023-12-19 07:40:17 +00:00
|
|
|
constexpr AluRegisters backupAluRegister = AluRegisters::gpr7;
|
2021-09-24 12:20:21 +00:00
|
|
|
|
2023-12-04 13:53:09 +00:00
|
|
|
constexpr uint32_t memoryMaskRegister = RegisterOffsets::csGprR8;
|
2023-12-19 07:40:17 +00:00
|
|
|
constexpr AluRegisters memoryMaskAluRegister = AluRegisters::gpr8;
|
2021-09-24 12:20:21 +00:00
|
|
|
|
2023-12-04 13:53:09 +00:00
|
|
|
constexpr uint32_t offsetRegister = RegisterOffsets::csGprR8;
|
2023-12-19 07:40:17 +00:00
|
|
|
constexpr AluRegisters offsetAluRegister = AluRegisters::gpr8;
|
2021-09-24 12:20:21 +00:00
|
|
|
|
|
|
|
|
if (offset) {
|
2022-05-16 13:46:02 +00:00
|
|
|
EncodeSetMMIO<Family>::encodeMEM(container, backupRegister, dstPtr);
|
|
|
|
|
EncodeSetMMIO<Family>::encodeIMM(container, memoryMaskRegister, memoryMask, true);
|
|
|
|
|
EncodeMath<Family>::bitwiseAnd(container, memoryMaskAluRegister, backupAluRegister, backupAluRegister);
|
|
|
|
|
EncodeSetMMIO<Family>::encodeIMM(container, offsetRegister, offset, true);
|
2021-09-24 12:20:21 +00:00
|
|
|
}
|
|
|
|
|
|
2022-05-16 13:46:02 +00:00
|
|
|
EncodeSetMMIO<Family>::encodeIMM(container, constantOneRegister, 1, true);
|
|
|
|
|
EncodeSetMMIO<Family>::encodeIMM(container, constantTwoRegister, 2, true);
|
2021-10-05 16:53:00 +00:00
|
|
|
|
2023-12-04 13:53:09 +00:00
|
|
|
EncodeSetMMIO<Family>::encodeREG(container, groupCount2Register, RegisterOffsets::gpgpuDispatchDim[2]);
|
2021-10-05 16:53:00 +00:00
|
|
|
|
2022-05-16 13:46:02 +00:00
|
|
|
EncodeMath<Family>::greaterThan(container, groupCount2AluRegister, constantOneAluRegister, workDimEq3AluRegister);
|
|
|
|
|
EncodeMath<Family>::bitwiseAnd(container, workDimEq3AluRegister, constantOneAluRegister, workDimEq3AluRegister);
|
2021-10-05 16:53:00 +00:00
|
|
|
|
2022-05-16 13:46:02 +00:00
|
|
|
EncodeSetMMIO<Family>::encodeIMM(container, groupSize1Register, groupSize[1], true);
|
2023-12-04 13:53:09 +00:00
|
|
|
EncodeSetMMIO<Family>::encodeREG(container, groupCount1Register, RegisterOffsets::gpgpuDispatchDim[1]);
|
2021-06-25 13:35:30 +00:00
|
|
|
|
2022-05-16 13:46:02 +00:00
|
|
|
EncodeMath<Family>::addition(container, groupSize1AluRegister, groupCount1AluRegister, sumAluRegister);
|
|
|
|
|
EncodeMath<Family>::addition(container, sumAluRegister, workDimEq3AluRegister, sumAluRegister);
|
|
|
|
|
EncodeMath<Family>::greaterThan(container, sumAluRegister, constantTwoAluRegister, workDimGe2AluRegister);
|
|
|
|
|
EncodeMath<Family>::bitwiseAnd(container, workDimGe2AluRegister, constantOneAluRegister, workDimGe2AluRegister);
|
2021-06-25 13:35:30 +00:00
|
|
|
|
2021-09-24 12:20:21 +00:00
|
|
|
if (offset) {
|
2022-05-16 13:46:02 +00:00
|
|
|
EncodeMath<Family>::addition(container, constantOneAluRegister, offsetAluRegister, constantOneAluRegister);
|
|
|
|
|
EncodeMath<Family>::addition(container, workDimEq3AluRegister, offsetAluRegister, workDimEq3AluRegister);
|
|
|
|
|
EncodeMath<Family>::bitwiseAnd(container, workDimEq3AluRegister, constantOneAluRegister, workDimEq3AluRegister);
|
|
|
|
|
EncodeMath<Family>::addition(container, workDimGe2AluRegister, offsetAluRegister, workDimGe2AluRegister);
|
|
|
|
|
EncodeMath<Family>::bitwiseAnd(container, workDimGe2AluRegister, constantOneAluRegister, workDimGe2AluRegister);
|
2021-09-24 12:20:21 +00:00
|
|
|
}
|
|
|
|
|
|
2022-05-16 13:46:02 +00:00
|
|
|
EncodeSetMMIO<Family>::encodeREG(container, resultRegister, constantOneRegister);
|
|
|
|
|
EncodeMath<Family>::addition(container, resultAluRegister, workDimGe2AluRegister, resultAluRegister);
|
|
|
|
|
EncodeMath<Family>::addition(container, resultAluRegister, workDimEq3AluRegister, resultAluRegister);
|
2021-09-24 12:20:21 +00:00
|
|
|
|
|
|
|
|
if (offset) {
|
2022-05-16 13:46:02 +00:00
|
|
|
EncodeMath<Family>::addition(container, resultAluRegister, backupAluRegister, resultAluRegister);
|
2021-09-24 12:20:21 +00:00
|
|
|
}
|
2021-06-25 13:35:30 +00:00
|
|
|
}
|
2022-05-16 13:46:02 +00:00
|
|
|
EncodeStoreMMIO<Family>::encode(*container.getCommandStream(), resultRegister, dstPtr, false);
|
2021-06-25 13:35:30 +00:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2020-11-27 09:22:59 +00:00
|
|
|
template <typename Family>
|
2022-09-13 12:47:58 +00:00
|
|
|
bool EncodeSurfaceState<Family>::doBindingTablePrefetch() {
|
|
|
|
|
auto enableBindingTablePrefetech = isBindingTablePrefetchPreferred();
|
2023-11-30 08:32:25 +00:00
|
|
|
if (debugManager.flags.ForceBtpPrefetchMode.get() != -1) {
|
|
|
|
|
enableBindingTablePrefetech = static_cast<bool>(debugManager.flags.ForceBtpPrefetchMode.get());
|
2020-11-27 09:22:59 +00:00
|
|
|
}
|
2022-09-13 12:47:58 +00:00
|
|
|
return enableBindingTablePrefetech;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
template <typename Family>
|
|
|
|
|
void EncodeDispatchKernel<Family>::adjustBindingTablePrefetch(INTERFACE_DESCRIPTOR_DATA &interfaceDescriptor, uint32_t samplerCount, uint32_t bindingTableEntryCount) {
|
|
|
|
|
auto enablePrefetch = EncodeSurfaceState<Family>::doBindingTablePrefetch();
|
2020-11-27 09:22:59 +00:00
|
|
|
|
|
|
|
|
if (enablePrefetch) {
|
|
|
|
|
interfaceDescriptor.setSamplerCount(static_cast<typename INTERFACE_DESCRIPTOR_DATA::SAMPLER_COUNT>((samplerCount + 3) / 4));
|
|
|
|
|
interfaceDescriptor.setBindingTableEntryCount(std::min(bindingTableEntryCount, 31u));
|
|
|
|
|
} else {
|
|
|
|
|
interfaceDescriptor.setSamplerCount(INTERFACE_DESCRIPTOR_DATA::SAMPLER_COUNT::SAMPLER_COUNT_NO_SAMPLERS_USED);
|
|
|
|
|
interfaceDescriptor.setBindingTableEntryCount(0u);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
template <typename Family>
|
2023-11-23 13:58:58 +00:00
|
|
|
template <typename WalkerType, typename InterfaceDescriptorType>
|
|
|
|
|
void EncodeDispatchKernel<Family>::adjustInterfaceDescriptorData(InterfaceDescriptorType &interfaceDescriptor, const Device &device, const HardwareInfo &hwInfo, const uint32_t threadGroupCount, const uint32_t numGrf, WalkerType &walkerCmd) {}
|
2020-11-27 09:22:59 +00:00
|
|
|
|
2022-09-26 22:28:10 +00:00
|
|
|
template <typename Family>
|
2023-02-02 18:57:24 +00:00
|
|
|
size_t EncodeDispatchKernel<Family>::getSizeRequiredDsh(const KernelDescriptor &kernelDescriptor, uint32_t iddCount) {
|
2022-09-26 22:28:10 +00:00
|
|
|
using INTERFACE_DESCRIPTOR_DATA = typename Family::INTERFACE_DESCRIPTOR_DATA;
|
|
|
|
|
constexpr auto samplerStateSize = sizeof(typename Family::SAMPLER_STATE);
|
2022-12-08 17:23:33 +00:00
|
|
|
const auto numSamplers = kernelDescriptor.payloadMappings.samplerTable.numSamplers;
|
2023-02-02 18:57:24 +00:00
|
|
|
const auto additionalDshSize = additionalSizeRequiredDsh(iddCount);
|
2022-09-26 22:28:10 +00:00
|
|
|
if (numSamplers == 0U) {
|
2023-02-02 18:57:24 +00:00
|
|
|
return alignUp(additionalDshSize, EncodeDispatchKernel<Family>::getDefaultDshAlignment());
|
2022-09-26 22:28:10 +00:00
|
|
|
}
|
|
|
|
|
|
2022-12-08 17:23:33 +00:00
|
|
|
size_t size = kernelDescriptor.payloadMappings.samplerTable.tableOffset -
|
|
|
|
|
kernelDescriptor.payloadMappings.samplerTable.borderColor;
|
2023-02-02 18:57:24 +00:00
|
|
|
size = alignUp(size, EncodeDispatchKernel<Family>::getDefaultDshAlignment());
|
2022-09-26 22:28:10 +00:00
|
|
|
|
|
|
|
|
size += numSamplers * samplerStateSize;
|
|
|
|
|
size = alignUp(size, INTERFACE_DESCRIPTOR_DATA::SAMPLERSTATEPOINTER_ALIGN_SIZE);
|
|
|
|
|
|
|
|
|
|
if (additionalDshSize > 0) {
|
2023-07-17 10:00:40 +00:00
|
|
|
size = alignUp(size, EncodeStates<Family>::alignInterfaceDescriptorData);
|
2022-09-26 22:28:10 +00:00
|
|
|
size += additionalDshSize;
|
2023-02-02 18:57:24 +00:00
|
|
|
size = alignUp(size, EncodeDispatchKernel<Family>::getDefaultDshAlignment());
|
2022-09-26 22:28:10 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return size;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
template <typename Family>
|
|
|
|
|
size_t EncodeDispatchKernel<Family>::getSizeRequiredSsh(const KernelInfo &kernelInfo) {
|
2023-04-28 09:38:31 +00:00
|
|
|
size_t requiredSshSize = kernelInfo.heapInfo.surfaceStateHeapSize;
|
2023-06-14 18:26:31 +00:00
|
|
|
bool isBindlessKernel = NEO::KernelDescriptor ::isBindlessAddressingKernel(kernelInfo.kernelDescriptor);
|
|
|
|
|
if (isBindlessKernel) {
|
2023-08-17 08:17:57 +00:00
|
|
|
requiredSshSize = std::max(requiredSshSize, kernelInfo.kernelDescriptor.kernelAttributes.numArgsStateful * sizeof(typename Family::RENDER_SURFACE_STATE));
|
2023-06-14 18:26:31 +00:00
|
|
|
}
|
2023-02-02 18:57:24 +00:00
|
|
|
requiredSshSize = alignUp(requiredSshSize, EncodeDispatchKernel<Family>::getDefaultSshAlignment());
|
2022-09-26 22:28:10 +00:00
|
|
|
return requiredSshSize;
|
|
|
|
|
}
|
|
|
|
|
|
2023-02-02 18:57:24 +00:00
|
|
|
template <typename Family>
|
|
|
|
|
size_t EncodeDispatchKernel<Family>::getDefaultDshAlignment() {
|
|
|
|
|
return EncodeStates<Family>::alignIndirectStatePointer;
|
|
|
|
|
}
|
|
|
|
|
|
2020-10-07 14:22:26 +02:00
|
|
|
template <typename Family>
|
2021-10-06 17:32:04 +00:00
|
|
|
void EncodeIndirectParams<Family>::setGlobalWorkSizeIndirect(CommandContainer &container, const NEO::CrossThreadDataOffset offsets[3], uint64_t crossThreadAddress, const uint32_t *lws) {
|
2020-10-07 14:22:26 +02:00
|
|
|
for (int i = 0; i < 3; ++i) {
|
|
|
|
|
if (NEO::isUndefinedOffset(offsets[i])) {
|
|
|
|
|
continue;
|
|
|
|
|
}
|
2023-12-04 13:53:09 +00:00
|
|
|
EncodeMathMMIO<Family>::encodeMulRegVal(container, RegisterOffsets::gpgpuDispatchDim[i], lws[i], ptrOffset(crossThreadAddress, offsets[i]));
|
2020-10-07 14:22:26 +02:00
|
|
|
}
|
2020-01-17 08:56:05 +01:00
|
|
|
}
|
|
|
|
|
|
2021-09-24 12:20:21 +00:00
|
|
|
template <typename Family>
|
|
|
|
|
inline size_t EncodeIndirectParams<Family>::getCmdsSizeForSetWorkDimIndirect(const uint32_t *groupSize, bool misaligedPtr) {
|
2023-12-04 13:53:09 +00:00
|
|
|
constexpr uint32_t aluCmdSize = sizeof(MI_MATH) + sizeof(MI_MATH_ALU_INST_INLINE) * RegisterConstants::numAluInstForReadModifyWrite;
|
2021-09-24 12:20:21 +00:00
|
|
|
auto requiredSize = sizeof(MI_STORE_REGISTER_MEM) + sizeof(MI_LOAD_REGISTER_IMM);
|
|
|
|
|
UNRECOVERABLE_IF(!groupSize);
|
|
|
|
|
if (groupSize[2] < 2) {
|
|
|
|
|
requiredSize += 2 * sizeof(MI_LOAD_REGISTER_IMM) + 3 * sizeof(MI_LOAD_REGISTER_REG) + 8 * aluCmdSize;
|
|
|
|
|
if (misaligedPtr) {
|
|
|
|
|
requiredSize += 2 * sizeof(MI_LOAD_REGISTER_IMM) + sizeof(MI_LOAD_REGISTER_MEM) + 7 * aluCmdSize;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
return requiredSize;
|
|
|
|
|
}
|
2023-09-11 15:39:43 +00:00
|
|
|
|
2020-01-24 14:58:15 +01:00
|
|
|
template <typename Family>
|
2023-09-12 11:42:40 +00:00
|
|
|
void EncodeSemaphore<Family>::appendSemaphoreCommand(MI_SEMAPHORE_WAIT &cmd, uint64_t compareData, bool indirect, bool useQwordData) {
|
2023-09-11 15:39:43 +00:00
|
|
|
constexpr uint64_t upper32b = static_cast<uint64_t>(std::numeric_limits<uint32_t>::max()) << 32;
|
|
|
|
|
UNRECOVERABLE_IF(useQwordData || (compareData & upper32b));
|
2020-01-24 14:58:15 +01:00
|
|
|
}
|
|
|
|
|
|
2020-02-11 15:21:18 +01:00
|
|
|
template <typename Family>
|
2023-03-10 13:49:06 +00:00
|
|
|
void EncodeSemaphore<Family>::addMiSemaphoreWaitCommand(LinearStream &commandStream,
|
2020-02-11 15:21:18 +01:00
|
|
|
uint64_t compareAddress,
|
2023-09-11 15:39:43 +00:00
|
|
|
uint64_t compareData,
|
2020-10-16 15:58:47 +02:00
|
|
|
COMPARE_OPERATION compareMode,
|
2023-09-11 15:39:43 +00:00
|
|
|
bool registerPollMode,
|
2023-09-12 11:42:40 +00:00
|
|
|
bool useQwordData,
|
|
|
|
|
bool indirect) {
|
2020-02-11 15:21:18 +01:00
|
|
|
auto semaphoreCommand = commandStream.getSpaceForCmd<MI_SEMAPHORE_WAIT>();
|
2023-09-12 11:42:40 +00:00
|
|
|
programMiSemaphoreWait(semaphoreCommand, compareAddress, compareData, compareMode, registerPollMode, true, useQwordData, indirect);
|
2023-03-03 19:01:14 +00:00
|
|
|
}
|
|
|
|
|
template <typename Family>
|
2023-03-10 13:49:06 +00:00
|
|
|
void EncodeSemaphore<Family>::applyMiSemaphoreWaitCommand(LinearStream &commandStream, std::list<void *> &commandsList) {
|
2023-03-03 19:01:14 +00:00
|
|
|
MI_SEMAPHORE_WAIT *semaphoreCommand = commandStream.getSpaceForCmd<MI_SEMAPHORE_WAIT>();
|
|
|
|
|
commandsList.push_back(semaphoreCommand);
|
2020-02-11 15:21:18 +01:00
|
|
|
}
|
|
|
|
|
|
2021-03-04 17:54:14 +00:00
|
|
|
template <typename Family>
|
2021-06-09 10:00:13 +00:00
|
|
|
inline void EncodeAtomic<Family>::setMiAtomicAddress(MI_ATOMIC &atomic, uint64_t writeAddress) {
|
2021-03-04 17:54:14 +00:00
|
|
|
atomic.setMemoryAddress(static_cast<uint32_t>(writeAddress & 0x0000FFFFFFFFULL));
|
|
|
|
|
atomic.setMemoryAddressHigh(static_cast<uint32_t>(writeAddress >> 32));
|
|
|
|
|
}
|
|
|
|
|
|
2020-01-24 14:58:15 +01:00
|
|
|
template <typename Family>
|
2020-10-01 21:08:46 +02:00
|
|
|
void EncodeAtomic<Family>::programMiAtomic(MI_ATOMIC *atomic,
|
|
|
|
|
uint64_t writeAddress,
|
2020-01-24 14:58:15 +01:00
|
|
|
ATOMIC_OPCODES opcode,
|
2020-10-01 21:08:46 +02:00
|
|
|
DATA_SIZE dataSize,
|
|
|
|
|
uint32_t returnDataControl,
|
2021-03-04 17:54:14 +00:00
|
|
|
uint32_t csStall,
|
|
|
|
|
uint32_t operand1dword0,
|
|
|
|
|
uint32_t operand1dword1) {
|
2020-04-08 18:33:03 +02:00
|
|
|
MI_ATOMIC cmd = Family::cmdInitAtomic;
|
|
|
|
|
cmd.setAtomicOpcode(opcode);
|
|
|
|
|
cmd.setDataSize(dataSize);
|
2021-03-04 17:54:14 +00:00
|
|
|
EncodeAtomic<Family>::setMiAtomicAddress(cmd, writeAddress);
|
2020-10-01 21:08:46 +02:00
|
|
|
cmd.setReturnDataControl(returnDataControl);
|
|
|
|
|
cmd.setCsStall(csStall);
|
2021-03-04 17:54:14 +00:00
|
|
|
if (opcode == ATOMIC_OPCODES::ATOMIC_4B_MOVE ||
|
|
|
|
|
opcode == ATOMIC_OPCODES::ATOMIC_8B_MOVE) {
|
|
|
|
|
cmd.setDwordLength(MI_ATOMIC::DWORD_LENGTH::DWORD_LENGTH_INLINE_DATA_1);
|
|
|
|
|
cmd.setInlineData(0x1);
|
|
|
|
|
cmd.setOperand1DataDword0(operand1dword0);
|
|
|
|
|
cmd.setOperand1DataDword1(operand1dword1);
|
|
|
|
|
}
|
2020-04-08 18:33:03 +02:00
|
|
|
|
|
|
|
|
*atomic = cmd;
|
2020-01-24 14:58:15 +01:00
|
|
|
}
|
|
|
|
|
|
2020-10-07 14:22:26 +02:00
|
|
|
template <typename Family>
|
|
|
|
|
void EncodeAtomic<Family>::programMiAtomic(LinearStream &commandStream,
|
|
|
|
|
uint64_t writeAddress,
|
|
|
|
|
ATOMIC_OPCODES opcode,
|
|
|
|
|
DATA_SIZE dataSize,
|
|
|
|
|
uint32_t returnDataControl,
|
2021-03-04 17:54:14 +00:00
|
|
|
uint32_t csStall,
|
|
|
|
|
uint32_t operand1dword0,
|
|
|
|
|
uint32_t operand1dword1) {
|
2020-10-01 21:08:46 +02:00
|
|
|
auto miAtomic = commandStream.getSpaceForCmd<MI_ATOMIC>();
|
2021-03-04 17:54:14 +00:00
|
|
|
EncodeAtomic<Family>::programMiAtomic(miAtomic, writeAddress, opcode, dataSize, returnDataControl, csStall, operand1dword0, operand1dword1);
|
2020-10-01 21:08:46 +02:00
|
|
|
}
|
|
|
|
|
|
2020-01-28 13:50:19 +01:00
|
|
|
template <typename Family>
|
2022-11-10 09:58:55 +00:00
|
|
|
void EncodeBatchBufferStartOrEnd<Family>::programConditionalDataMemBatchBufferStart(LinearStream &commandStream, uint64_t startAddress, uint64_t compareAddress,
|
2023-09-11 17:20:00 +00:00
|
|
|
uint64_t compareData, CompareOperation compareOperation, bool indirect, bool useQwordData) {
|
2023-12-04 13:53:09 +00:00
|
|
|
EncodeSetMMIO<Family>::encodeMEM(commandStream, RegisterOffsets::csGprR7, compareAddress);
|
2022-11-10 09:58:55 +00:00
|
|
|
|
2023-09-11 17:20:00 +00:00
|
|
|
if (useQwordData) {
|
2023-12-04 13:53:09 +00:00
|
|
|
EncodeSetMMIO<Family>::encodeMEM(commandStream, RegisterOffsets::csGprR7 + 4, compareAddress + 4);
|
2023-09-11 17:20:00 +00:00
|
|
|
} else {
|
2023-12-04 13:53:09 +00:00
|
|
|
LriHelper<Family>::program(&commandStream, RegisterOffsets::csGprR7 + 4, 0, true);
|
2023-09-11 17:20:00 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
uint32_t compareDataLow = static_cast<uint32_t>(compareData & std::numeric_limits<uint32_t>::max());
|
|
|
|
|
uint32_t compareDataHigh = useQwordData ? static_cast<uint32_t>(compareData >> 32) : 0;
|
|
|
|
|
|
2023-12-04 13:53:09 +00:00
|
|
|
LriHelper<Family>::program(&commandStream, RegisterOffsets::csGprR8, compareDataLow, true);
|
|
|
|
|
LriHelper<Family>::program(&commandStream, RegisterOffsets::csGprR8 + 4, compareDataHigh, true);
|
2022-11-10 09:58:55 +00:00
|
|
|
|
2023-12-19 07:40:17 +00:00
|
|
|
programConditionalBatchBufferStartBase(commandStream, startAddress, AluRegisters::gpr7, AluRegisters::gpr8, compareOperation, indirect);
|
2022-11-10 09:58:55 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
template <typename Family>
|
|
|
|
|
void EncodeBatchBufferStartOrEnd<Family>::programConditionalDataRegBatchBufferStart(LinearStream &commandStream, uint64_t startAddress, uint32_t compareReg,
|
2023-09-11 17:20:00 +00:00
|
|
|
uint64_t compareData, CompareOperation compareOperation, bool indirect, bool useQwordData) {
|
2023-12-04 13:53:09 +00:00
|
|
|
EncodeSetMMIO<Family>::encodeREG(commandStream, RegisterOffsets::csGprR7, compareReg);
|
2023-09-11 17:20:00 +00:00
|
|
|
if (useQwordData) {
|
2023-12-04 13:53:09 +00:00
|
|
|
EncodeSetMMIO<Family>::encodeREG(commandStream, RegisterOffsets::csGprR7 + 4, compareReg + 4);
|
2023-09-11 17:20:00 +00:00
|
|
|
} else {
|
2023-12-04 13:53:09 +00:00
|
|
|
LriHelper<Family>::program(&commandStream, RegisterOffsets::csGprR7 + 4, 0, true);
|
2023-09-11 17:20:00 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
uint32_t compareDataLow = static_cast<uint32_t>(compareData & std::numeric_limits<uint32_t>::max());
|
|
|
|
|
uint32_t compareDataHigh = useQwordData ? static_cast<uint32_t>(compareData >> 32) : 0;
|
2022-11-10 09:58:55 +00:00
|
|
|
|
2023-12-04 13:53:09 +00:00
|
|
|
LriHelper<Family>::program(&commandStream, RegisterOffsets::csGprR8, compareDataLow, true);
|
|
|
|
|
LriHelper<Family>::program(&commandStream, RegisterOffsets::csGprR8 + 4, compareDataHigh, true);
|
2022-11-10 09:58:55 +00:00
|
|
|
|
2023-12-19 07:40:17 +00:00
|
|
|
programConditionalBatchBufferStartBase(commandStream, startAddress, AluRegisters::gpr7, AluRegisters::gpr8, compareOperation, indirect);
|
2022-11-10 09:58:55 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
template <typename Family>
|
|
|
|
|
void EncodeBatchBufferStartOrEnd<Family>::programConditionalRegRegBatchBufferStart(LinearStream &commandStream, uint64_t startAddress, AluRegisters compareReg0,
|
|
|
|
|
AluRegisters compareReg1, CompareOperation compareOperation, bool indirect) {
|
|
|
|
|
|
|
|
|
|
programConditionalBatchBufferStartBase(commandStream, startAddress, compareReg0, compareReg1, compareOperation, indirect);
|
2023-04-03 17:57:51 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
template <typename Family>
|
|
|
|
|
void EncodeBatchBufferStartOrEnd<Family>::programConditionalRegMemBatchBufferStart(LinearStream &commandStream, uint64_t startAddress, uint64_t compareAddress, uint32_t compareReg,
|
|
|
|
|
CompareOperation compareOperation, bool indirect) {
|
2023-12-04 13:53:09 +00:00
|
|
|
EncodeSetMMIO<Family>::encodeMEM(commandStream, RegisterOffsets::csGprR7, compareAddress);
|
|
|
|
|
LriHelper<Family>::program(&commandStream, RegisterOffsets::csGprR7 + 4, 0, true);
|
2023-04-03 17:57:51 +00:00
|
|
|
|
2023-12-04 13:53:09 +00:00
|
|
|
EncodeSetMMIO<Family>::encodeREG(commandStream, RegisterOffsets::csGprR8, compareReg);
|
|
|
|
|
LriHelper<Family>::program(&commandStream, RegisterOffsets::csGprR8 + 4, 0, true);
|
2023-04-03 17:57:51 +00:00
|
|
|
|
2023-12-19 07:40:17 +00:00
|
|
|
programConditionalBatchBufferStartBase(commandStream, startAddress, AluRegisters::gpr7, AluRegisters::gpr8, compareOperation, indirect);
|
2022-11-10 09:58:55 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
template <typename Family>
|
|
|
|
|
void EncodeBatchBufferStartOrEnd<Family>::programConditionalBatchBufferStartBase(LinearStream &commandStream, uint64_t startAddress, AluRegisters regA, AluRegisters regB,
|
|
|
|
|
CompareOperation compareOperation, bool indirect) {
|
|
|
|
|
EncodeAluHelper<Family, 4> aluHelper;
|
2023-12-19 07:40:17 +00:00
|
|
|
aluHelper.setNextAlu(AluRegisters::opcodeLoad, AluRegisters::srca, regA);
|
|
|
|
|
aluHelper.setNextAlu(AluRegisters::opcodeLoad, AluRegisters::srcb, regB);
|
|
|
|
|
aluHelper.setNextAlu(AluRegisters::opcodeSub);
|
|
|
|
|
|
|
|
|
|
if ((compareOperation == CompareOperation::equal) || (compareOperation == CompareOperation::notEqual)) {
|
|
|
|
|
aluHelper.setNextAlu(AluRegisters::opcodeStore, AluRegisters::gpr7, AluRegisters::zf);
|
|
|
|
|
} else if ((compareOperation == CompareOperation::greaterOrEqual) || (compareOperation == CompareOperation::less)) {
|
|
|
|
|
aluHelper.setNextAlu(AluRegisters::opcodeStore, AluRegisters::gpr7, AluRegisters::cf);
|
2023-05-05 10:14:07 +00:00
|
|
|
} else {
|
|
|
|
|
UNRECOVERABLE_IF(true);
|
2022-11-10 09:58:55 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
aluHelper.copyToCmdStream(commandStream);
|
|
|
|
|
|
2023-12-04 13:53:09 +00:00
|
|
|
EncodeSetMMIO<Family>::encodeREG(commandStream, RegisterOffsets::csPredicateResult2, RegisterOffsets::csGprR7);
|
2022-11-10 09:58:55 +00:00
|
|
|
|
2023-12-13 16:09:52 +00:00
|
|
|
MiPredicateType predicateType = MiPredicateType::noopOnResult2Clear; // Equal or Less
|
2023-12-19 07:40:17 +00:00
|
|
|
if ((compareOperation == CompareOperation::notEqual) || (compareOperation == CompareOperation::greaterOrEqual)) {
|
2023-12-13 16:09:52 +00:00
|
|
|
predicateType = MiPredicateType::noopOnResult2Set;
|
2022-11-10 09:58:55 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
EncodeMiPredicate<Family>::encode(commandStream, predicateType);
|
|
|
|
|
|
|
|
|
|
programBatchBufferStart(&commandStream, startAddress, false, indirect, true);
|
|
|
|
|
|
2023-12-13 16:09:52 +00:00
|
|
|
EncodeMiPredicate<Family>::encode(commandStream, MiPredicateType::disable);
|
2022-11-10 09:58:55 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
template <typename Family>
|
2023-04-05 13:21:45 +00:00
|
|
|
void EncodeBatchBufferStartOrEnd<Family>::programBatchBufferStart(MI_BATCH_BUFFER_START *cmdBuffer, uint64_t address, bool secondLevel, bool indirect, bool predicate) {
|
2020-01-28 13:50:19 +01:00
|
|
|
MI_BATCH_BUFFER_START cmd = Family::cmdInitBatchBufferStart;
|
|
|
|
|
if (secondLevel) {
|
|
|
|
|
cmd.setSecondLevelBatchBuffer(MI_BATCH_BUFFER_START::SECOND_LEVEL_BATCH_BUFFER_SECOND_LEVEL_BATCH);
|
|
|
|
|
}
|
|
|
|
|
cmd.setAddressSpaceIndicator(MI_BATCH_BUFFER_START::ADDRESS_SPACE_INDICATOR_PPGTT);
|
2021-12-16 18:02:45 +00:00
|
|
|
cmd.setBatchBufferStartAddress(address);
|
2022-11-10 09:58:55 +00:00
|
|
|
|
|
|
|
|
appendBatchBufferStart(cmd, indirect, predicate);
|
|
|
|
|
|
2023-04-05 13:21:45 +00:00
|
|
|
*cmdBuffer = cmd;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
template <typename Family>
|
|
|
|
|
void EncodeBatchBufferStartOrEnd<Family>::programBatchBufferStart(LinearStream *commandStream, uint64_t address, bool secondLevel, bool indirect, bool predicate) {
|
|
|
|
|
programBatchBufferStart(commandStream->getSpaceForCmd<MI_BATCH_BUFFER_START>(), address, secondLevel, indirect, predicate);
|
2020-01-28 13:50:19 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
template <typename Family>
|
2022-09-02 13:10:48 +00:00
|
|
|
void EncodeBatchBufferStartOrEnd<Family>::programBatchBufferEnd(LinearStream &commandStream) {
|
2020-01-28 13:50:19 +01:00
|
|
|
MI_BATCH_BUFFER_END cmd = Family::cmdInitBatchBufferEnd;
|
2022-09-02 13:10:48 +00:00
|
|
|
auto buffer = commandStream.getSpaceForCmd<MI_BATCH_BUFFER_END>();
|
2020-04-08 18:33:03 +02:00
|
|
|
*buffer = cmd;
|
2020-01-28 13:50:19 +01:00
|
|
|
}
|
|
|
|
|
|
2022-09-02 13:10:48 +00:00
|
|
|
template <typename Family>
|
|
|
|
|
void EncodeBatchBufferStartOrEnd<Family>::programBatchBufferEnd(CommandContainer &container) {
|
|
|
|
|
programBatchBufferEnd(*container.getCommandStream());
|
|
|
|
|
}
|
|
|
|
|
|
2023-03-06 12:42:09 +00:00
|
|
|
template <typename GfxFamily>
|
|
|
|
|
void EncodeMiFlushDW<GfxFamily>::appendWa(LinearStream &commandStream, MiFlushArgs &args) {
|
|
|
|
|
BlitCommandsHelper<GfxFamily>::dispatchDummyBlit(commandStream, args.waArgs);
|
|
|
|
|
}
|
|
|
|
|
|
2021-09-03 11:42:31 +00:00
|
|
|
template <typename Family>
|
2023-03-06 12:42:09 +00:00
|
|
|
void EncodeMiFlushDW<Family>::programWithWa(LinearStream &commandStream, uint64_t immediateDataGpuAddress, uint64_t immediateData,
|
|
|
|
|
MiFlushArgs &args) {
|
|
|
|
|
appendWa(commandStream, args);
|
2020-03-04 17:31:21 +01:00
|
|
|
|
2020-02-21 15:35:08 +01:00
|
|
|
auto miFlushDwCmd = commandStream.getSpaceForCmd<MI_FLUSH_DW>();
|
2021-09-03 11:42:31 +00:00
|
|
|
MI_FLUSH_DW miFlush = Family::cmdInitMiFlushDw;
|
2021-06-17 11:55:28 +00:00
|
|
|
if (args.commandWithPostSync) {
|
|
|
|
|
auto postSyncType = args.timeStampOperation ? MI_FLUSH_DW::POST_SYNC_OPERATION_WRITE_TIMESTAMP_REGISTER : MI_FLUSH_DW::POST_SYNC_OPERATION_WRITE_IMMEDIATE_DATA_QWORD;
|
2020-04-08 18:33:03 +02:00
|
|
|
miFlush.setPostSyncOperation(postSyncType);
|
|
|
|
|
miFlush.setDestinationAddress(immediateDataGpuAddress);
|
|
|
|
|
miFlush.setImmediateData(immediateData);
|
2020-04-07 16:50:09 +02:00
|
|
|
}
|
2021-06-17 11:55:28 +00:00
|
|
|
miFlush.setNotifyEnable(args.notifyEnable);
|
2021-07-29 06:40:42 +00:00
|
|
|
miFlush.setTlbInvalidate(args.tlbFlush);
|
2023-03-06 12:42:09 +00:00
|
|
|
adjust(&miFlush, args.waArgs.rootDeviceEnvironment->getProductHelper());
|
2020-04-08 18:33:03 +02:00
|
|
|
*miFlushDwCmd = miFlush;
|
2020-02-21 15:35:08 +01:00
|
|
|
}
|
|
|
|
|
|
2021-09-03 11:42:31 +00:00
|
|
|
template <typename Family>
|
2023-03-06 12:42:09 +00:00
|
|
|
size_t EncodeMiFlushDW<Family>::getWaSize(const EncodeDummyBlitWaArgs &waArgs) {
|
|
|
|
|
return BlitCommandsHelper<Family>::getDummyBlitSize(waArgs);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
template <typename Family>
|
|
|
|
|
size_t EncodeMiFlushDW<Family>::getCommandSizeWithWa(const EncodeDummyBlitWaArgs &waArgs) {
|
|
|
|
|
return sizeof(typename Family::MI_FLUSH_DW) + EncodeMiFlushDW<Family>::getWaSize(waArgs);
|
2020-03-13 12:29:45 +01:00
|
|
|
}
|
|
|
|
|
|
2021-09-03 11:42:31 +00:00
|
|
|
template <typename Family>
|
2023-01-25 19:28:09 +00:00
|
|
|
inline void EncodeMemoryPrefetch<Family>::programMemoryPrefetch(LinearStream &commandStream, const GraphicsAllocation &graphicsAllocation, uint32_t size, size_t offset, const RootDeviceEnvironment &rootDeviceEnvironment) {}
|
2020-04-03 17:38:09 +02:00
|
|
|
|
2021-09-03 11:42:31 +00:00
|
|
|
template <typename Family>
|
2023-01-25 19:28:09 +00:00
|
|
|
inline size_t EncodeMemoryPrefetch<Family>::getSizeForMemoryPrefetch(size_t size, const RootDeviceEnvironment &rootDeviceEnvironment) { return 0u; }
|
2020-04-03 17:38:09 +02:00
|
|
|
|
2020-11-16 17:12:08 +00:00
|
|
|
template <typename Family>
|
2023-02-28 21:08:09 +00:00
|
|
|
void EncodeMiArbCheck<Family>::program(LinearStream &commandStream, std::optional<bool> preParserDisable) {
|
2022-03-09 15:17:47 +00:00
|
|
|
MI_ARB_CHECK cmd = Family::cmdInitArbCheck;
|
|
|
|
|
|
2023-02-28 21:08:09 +00:00
|
|
|
EncodeMiArbCheck<Family>::adjust(cmd, preParserDisable);
|
2020-11-16 17:12:08 +00:00
|
|
|
auto miArbCheckStream = commandStream.getSpaceForCmd<MI_ARB_CHECK>();
|
2022-03-09 15:17:47 +00:00
|
|
|
*miArbCheckStream = cmd;
|
2020-11-16 17:12:08 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
template <typename Family>
|
2023-02-28 21:08:09 +00:00
|
|
|
size_t EncodeMiArbCheck<Family>::getCommandSize() { return sizeof(MI_ARB_CHECK); }
|
|
|
|
|
|
|
|
|
|
template <typename Family>
|
|
|
|
|
void EncodeMiArbCheck<Family>::programWithWa(LinearStream &commandStream, std::optional<bool> preParserDisable, EncodeDummyBlitWaArgs &waArgs) {
|
|
|
|
|
BlitCommandsHelper<Family>::dispatchDummyBlit(commandStream, waArgs);
|
|
|
|
|
EncodeMiArbCheck<Family>::program(commandStream, preParserDisable);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
template <typename Family>
|
|
|
|
|
size_t EncodeMiArbCheck<Family>::getCommandSizeWithWa(const EncodeDummyBlitWaArgs &waArgs) {
|
|
|
|
|
return EncodeMiArbCheck<Family>::getCommandSize() + BlitCommandsHelper<Family>::getDummyBlitSize(waArgs);
|
|
|
|
|
}
|
2020-11-16 17:12:08 +00:00
|
|
|
|
2021-11-17 22:36:00 +00:00
|
|
|
template <typename Family>
|
|
|
|
|
inline void EncodeNoop<Family>::alignToCacheLine(LinearStream &commandStream) {
|
|
|
|
|
auto used = commandStream.getUsed();
|
|
|
|
|
auto alignment = MemoryConstants::cacheLineSize;
|
|
|
|
|
auto partialCacheline = used & (alignment - 1);
|
|
|
|
|
if (partialCacheline) {
|
|
|
|
|
auto amountToPad = alignment - partialCacheline;
|
|
|
|
|
auto pCmd = commandStream.getSpace(amountToPad);
|
|
|
|
|
memset(pCmd, 0, amountToPad);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
template <typename Family>
|
|
|
|
|
inline void EncodeNoop<Family>::emitNoop(LinearStream &commandStream, size_t bytesToUpdate) {
|
|
|
|
|
if (bytesToUpdate) {
|
|
|
|
|
auto ptr = commandStream.getSpace(bytesToUpdate);
|
|
|
|
|
memset(ptr, 0, bytesToUpdate);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2021-12-02 14:17:45 +00:00
|
|
|
template <typename Family>
|
|
|
|
|
inline void EncodeStoreMemory<Family>::programStoreDataImm(LinearStream &commandStream,
|
|
|
|
|
uint64_t gpuAddress,
|
|
|
|
|
uint32_t dataDword0,
|
|
|
|
|
uint32_t dataDword1,
|
|
|
|
|
bool storeQword,
|
|
|
|
|
bool workloadPartitionOffset) {
|
|
|
|
|
auto miStoreDataImmBuffer = commandStream.getSpaceForCmd<MI_STORE_DATA_IMM>();
|
|
|
|
|
EncodeStoreMemory<Family>::programStoreDataImm(miStoreDataImmBuffer,
|
|
|
|
|
gpuAddress,
|
|
|
|
|
dataDword0,
|
|
|
|
|
dataDword1,
|
|
|
|
|
storeQword,
|
|
|
|
|
workloadPartitionOffset);
|
|
|
|
|
}
|
|
|
|
|
|
2022-02-02 17:40:00 +00:00
|
|
|
template <typename GfxFamily>
|
|
|
|
|
void EncodeEnableRayTracing<GfxFamily>::append3dStateBtd(void *ptr3dStateBtd) {}
|
|
|
|
|
|
2022-03-09 17:15:48 +00:00
|
|
|
template <typename GfxFamily>
|
|
|
|
|
inline void EncodeWA<GfxFamily>::setAdditionalPipeControlFlagsForNonPipelineStateCommand(PipeControlArgs &args) {}
|
|
|
|
|
|
2022-04-06 14:41:45 +00:00
|
|
|
template <typename Family>
|
|
|
|
|
size_t EncodeMemoryFence<Family>::getSystemMemoryFenceSize() {
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
template <typename Family>
|
2023-09-12 17:51:43 +00:00
|
|
|
void EncodeMemoryFence<Family>::encodeSystemMemoryFence(LinearStream &commandStream, const GraphicsAllocation *globalFenceAllocation) {
|
2022-04-06 14:41:45 +00:00
|
|
|
}
|
|
|
|
|
|
2022-11-08 11:05:43 +00:00
|
|
|
template <typename Family>
|
|
|
|
|
void EncodeMiPredicate<Family>::encode(LinearStream &cmdStream, [[maybe_unused]] MiPredicateType predicateType) {
|
|
|
|
|
if constexpr (Family::isUsingMiSetPredicate) {
|
|
|
|
|
using MI_SET_PREDICATE = typename Family::MI_SET_PREDICATE;
|
|
|
|
|
using PREDICATE_ENABLE = typename MI_SET_PREDICATE::PREDICATE_ENABLE;
|
|
|
|
|
|
|
|
|
|
auto miSetPredicate = Family::cmdInitSetPredicate;
|
|
|
|
|
miSetPredicate.setPredicateEnable(static_cast<PREDICATE_ENABLE>(predicateType));
|
|
|
|
|
|
|
|
|
|
*cmdStream.getSpaceForCmd<MI_SET_PREDICATE>() = miSetPredicate;
|
|
|
|
|
}
|
|
|
|
|
}
|
2023-07-27 12:36:00 +00:00
|
|
|
|
|
|
|
|
template <typename Family>
|
|
|
|
|
void EnodeUserInterrupt<Family>::encode(LinearStream &commandStream) {
|
|
|
|
|
*commandStream.getSpaceForCmd<typename Family::MI_USER_INTERRUPT>() = Family::cmdInitUserInterrupt;
|
|
|
|
|
}
|
|
|
|
|
|
2020-01-24 14:58:15 +01:00
|
|
|
} // namespace NEO
|