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Add command buffer helpers: Conditional BB_START and GPR Inc/Dec

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Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
This commit is contained in:
Dunajski, Bartosz
2022-11-10 09:58:55 +00:00
committed by Compute-Runtime-Automation
parent 9aeb0116d7
commit 002184586c
12 changed files with 537 additions and 21 deletions
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6
level_zero/core/source/cmdqueue/cmdqueue_hw.inl
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@@ -896,7 +896,7 @@ void CommandQueueHw<gfxCoreFamily>::programOneCmdListBatchBufferStart(CommandLis
if (isCommandListImmediate && (iter == (cmdBufferCount - 1))) { if (isCommandListImmediate && (iter == (cmdBufferCount - 1))) {
startOffset = ptrOffset(allocation->getGpuAddress(), commandList->commandContainer.currentLinearStreamStartOffset); startOffset = ptrOffset(allocation->getGpuAddress(), commandList->commandContainer.currentLinearStreamStartOffset);
} }
NEO::EncodeBatchBufferStartOrEnd<GfxFamily>::programBatchBufferStart(&cmdStream, startOffset, true); NEO::EncodeBatchBufferStartOrEnd<GfxFamily>::programBatchBufferStart(&cmdStream, startOffset, true, false, false);
if (returnPointsSize > 0) { if (returnPointsSize > 0) {
bool cmdBufferHasRestarts = std::find_if( bool cmdBufferHasRestarts = std::find_if(
std::next(returnPoints.begin(), returnPointIdx), std::next(returnPoints.begin(), returnPointIdx),
@@ -914,7 +914,7 @@ void CommandQueueHw<gfxCoreFamily>::programOneCmdListBatchBufferStart(CommandLis
ctx.cmdListBeginState); ctx.cmdListBeginState);
NEO::EncodeBatchBufferStartOrEnd<GfxFamily>::programBatchBufferStart(&cmdStream, NEO::EncodeBatchBufferStartOrEnd<GfxFamily>::programBatchBufferStart(&cmdStream,
returnPoints[returnPointIdx].gpuAddress, returnPoints[returnPointIdx].gpuAddress,
true); true, false, false);
returnPointIdx++; returnPointIdx++;
} }
} }
@@ -1041,7 +1041,7 @@ NEO::SubmissionStatus CommandQueueHw<gfxCoreFamily>::prepareAndSubmitBatchBuffer
} }
endingCmd = innerCommandStream.getSpace(0); endingCmd = innerCommandStream.getSpace(0);
NEO::EncodeBatchBufferStartOrEnd<GfxFamily>::programBatchBufferStart(&innerCommandStream, startAddress, false); NEO::EncodeBatchBufferStartOrEnd<GfxFamily>::programBatchBufferStart(&innerCommandStream, startAddress, false, false, false);
} else { } else {
auto buffer = innerCommandStream.getSpaceForCmd<MI_BATCH_BUFFER_END>(); auto buffer = innerCommandStream.getSpaceForCmd<MI_BATCH_BUFFER_END>();
*(MI_BATCH_BUFFER_END *)buffer = GfxFamily::cmdInitBatchBufferEnd; *(MI_BATCH_BUFFER_END *)buffer = GfxFamily::cmdInitBatchBufferEnd;

1
shared/source/command_container/CMakeLists.txt
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@@ -12,6 +12,7 @@ set(NEO_CORE_COMMAND_CONTAINER
${CMAKE_CURRENT_SOURCE_DIR}/command_encoder.inl ${CMAKE_CURRENT_SOURCE_DIR}/command_encoder.inl
${CMAKE_CURRENT_SOURCE_DIR}/command_encoder_bdw_and_later.inl ${CMAKE_CURRENT_SOURCE_DIR}/command_encoder_bdw_and_later.inl
${CMAKE_CURRENT_SOURCE_DIR}/command_encoder_tgllp_and_later.inl ${CMAKE_CURRENT_SOURCE_DIR}/command_encoder_tgllp_and_later.inl
${CMAKE_CURRENT_SOURCE_DIR}/encode_alu_helper.h
${CMAKE_CURRENT_SOURCE_DIR}/encode_compute_mode_bdw_and_later.inl ${CMAKE_CURRENT_SOURCE_DIR}/encode_compute_mode_bdw_and_later.inl
${CMAKE_CURRENT_SOURCE_DIR}/encode_compute_mode_tgllp_and_later.inl ${CMAKE_CURRENT_SOURCE_DIR}/encode_compute_mode_tgllp_and_later.inl
${CMAKE_CURRENT_SOURCE_DIR}/implicit_scaling.cpp ${CMAKE_CURRENT_SOURCE_DIR}/implicit_scaling.cpp

52
shared/source/command_container/command_encoder.h
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@@ -8,6 +8,7 @@
#pragma once #pragma once
#include "shared/source/command_container/cmdcontainer.h" #include "shared/source/command_container/cmdcontainer.h"
#include "shared/source/command_container/encode_alu_helper.h"
#include "shared/source/debugger/debugger.h" #include "shared/source/debugger/debugger.h"
#include "shared/source/execution_environment/execution_environment.h" #include "shared/source/execution_environment/execution_environment.h"
#include "shared/source/gmm_helper/gmm_lib.h" #include "shared/source/gmm_helper/gmm_lib.h"
@@ -61,6 +62,12 @@ enum class MiPredicateType : uint32_t {
NoopOnResult2Set = 2 NoopOnResult2Set = 2
}; };
enum class CompareOperation : uint32_t {
Equal = 0,
NotEqual = 1,
GreaterOrEqual = 2
};
struct EncodeWalkerArgs { struct EncodeWalkerArgs {
KernelExecutionType kernelExecutionType = KernelExecutionType::Default; KernelExecutionType kernelExecutionType = KernelExecutionType::Default;
bool requiredSystemFence = false; bool requiredSystemFence = false;
@@ -215,6 +222,20 @@ struct EncodeMathMMIO {
AluRegisters firstOperandRegister, AluRegisters firstOperandRegister,
AluRegisters secondOperandRegister, AluRegisters secondOperandRegister,
AluRegisters finalResultRegister); AluRegisters finalResultRegister);
static void encodeIncrement(LinearStream &cmdStream, AluRegisters operandRegister);
static void encodeDecrement(LinearStream &cmdStream, AluRegisters operandRegister);
static constexpr size_t getCmdSizeForIncrementOrDecrement() {
return (EncodeAluHelper<GfxFamily, 4>::getCmdsSize() + (2 * sizeof(typename GfxFamily::MI_LOAD_REGISTER_IMM)));
}
protected:
enum class IncrementOrDecrementOperation {
Increment = 0,
Decrement = 1,
};
static void encodeIncrementOrDecrement(LinearStream &cmdStream, AluRegisters operandRegister, IncrementOrDecrementOperation operationType);
}; };
template <typename GfxFamily> template <typename GfxFamily>
@@ -397,7 +418,7 @@ struct EncodeSempahore {
uint32_t compareData, uint32_t compareData,
COMPARE_OPERATION compareMode); COMPARE_OPERATION compareMode);
static size_t getSizeMiSemaphoreWait(); static constexpr size_t getSizeMiSemaphoreWait() { return sizeof(MI_SEMAPHORE_WAIT); }
}; };
template <typename GfxFamily> template <typename GfxFamily>
@@ -440,11 +461,34 @@ struct EncodeBatchBufferStartOrEnd {
return sizeof(MI_BATCH_BUFFER_END); return sizeof(MI_BATCH_BUFFER_END);
} }
static void programBatchBufferStart(LinearStream *commandStream, static void programBatchBufferStart(LinearStream *commandStream, uint64_t address, bool secondLevel, bool indirect, bool predicate);
uint64_t address,
bool secondLevel);
static void programBatchBufferEnd(CommandContainer &container); static void programBatchBufferEnd(CommandContainer &container);
static void programBatchBufferEnd(LinearStream &commandStream); static void programBatchBufferEnd(LinearStream &commandStream);
static void programConditionalDataMemBatchBufferStart(LinearStream &commandStream, uint64_t startAddress, uint64_t compareAddress, uint32_t compareData, CompareOperation compareOperation, bool indirect);
static void programConditionalDataRegBatchBufferStart(LinearStream &commandStream, uint64_t startAddress, uint32_t compareReg, uint32_t compareData, CompareOperation compareOperation, bool indirect);
static void programConditionalRegRegBatchBufferStart(LinearStream &commandStream, uint64_t startAddress, AluRegisters compareReg0, AluRegisters compareReg1, CompareOperation compareOperation, bool indirect);
static size_t constexpr getCmdSizeConditionalDataMemBatchBufferStart() {
return (getCmdSizeConditionalBufferStartBase() + sizeof(typename GfxFamily::MI_LOAD_REGISTER_MEM) + (3 * sizeof(typename GfxFamily::MI_LOAD_REGISTER_IMM)));
}
static size_t constexpr getCmdSizeConditionalDataRegBatchBufferStart() {
return (getCmdSizeConditionalBufferStartBase() + sizeof(typename GfxFamily::MI_LOAD_REGISTER_REG) + (3 * sizeof(typename GfxFamily::MI_LOAD_REGISTER_IMM)));
}
static size_t constexpr getCmdSizeConditionalRegRegBatchBufferStart() {
return getCmdSizeConditionalBufferStartBase();
}
protected:
static void appendBatchBufferStart(MI_BATCH_BUFFER_START &cmd, bool indirect, bool predicate);
static void programConditionalBatchBufferStartBase(LinearStream &commandStream, uint64_t startAddress, AluRegisters regA, AluRegisters regB, CompareOperation compareOperation, bool indirect);
static size_t constexpr getCmdSizeConditionalBufferStartBase() {
return (EncodeAluHelper<GfxFamily, 4>::getCmdsSize() + sizeof(typename GfxFamily::MI_LOAD_REGISTER_REG) +
(2 * EncodeMiPredicate<GfxFamily>::getCmdSize()) + sizeof(MI_BATCH_BUFFER_START));
}
}; };
template <typename GfxFamily> template <typename GfxFamily>

103
shared/source/command_container/command_encoder.inl
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@@ -244,6 +244,31 @@ void EncodeMathMMIO<Family>::encodeAluAnd(MI_MATH_ALU_INST_INLINE *pAluParam,
encodeAlu(pAluParam, firstOperandRegister, secondOperandRegister, AluRegisters::OPCODE_AND, finalResultRegister, AluRegisters::R_ACCU); encodeAlu(pAluParam, firstOperandRegister, secondOperandRegister, AluRegisters::OPCODE_AND, finalResultRegister, AluRegisters::R_ACCU);
} }
template <typename Family>
void EncodeMathMMIO<Family>::encodeIncrementOrDecrement(LinearStream &cmdStream, AluRegisters operandRegister, IncrementOrDecrementOperation operationType) {
LriHelper<Family>::program(&cmdStream, CS_GPR_R7, 1, true);
LriHelper<Family>::program(&cmdStream, CS_GPR_R7 + 4, 0, true);
EncodeAluHelper<Family, 4> aluHelper;
aluHelper.setNextAlu(AluRegisters::OPCODE_LOAD, AluRegisters::R_SRCA, operandRegister);
aluHelper.setNextAlu(AluRegisters::OPCODE_LOAD, AluRegisters::R_SRCB, AluRegisters::R_7);
aluHelper.setNextAlu((operationType == IncrementOrDecrementOperation::Increment) ? AluRegisters::OPCODE_ADD
: AluRegisters::OPCODE_SUB);
aluHelper.setNextAlu(AluRegisters::OPCODE_STORE, operandRegister, AluRegisters::R_ACCU);
aluHelper.copyToCmdStream(cmdStream);
}
template <typename Family>
void EncodeMathMMIO<Family>::encodeIncrement(LinearStream &cmdStream, AluRegisters operandRegister) {
encodeIncrementOrDecrement(cmdStream, operandRegister, IncrementOrDecrementOperation::Increment);
}
template <typename Family>
void EncodeMathMMIO<Family>::encodeDecrement(LinearStream &cmdStream, AluRegisters operandRegister) {
encodeIncrementOrDecrement(cmdStream, operandRegister, IncrementOrDecrementOperation::Decrement);
}
/* /*
* greaterThan() tests if firstOperandRegister is greater than * greaterThan() tests if firstOperandRegister is greater than
* secondOperandRegister. * secondOperandRegister.
@@ -797,11 +822,6 @@ void EncodeSempahore<Family>::addMiSemaphoreWaitCommand(LinearStream &commandStr
registerPollMode); registerPollMode);
} }
template <typename Family>
inline size_t EncodeSempahore<Family>::getSizeMiSemaphoreWait() {
return sizeof(MI_SEMAPHORE_WAIT);
}
template <typename Family> template <typename Family>
inline void EncodeAtomic<Family>::setMiAtomicAddress(MI_ATOMIC &atomic, uint64_t writeAddress) { inline void EncodeAtomic<Family>::setMiAtomicAddress(MI_ATOMIC &atomic, uint64_t writeAddress) {
atomic.setMemoryAddress(static_cast<uint32_t>(writeAddress & 0x0000FFFFFFFFULL)); atomic.setMemoryAddress(static_cast<uint32_t>(writeAddress & 0x0000FFFFFFFFULL));
@@ -848,19 +868,86 @@ void EncodeAtomic<Family>::programMiAtomic(LinearStream &commandStream,
} }
template <typename Family> template <typename Family>
void EncodeBatchBufferStartOrEnd<Family>::programBatchBufferStart(LinearStream *commandStream, void EncodeBatchBufferStartOrEnd<Family>::programConditionalDataMemBatchBufferStart(LinearStream &commandStream, uint64_t startAddress, uint64_t compareAddress,
uint64_t address, uint32_t compareData, CompareOperation compareOperation, bool indirect) {
bool secondLevel) { EncodeSetMMIO<Family>::encodeMEM(commandStream, CS_GPR_R7, compareAddress);
LriHelper<Family>::program(&commandStream, CS_GPR_R7 + 4, 0, true);
LriHelper<Family>::program(&commandStream, CS_GPR_R8, compareData, true);
LriHelper<Family>::program(&commandStream, CS_GPR_R8 + 4, 0, true);
programConditionalBatchBufferStartBase(commandStream, startAddress, AluRegisters::R_7, AluRegisters::R_8, compareOperation, indirect);
}
template <typename Family>
void EncodeBatchBufferStartOrEnd<Family>::programConditionalDataRegBatchBufferStart(LinearStream &commandStream, uint64_t startAddress, uint32_t compareReg,
uint32_t compareData, CompareOperation compareOperation, bool indirect) {
EncodeSetMMIO<Family>::encodeREG(commandStream, CS_GPR_R7, compareReg);
LriHelper<Family>::program(&commandStream, CS_GPR_R7 + 4, 0, true);
LriHelper<Family>::program(&commandStream, CS_GPR_R8, compareData, true);
LriHelper<Family>::program(&commandStream, CS_GPR_R8 + 4, 0, true);
programConditionalBatchBufferStartBase(commandStream, startAddress, AluRegisters::R_7, AluRegisters::R_8, compareOperation, indirect);
}
template <typename Family>
void EncodeBatchBufferStartOrEnd<Family>::programConditionalRegRegBatchBufferStart(LinearStream &commandStream, uint64_t startAddress, AluRegisters compareReg0,
AluRegisters compareReg1, CompareOperation compareOperation, bool indirect) {
programConditionalBatchBufferStartBase(commandStream, startAddress, compareReg0, compareReg1, compareOperation, indirect);
}
template <typename Family>
void EncodeBatchBufferStartOrEnd<Family>::programConditionalBatchBufferStartBase(LinearStream &commandStream, uint64_t startAddress, AluRegisters regA, AluRegisters regB,
CompareOperation compareOperation, bool indirect) {
EncodeAluHelper<Family, 4> aluHelper;
aluHelper.setNextAlu(AluRegisters::OPCODE_LOAD, AluRegisters::R_SRCA, regA);
aluHelper.setNextAlu(AluRegisters::OPCODE_LOAD, AluRegisters::R_SRCB, regB);
aluHelper.setNextAlu(AluRegisters::OPCODE_SUB);
if ((compareOperation == CompareOperation::Equal) || (compareOperation == CompareOperation::NotEqual)) {
aluHelper.setNextAlu(AluRegisters::OPCODE_STORE, AluRegisters::R_7, AluRegisters::R_ZF);
} else {
UNRECOVERABLE_IF(compareOperation != CompareOperation::GreaterOrEqual);
aluHelper.setNextAlu(AluRegisters::OPCODE_STORE, AluRegisters::R_7, AluRegisters::R_CF);
}
aluHelper.copyToCmdStream(commandStream);
EncodeSetMMIO<Family>::encodeREG(commandStream, CS_PREDICATE_RESULT_2, CS_GPR_R7);
MiPredicateType predicateType = MiPredicateType::NoopOnResult2Clear; // Equal
if ((compareOperation == CompareOperation::NotEqual) || (compareOperation == CompareOperation::GreaterOrEqual)) {
predicateType = MiPredicateType::NoopOnResult2Set;
}
EncodeMiPredicate<Family>::encode(commandStream, predicateType);
programBatchBufferStart(&commandStream, startAddress, false, indirect, true);
EncodeMiPredicate<Family>::encode(commandStream, MiPredicateType::Disable);
}
template <typename Family>
void EncodeBatchBufferStartOrEnd<Family>::programBatchBufferStart(LinearStream *commandStream, uint64_t address, bool secondLevel, bool indirect, bool predicate) {
MI_BATCH_BUFFER_START cmd = Family::cmdInitBatchBufferStart; MI_BATCH_BUFFER_START cmd = Family::cmdInitBatchBufferStart;
if (secondLevel) { if (secondLevel) {
cmd.setSecondLevelBatchBuffer(MI_BATCH_BUFFER_START::SECOND_LEVEL_BATCH_BUFFER_SECOND_LEVEL_BATCH); cmd.setSecondLevelBatchBuffer(MI_BATCH_BUFFER_START::SECOND_LEVEL_BATCH_BUFFER_SECOND_LEVEL_BATCH);
} }
cmd.setAddressSpaceIndicator(MI_BATCH_BUFFER_START::ADDRESS_SPACE_INDICATOR_PPGTT); cmd.setAddressSpaceIndicator(MI_BATCH_BUFFER_START::ADDRESS_SPACE_INDICATOR_PPGTT);
cmd.setBatchBufferStartAddress(address); cmd.setBatchBufferStartAddress(address);
appendBatchBufferStart(cmd, indirect, predicate);
auto buffer = commandStream->getSpaceForCmd<MI_BATCH_BUFFER_START>(); auto buffer = commandStream->getSpaceForCmd<MI_BATCH_BUFFER_START>();
*buffer = cmd; *buffer = cmd;
} }
template <typename Family>
void EncodeBatchBufferStartOrEnd<Family>::appendBatchBufferStart(MI_BATCH_BUFFER_START &cmd, bool indirect, bool predicate) {
}
template <typename Family> template <typename Family>
void EncodeBatchBufferStartOrEnd<Family>::programBatchBufferEnd(LinearStream &commandStream) { void EncodeBatchBufferStartOrEnd<Family>::programBatchBufferEnd(LinearStream &commandStream) {
MI_BATCH_BUFFER_END cmd = Family::cmdInitBatchBufferEnd; MI_BATCH_BUFFER_END cmd = Family::cmdInitBatchBufferEnd;

6
shared/source/command_container/command_encoder_xe_hpc_core_and_later.inl
View File

@@ -27,4 +27,10 @@ void EncodeMemoryFence<Family>::encodeSystemMemoryFence(LinearStream &commandStr
*stateSystemFenceAddressSpace = stateSystemFenceAddress; *stateSystemFenceAddressSpace = stateSystemFenceAddress;
} }
template <>
void EncodeBatchBufferStartOrEnd<Family>::appendBatchBufferStart(MI_BATCH_BUFFER_START &cmd, bool indirect, bool predicate) {
cmd.setIndirectAddressEnable(indirect);
cmd.setPredicationEnable(predicate);
}
} // namespace NEO } // namespace NEO

59
shared/source/command_container/encode_alu_helper.h Normal file
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@@ -0,0 +1,59 @@
/*
* Copyright (C) 2022 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#pragma once
#include "shared/source/command_stream/linear_stream.h"
#include "shared/source/helpers/register_offsets.h"
#include "shared/source/helpers/string.h"
namespace NEO {
template <typename GfxFamily, size_t AluCount>
class EncodeAluHelper {
public:
using MI_MATH_ALU_INST_INLINE = typename GfxFamily::MI_MATH_ALU_INST_INLINE;
using MI_MATH = typename GfxFamily::MI_MATH;
EncodeAluHelper() {
aluOps.miMath.DW0.BitField.InstructionType = MI_MATH::COMMAND_TYPE_MI_COMMAND;
aluOps.miMath.DW0.BitField.InstructionOpcode = MI_MATH::MI_COMMAND_OPCODE_MI_MATH;
aluOps.miMath.DW0.BitField.DwordLength = AluCount - 1;
}
void setNextAlu(AluRegisters opcode) {
setNextAlu(opcode, AluRegisters::OPCODE_NONE, AluRegisters::OPCODE_NONE);
}
void setNextAlu(AluRegisters opcode, AluRegisters operand1, AluRegisters operand2) {
aluOps.aliInst[aluIndex].DW0.BitField.ALUOpcode = static_cast<uint32_t>(opcode);
aluOps.aliInst[aluIndex].DW0.BitField.Operand1 = static_cast<uint32_t>(operand1);
aluOps.aliInst[aluIndex].DW0.BitField.Operand2 = static_cast<uint32_t>(operand2);
aluIndex++;
}
void copyToCmdStream(LinearStream &cmdStream) {
UNRECOVERABLE_IF(aluIndex != AluCount);
auto cmds = cmdStream.getSpace(sizeof(AluOps));
memcpy_s(cmds, sizeof(AluOps), &aluOps, sizeof(AluOps));
}
static constexpr size_t getCmdsSize() {
return (sizeof(MI_MATH) + (AluCount * sizeof(MI_MATH_ALU_INST_INLINE)));
}
protected:
struct alignas(1) AluOps {
MI_MATH miMath = {};
MI_MATH_ALU_INST_INLINE aliInst[AluCount];
} aluOps;
size_t aluIndex = 0;
static_assert(sizeof(AluOps) == getCmdsSize(), "This structure is consumed by GPU and must follow specific restrictions for padding and size");
};
} // namespace NEO

9
shared/source/generated/xe_hpc_core/hw_cmds_generated_xe_hpc_core.inl
View File

@@ -6035,7 +6035,8 @@ typedef struct tagMI_BATCH_BUFFER_START {
uint32_t Reserved_9 : BITFIELD_RANGE(9, 9); uint32_t Reserved_9 : BITFIELD_RANGE(9, 9);
uint32_t Reserved_10 : BITFIELD_RANGE(10, 14); uint32_t Reserved_10 : BITFIELD_RANGE(10, 14);
uint32_t PredicationEnable : BITFIELD_RANGE(15, 15); uint32_t PredicationEnable : BITFIELD_RANGE(15, 15);
uint32_t Reserved_16 : BITFIELD_RANGE(16, 18); uint32_t Reserved_16 : BITFIELD_RANGE(16, 17);
uint32_t IndirectAddressEnable : BITFIELD_RANGE(18, 18);
uint32_t EnableCommandCache : BITFIELD_RANGE(19, 19); uint32_t EnableCommandCache : BITFIELD_RANGE(19, 19);
uint32_t PoshEnable : BITFIELD_RANGE(20, 20); uint32_t PoshEnable : BITFIELD_RANGE(20, 20);
uint32_t PoshStart : BITFIELD_RANGE(21, 21); uint32_t PoshStart : BITFIELD_RANGE(21, 21);
@@ -6144,6 +6145,12 @@ typedef struct tagMI_BATCH_BUFFER_START {
inline uint32_t getEnableCommandCache() const { inline uint32_t getEnableCommandCache() const {
return TheStructure.Common.EnableCommandCache; return TheStructure.Common.EnableCommandCache;
} }
inline void setIndirectAddressEnable(const uint32_t value) {
TheStructure.Common.IndirectAddressEnable = value;
}
inline uint32_t getIndirectAddressEnable() const {
return TheStructure.Common.IndirectAddressEnable;
}
inline void setPoshEnable(const uint32_t value) { inline void setPoshEnable(const uint32_t value) {
TheStructure.Common.PoshEnable = value; TheStructure.Common.PoshEnable = value;
} }

12
shared/source/helpers/register_offsets.h
View File

@@ -1,5 +1,5 @@
/* /*
* Copyright (C) 2019-2020 Intel Corporation * Copyright (C) 2019-2022 Intel Corporation
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT
* *
@@ -39,19 +39,29 @@ constexpr uint32_t CS_GPR_R14 = 0x2670;
constexpr uint32_t CS_GPR_R15 = 0x2678; constexpr uint32_t CS_GPR_R15 = 0x2678;
constexpr uint32_t CS_PREDICATE_RESULT = 0x2418; constexpr uint32_t CS_PREDICATE_RESULT = 0x2418;
constexpr uint32_t CS_PREDICATE_RESULT_2 = 0x23BC;
constexpr uint32_t SEMA_WAIT_POLL = 0x0224c; constexpr uint32_t SEMA_WAIT_POLL = 0x0224c;
//Alu opcodes //Alu opcodes
constexpr uint32_t NUM_ALU_INST_FOR_READ_MODIFY_WRITE = 4; constexpr uint32_t NUM_ALU_INST_FOR_READ_MODIFY_WRITE = 4;
enum class AluRegisters : uint32_t { enum class AluRegisters : uint32_t {
OPCODE_NONE = 0x000,
OPCODE_FENCE_RD = 0x001,
OPCODE_FENCE_WR = 0x002,
OPCODE_LOAD = 0x080, OPCODE_LOAD = 0x080,
OPCODE_LOAD0 = 0x081,
OPCODE_LOADIND = 0x082,
OPCODE_STORE = 0x180, OPCODE_STORE = 0x180,
OPCODE_ADD = 0x100, OPCODE_ADD = 0x100,
OPCODE_SUB = 0x101, OPCODE_SUB = 0x101,
OPCODE_AND = 0x102, OPCODE_AND = 0x102,
OPCODE_OR = 0x103, OPCODE_OR = 0x103,
OPCODE_SHL = 0x105,
OPCODE_STOREIND = 0x181,
R_0 = 0x0, R_0 = 0x0,
R_1 = 0x1, R_1 = 0x1,
R_2 = 0x2, R_2 = 0x2,

1
shared/test/unit_test/encoders/CMakeLists.txt
View File

@@ -66,6 +66,7 @@ if(TESTS_PVC_AND_LATER)
target_sources(neo_shared_tests PRIVATE target_sources(neo_shared_tests PRIVATE
${CMAKE_CURRENT_SOURCE_DIR}/test_encode_3dstate_btd_pvc_and_later.cpp ${CMAKE_CURRENT_SOURCE_DIR}/test_encode_3dstate_btd_pvc_and_later.cpp
${CMAKE_CURRENT_SOURCE_DIR}/test_encode_dispatch_kernel_pvc_and_later.cpp ${CMAKE_CURRENT_SOURCE_DIR}/test_encode_dispatch_kernel_pvc_and_later.cpp
${CMAKE_CURRENT_SOURCE_DIR}/test_encode_pvc_and_later.cpp
${CMAKE_CURRENT_SOURCE_DIR}/walker_partition_tests_pvc_and_later.cpp ${CMAKE_CURRENT_SOURCE_DIR}/walker_partition_tests_pvc_and_later.cpp
) )
endif() endif()

8
shared/test/unit_test/encoders/test_encode_command_buffer.cpp
View File

@@ -31,7 +31,7 @@ HWTEST_F(EncodeBatchBufferStartOrEndTest, givenCommandContainerWhenEncodeBBEndTh
HWTEST_F(EncodeBatchBufferStartOrEndTest, givenCommandContainerWhenEncodeBBStartThenCommandIsAdded) { HWTEST_F(EncodeBatchBufferStartOrEndTest, givenCommandContainerWhenEncodeBBStartThenCommandIsAdded) {
CommandContainer cmdContainer; CommandContainer cmdContainer;
cmdContainer.initialize(pDevice, nullptr, true); cmdContainer.initialize(pDevice, nullptr, true);
EncodeBatchBufferStartOrEnd<FamilyType>::programBatchBufferStart(cmdContainer.getCommandStream(), 0, true); EncodeBatchBufferStartOrEnd<FamilyType>::programBatchBufferStart(cmdContainer.getCommandStream(), 0, true, false, false);
GenCmdList commands; GenCmdList commands;
CmdParse<FamilyType>::parseCommandBuffer(commands, ptrOffset(cmdContainer.getCommandStream()->getCpuBase(), 0), cmdContainer.getCommandStream()->getUsed()); CmdParse<FamilyType>::parseCommandBuffer(commands, ptrOffset(cmdContainer.getCommandStream()->getCpuBase(), 0), cmdContainer.getCommandStream()->getUsed());
@@ -44,7 +44,7 @@ HWTEST_F(EncodeBatchBufferStartOrEndTest, givenCommandContainerWhenEncodeBBStart
HWTEST_F(EncodeBatchBufferStartOrEndTest, givenCommandContainerWhenEncodeBBStartWithSecondLevelParameterThenCommandIsProgrammedCorrectly) { HWTEST_F(EncodeBatchBufferStartOrEndTest, givenCommandContainerWhenEncodeBBStartWithSecondLevelParameterThenCommandIsProgrammedCorrectly) {
CommandContainer cmdContainer; CommandContainer cmdContainer;
cmdContainer.initialize(pDevice, nullptr, true); cmdContainer.initialize(pDevice, nullptr, true);
EncodeBatchBufferStartOrEnd<FamilyType>::programBatchBufferStart(cmdContainer.getCommandStream(), 0, true); EncodeBatchBufferStartOrEnd<FamilyType>::programBatchBufferStart(cmdContainer.getCommandStream(), 0, true, false, false);
GenCmdList commands; GenCmdList commands;
CmdParse<FamilyType>::parseCommandBuffer(commands, ptrOffset(cmdContainer.getCommandStream()->getCpuBase(), 0), cmdContainer.getCommandStream()->getUsed()); CmdParse<FamilyType>::parseCommandBuffer(commands, ptrOffset(cmdContainer.getCommandStream()->getCpuBase(), 0), cmdContainer.getCommandStream()->getUsed());
@@ -61,7 +61,7 @@ HWTEST_F(EncodeBatchBufferStartOrEndTest, givenCommandContainerWhenEncodeBBStart
HWTEST_F(EncodeBatchBufferStartOrEndTest, givenCommandContainerWhenEncodeBBStartWithFirstLevelParameterThenCommandIsProgrammedCorrectly) { HWTEST_F(EncodeBatchBufferStartOrEndTest, givenCommandContainerWhenEncodeBBStartWithFirstLevelParameterThenCommandIsProgrammedCorrectly) {
CommandContainer cmdContainer; CommandContainer cmdContainer;
cmdContainer.initialize(pDevice, nullptr, true); cmdContainer.initialize(pDevice, nullptr, true);
EncodeBatchBufferStartOrEnd<FamilyType>::programBatchBufferStart(cmdContainer.getCommandStream(), 0, false); EncodeBatchBufferStartOrEnd<FamilyType>::programBatchBufferStart(cmdContainer.getCommandStream(), 0, false, false, false);
GenCmdList commands; GenCmdList commands;
CmdParse<FamilyType>::parseCommandBuffer(commands, ptrOffset(cmdContainer.getCommandStream()->getCpuBase(), 0), cmdContainer.getCommandStream()->getUsed()); CmdParse<FamilyType>::parseCommandBuffer(commands, ptrOffset(cmdContainer.getCommandStream()->getCpuBase(), 0), cmdContainer.getCommandStream()->getUsed());
@@ -80,7 +80,7 @@ HWTEST_F(EncodeBatchBufferStartOrEndTest, givenGpuAddressWhenEncodeBBStartThenAd
cmdContainer.initialize(pDevice, nullptr, true); cmdContainer.initialize(pDevice, nullptr, true);
uint64_t gpuAddress = 12 * MemoryConstants::pageSize; uint64_t gpuAddress = 12 * MemoryConstants::pageSize;
EncodeBatchBufferStartOrEnd<FamilyType>::programBatchBufferStart(cmdContainer.getCommandStream(), gpuAddress, false); EncodeBatchBufferStartOrEnd<FamilyType>::programBatchBufferStart(cmdContainer.getCommandStream(), gpuAddress, false, false, false);
GenCmdList commands; GenCmdList commands;
CmdParse<FamilyType>::parseCommandBuffer(commands, ptrOffset(cmdContainer.getCommandStream()->getCpuBase(), 0), cmdContainer.getCommandStream()->getUsed()); CmdParse<FamilyType>::parseCommandBuffer(commands, ptrOffset(cmdContainer.getCommandStream()->getCpuBase(), 0), cmdContainer.getCommandStream()->getUsed());

102
shared/test/unit_test/encoders/test_encode_math.cpp
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@@ -272,3 +272,105 @@ HWTEST_F(CommandEncoderMathTest, WhenSettingGroupCountIndirectThenCommandsAreCor
itor = find<MI_STORE_REGISTER_MEM *>(++itor, commands.end()); itor = find<MI_STORE_REGISTER_MEM *>(++itor, commands.end());
ASSERT_EQ(itor, commands.end()); ASSERT_EQ(itor, commands.end());
} }
using CommandEncodeAluTests = ::testing::Test;
HWTEST_F(CommandEncodeAluTests, whenAskingForIncrementOrDecrementCmdsSizeThenReturnCorrectValue) {
constexpr size_t expectedSize = (2 * sizeof(typename FamilyType::MI_LOAD_REGISTER_IMM)) + sizeof(typename FamilyType::MI_MATH) + (4 * sizeof(typename FamilyType::MI_MATH_ALU_INST_INLINE));
EXPECT_EQ(EncodeMathMMIO<FamilyType>::getCmdSizeForIncrementOrDecrement(), expectedSize);
}
HWTEST_F(CommandEncodeAluTests, whenProgrammingIncrementOperationThenUseCorrectAluCommands) {
using MI_LOAD_REGISTER_IMM = typename FamilyType::MI_LOAD_REGISTER_IMM;
using MI_MATH_ALU_INST_INLINE = typename FamilyType::MI_MATH_ALU_INST_INLINE;
using MI_MATH = typename FamilyType::MI_MATH;
constexpr size_t bufferSize = EncodeMathMMIO<FamilyType>::getCmdSizeForIncrementOrDecrement();
constexpr AluRegisters incRegister = AluRegisters::R_1;
uint8_t buffer[bufferSize] = {};
LinearStream cmdStream(buffer, bufferSize);
EncodeMathMMIO<FamilyType>::encodeIncrement(cmdStream, incRegister);
EXPECT_EQ(bufferSize, cmdStream.getUsed());
auto lriCmd = reinterpret_cast<MI_LOAD_REGISTER_IMM *>(buffer);
EXPECT_EQ(lriCmd->getRegisterOffset(), CS_GPR_R7);
EXPECT_EQ(lriCmd->getDataDword(), 1u);
lriCmd++;
EXPECT_EQ(CS_GPR_R7 + 4, lriCmd->getRegisterOffset());
EXPECT_EQ(0u, lriCmd->getDataDword());
auto miMathCmd = reinterpret_cast<MI_MATH *>(++lriCmd);
EXPECT_EQ(3u, miMathCmd->DW0.BitField.DwordLength);
auto miAluCmd = reinterpret_cast<MI_MATH_ALU_INST_INLINE *>(++miMathCmd);
EXPECT_EQ(static_cast<uint32_t>(AluRegisters::OPCODE_LOAD), miAluCmd->DW0.BitField.ALUOpcode);
EXPECT_EQ(static_cast<uint32_t>(AluRegisters::R_SRCA), miAluCmd->DW0.BitField.Operand1);
EXPECT_EQ(static_cast<uint32_t>(incRegister), miAluCmd->DW0.BitField.Operand2);
miAluCmd++;
EXPECT_EQ(static_cast<uint32_t>(AluRegisters::OPCODE_LOAD), miAluCmd->DW0.BitField.ALUOpcode);
EXPECT_EQ(static_cast<uint32_t>(AluRegisters::R_SRCB), miAluCmd->DW0.BitField.Operand1);
EXPECT_EQ(static_cast<uint32_t>(AluRegisters::R_7), miAluCmd->DW0.BitField.Operand2);
miAluCmd++;
EXPECT_EQ(static_cast<uint32_t>(AluRegisters::OPCODE_ADD), miAluCmd->DW0.BitField.ALUOpcode);
EXPECT_EQ(0u, miAluCmd->DW0.BitField.Operand1);
EXPECT_EQ(0u, miAluCmd->DW0.BitField.Operand2);
miAluCmd++;
EXPECT_EQ(static_cast<uint32_t>(AluRegisters::OPCODE_STORE), miAluCmd->DW0.BitField.ALUOpcode);
EXPECT_EQ(static_cast<uint32_t>(incRegister), miAluCmd->DW0.BitField.Operand1);
EXPECT_EQ(static_cast<uint32_t>(AluRegisters::R_ACCU), miAluCmd->DW0.BitField.Operand2);
}
HWTEST_F(CommandEncodeAluTests, whenProgrammingDecrementOperationThenUseCorrectAluCommands) {
using MI_LOAD_REGISTER_IMM = typename FamilyType::MI_LOAD_REGISTER_IMM;
using MI_MATH_ALU_INST_INLINE = typename FamilyType::MI_MATH_ALU_INST_INLINE;
using MI_MATH = typename FamilyType::MI_MATH;
constexpr size_t bufferSize = EncodeMathMMIO<FamilyType>::getCmdSizeForIncrementOrDecrement();
constexpr AluRegisters decRegister = AluRegisters::R_1;
uint8_t buffer[bufferSize] = {};
LinearStream cmdStream(buffer, bufferSize);
EncodeMathMMIO<FamilyType>::encodeDecrement(cmdStream, decRegister);
EXPECT_EQ(bufferSize, cmdStream.getUsed());
auto lriCmd = reinterpret_cast<MI_LOAD_REGISTER_IMM *>(buffer);
EXPECT_EQ(lriCmd->getRegisterOffset(), CS_GPR_R7);
EXPECT_EQ(lriCmd->getDataDword(), 1u);
lriCmd++;
EXPECT_EQ(CS_GPR_R7 + 4, lriCmd->getRegisterOffset());
EXPECT_EQ(0u, lriCmd->getDataDword());
auto miMathCmd = reinterpret_cast<MI_MATH *>(++lriCmd);
EXPECT_EQ(3u, miMathCmd->DW0.BitField.DwordLength);
auto miAluCmd = reinterpret_cast<MI_MATH_ALU_INST_INLINE *>(++miMathCmd);
EXPECT_EQ(static_cast<uint32_t>(AluRegisters::OPCODE_LOAD), miAluCmd->DW0.BitField.ALUOpcode);
EXPECT_EQ(static_cast<uint32_t>(AluRegisters::R_SRCA), miAluCmd->DW0.BitField.Operand1);
EXPECT_EQ(static_cast<uint32_t>(decRegister), miAluCmd->DW0.BitField.Operand2);
miAluCmd++;
EXPECT_EQ(static_cast<uint32_t>(AluRegisters::OPCODE_LOAD), miAluCmd->DW0.BitField.ALUOpcode);
EXPECT_EQ(static_cast<uint32_t>(AluRegisters::R_SRCB), miAluCmd->DW0.BitField.Operand1);
EXPECT_EQ(static_cast<uint32_t>(AluRegisters::R_7), miAluCmd->DW0.BitField.Operand2);
miAluCmd++;
EXPECT_EQ(static_cast<uint32_t>(AluRegisters::OPCODE_SUB), miAluCmd->DW0.BitField.ALUOpcode);
EXPECT_EQ(0u, miAluCmd->DW0.BitField.Operand1);
EXPECT_EQ(0u, miAluCmd->DW0.BitField.Operand2);
miAluCmd++;
EXPECT_EQ(static_cast<uint32_t>(AluRegisters::OPCODE_STORE), miAluCmd->DW0.BitField.ALUOpcode);
EXPECT_EQ(static_cast<uint32_t>(decRegister), miAluCmd->DW0.BitField.Operand1);
EXPECT_EQ(static_cast<uint32_t>(AluRegisters::R_ACCU), miAluCmd->DW0.BitField.Operand2);
}

199
shared/test/unit_test/encoders/test_encode_pvc_and_later.cpp Normal file
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@@ -0,0 +1,199 @@
/*
* Copyright (C) 2022 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "shared/source/command_container/command_encoder.h"
#include "shared/test/common/test_macros/hw_test.h"
using namespace NEO;
using EncodeCommandsXeHpcAndLaterTests = ::testing::Test;
HWTEST2_F(EncodeCommandsXeHpcAndLaterTests, givenPredicateOrIndirectBitSetWhenProgrammingBbStartThenSetCorrectBits, IsAtLeastXeHpcCore) {
using MI_BATCH_BUFFER_START = typename FamilyType::MI_BATCH_BUFFER_START;
MI_BATCH_BUFFER_START cmd = {};
LinearStream cmdStream(&cmd, sizeof(MI_BATCH_BUFFER_START));
EncodeBatchBufferStartOrEnd<FamilyType>::programBatchBufferStart(&cmdStream, 0, true, true, true);
EXPECT_EQ(1u, cmd.getIndirectAddressEnable());
EXPECT_EQ(1u, cmd.getPredicationEnable());
}
struct EncodeConditionalBatchBufferStartTest : public ::testing::Test {
template <typename FamilyType>
void validateBaseProgramming(void *currentCmd, CompareOperation compareOperation, uint64_t startAddress, bool indirect, AluRegisters regA, AluRegisters regB) {
using MI_BATCH_BUFFER_START = typename FamilyType::MI_BATCH_BUFFER_START;
using MI_SET_PREDICATE = typename FamilyType::MI_SET_PREDICATE;
using MI_LOAD_REGISTER_REG = typename FamilyType::MI_LOAD_REGISTER_REG;
using MI_MATH_ALU_INST_INLINE = typename FamilyType::MI_MATH_ALU_INST_INLINE;
using MI_MATH = typename FamilyType::MI_MATH;
auto miMathCmd = reinterpret_cast<MI_MATH *>(currentCmd);
EXPECT_EQ(3u, miMathCmd->DW0.BitField.DwordLength);
auto miAluCmd = reinterpret_cast<MI_MATH_ALU_INST_INLINE *>(++miMathCmd);
EXPECT_EQ(static_cast<uint32_t>(AluRegisters::OPCODE_LOAD), miAluCmd->DW0.BitField.ALUOpcode);
EXPECT_EQ(static_cast<uint32_t>(AluRegisters::R_SRCA), miAluCmd->DW0.BitField.Operand1);
EXPECT_EQ(static_cast<uint32_t>(regA), miAluCmd->DW0.BitField.Operand2);
miAluCmd++;
EXPECT_EQ(static_cast<uint32_t>(AluRegisters::OPCODE_LOAD), miAluCmd->DW0.BitField.ALUOpcode);
EXPECT_EQ(static_cast<uint32_t>(AluRegisters::R_SRCB), miAluCmd->DW0.BitField.Operand1);
EXPECT_EQ(static_cast<uint32_t>(regB), miAluCmd->DW0.BitField.Operand2);
miAluCmd++;
EXPECT_EQ(static_cast<uint32_t>(AluRegisters::OPCODE_SUB), miAluCmd->DW0.BitField.ALUOpcode);
EXPECT_EQ(0u, miAluCmd->DW0.BitField.Operand1);
EXPECT_EQ(0u, miAluCmd->DW0.BitField.Operand2);
miAluCmd++;
EXPECT_EQ(static_cast<uint32_t>(AluRegisters::OPCODE_STORE), miAluCmd->DW0.BitField.ALUOpcode);
EXPECT_EQ(static_cast<uint32_t>(AluRegisters::R_7), miAluCmd->DW0.BitField.Operand1);
if (compareOperation == CompareOperation::Equal || compareOperation == CompareOperation::NotEqual) {
EXPECT_EQ(static_cast<uint32_t>(AluRegisters::R_ZF), miAluCmd->DW0.BitField.Operand2);
} else {
EXPECT_EQ(static_cast<uint32_t>(AluRegisters::R_CF), miAluCmd->DW0.BitField.Operand2);
}
auto lrrCmd = reinterpret_cast<MI_LOAD_REGISTER_REG *>(++miAluCmd);
EXPECT_EQ(CS_PREDICATE_RESULT_2, lrrCmd->getDestinationRegisterAddress());
EXPECT_EQ(CS_GPR_R7, lrrCmd->getSourceRegisterAddress());
auto predicateCmd = reinterpret_cast<MI_SET_PREDICATE *>(++lrrCmd);
if (compareOperation == CompareOperation::Equal) {
EXPECT_EQ(static_cast<uint32_t>(MiPredicateType::NoopOnResult2Clear), predicateCmd->getPredicateEnable());
} else {
EXPECT_EQ(static_cast<uint32_t>(MiPredicateType::NoopOnResult2Set), predicateCmd->getPredicateEnable());
}
auto bbStartCmd = reinterpret_cast<MI_BATCH_BUFFER_START *>(++predicateCmd);
EXPECT_EQ(1u, bbStartCmd->getPredicationEnable());
EXPECT_EQ(indirect, bbStartCmd->getIndirectAddressEnable());
if (!indirect) {
EXPECT_EQ(startAddress, bbStartCmd->getBatchBufferStartAddress());
}
predicateCmd = reinterpret_cast<MI_SET_PREDICATE *>(++bbStartCmd);
EXPECT_EQ(static_cast<uint32_t>(MiPredicateType::Disable), predicateCmd->getPredicateEnable());
}
};
HWTEST2_F(EncodeConditionalBatchBufferStartTest, whenProgrammingConditionalDataMemBatchBufferStartThenProgramCorrectMathOperations, IsAtLeastXeHpcCore) {
using MI_BATCH_BUFFER_START = typename FamilyType::MI_BATCH_BUFFER_START;
using MI_LOAD_REGISTER_MEM = typename FamilyType::MI_LOAD_REGISTER_MEM;
using MI_LOAD_REGISTER_IMM = typename FamilyType::MI_LOAD_REGISTER_IMM;
constexpr size_t expectedSize = sizeof(MI_LOAD_REGISTER_MEM) + (3 * sizeof(MI_LOAD_REGISTER_IMM)) +
EncodeAluHelper<FamilyType, 4>::getCmdsSize() + sizeof(typename FamilyType::MI_LOAD_REGISTER_REG) +
(2 * EncodeMiPredicate<FamilyType>::getCmdSize()) + sizeof(MI_BATCH_BUFFER_START);
EXPECT_EQ(expectedSize, EncodeBatchBufferStartOrEnd<FamilyType>::getCmdSizeConditionalDataMemBatchBufferStart());
constexpr uint64_t startAddress = 0x12340000;
constexpr uint64_t compareAddress = 0x56780000;
constexpr uint32_t compareData = 9876;
for (auto compareOperation : {CompareOperation::Equal, CompareOperation::NotEqual, CompareOperation::GreaterOrEqual}) {
for (bool indirect : {false, true}) {
uint8_t buffer[expectedSize] = {};
LinearStream cmdStream(buffer, expectedSize);
EncodeBatchBufferStartOrEnd<FamilyType>::programConditionalDataMemBatchBufferStart(cmdStream, indirect ? 0 : startAddress, compareAddress, compareData, compareOperation, indirect);
EXPECT_EQ(expectedSize, cmdStream.getUsed());
auto lrmCmd = reinterpret_cast<MI_LOAD_REGISTER_MEM *>(buffer);
EXPECT_EQ(CS_GPR_R7, lrmCmd->getRegisterAddress());
EXPECT_EQ(compareAddress, lrmCmd->getMemoryAddress());
auto lriCmd = reinterpret_cast<MI_LOAD_REGISTER_IMM *>(++lrmCmd);
EXPECT_EQ(CS_GPR_R7 + 4, lriCmd->getRegisterOffset());
EXPECT_EQ(0u, lriCmd->getDataDword());
lriCmd++;
EXPECT_EQ(CS_GPR_R8, lriCmd->getRegisterOffset());
EXPECT_EQ(compareData, lriCmd->getDataDword());
lriCmd++;
EXPECT_EQ(CS_GPR_R8 + 4, lriCmd->getRegisterOffset());
EXPECT_EQ(0u, lriCmd->getDataDword());
validateBaseProgramming<FamilyType>(++lriCmd, compareOperation, startAddress, indirect, AluRegisters::R_7, AluRegisters::R_8);
}
}
}
HWTEST2_F(EncodeConditionalBatchBufferStartTest, whenProgrammingConditionalDataRegBatchBufferStartThenProgramCorrectMathOperations, IsAtLeastXeHpcCore) {
using MI_BATCH_BUFFER_START = typename FamilyType::MI_BATCH_BUFFER_START;
using MI_LOAD_REGISTER_REG = typename FamilyType::MI_LOAD_REGISTER_REG;
using MI_LOAD_REGISTER_IMM = typename FamilyType::MI_LOAD_REGISTER_IMM;
constexpr size_t expectedSize = sizeof(MI_LOAD_REGISTER_REG) + (3 * sizeof(MI_LOAD_REGISTER_IMM)) +
EncodeAluHelper<FamilyType, 4>::getCmdsSize() + sizeof(typename FamilyType::MI_LOAD_REGISTER_REG) +
(2 * EncodeMiPredicate<FamilyType>::getCmdSize()) + sizeof(MI_BATCH_BUFFER_START);
EXPECT_EQ(expectedSize, EncodeBatchBufferStartOrEnd<FamilyType>::getCmdSizeConditionalDataRegBatchBufferStart());
constexpr uint64_t startAddress = 0x12340000;
constexpr uint32_t compareReg = CS_GPR_R1;
constexpr uint32_t compareData = 9876;
for (auto compareOperation : {CompareOperation::Equal, CompareOperation::NotEqual, CompareOperation::GreaterOrEqual}) {
for (bool indirect : {false, true}) {
uint8_t buffer[expectedSize] = {};
LinearStream cmdStream(buffer, expectedSize);
EncodeBatchBufferStartOrEnd<FamilyType>::programConditionalDataRegBatchBufferStart(cmdStream, indirect ? 0 : startAddress, compareReg, compareData, compareOperation, indirect);
EXPECT_EQ(expectedSize, cmdStream.getUsed());
auto lrrCmd = reinterpret_cast<MI_LOAD_REGISTER_REG *>(buffer);
EXPECT_EQ(CS_GPR_R7, lrrCmd->getDestinationRegisterAddress());
EXPECT_EQ(compareReg, lrrCmd->getSourceRegisterAddress());
auto lriCmd = reinterpret_cast<MI_LOAD_REGISTER_IMM *>(++lrrCmd);
EXPECT_EQ(CS_GPR_R7 + 4, lriCmd->getRegisterOffset());
EXPECT_EQ(0u, lriCmd->getDataDword());
lriCmd++;
EXPECT_EQ(CS_GPR_R8, lriCmd->getRegisterOffset());
EXPECT_EQ(compareData, lriCmd->getDataDword());
lriCmd++;
EXPECT_EQ(CS_GPR_R8 + 4, lriCmd->getRegisterOffset());
EXPECT_EQ(0u, lriCmd->getDataDword());
validateBaseProgramming<FamilyType>(++lriCmd, compareOperation, startAddress, indirect, AluRegisters::R_7, AluRegisters::R_8);
}
}
}
HWTEST2_F(EncodeConditionalBatchBufferStartTest, whenProgrammingConditionalRegRegBatchBufferStartThenProgramCorrectMathOperations, IsAtLeastXeHpcCore) {
using MI_BATCH_BUFFER_START = typename FamilyType::MI_BATCH_BUFFER_START;
constexpr size_t expectedSize = EncodeAluHelper<FamilyType, 4>::getCmdsSize() + sizeof(typename FamilyType::MI_LOAD_REGISTER_REG) +
(2 * EncodeMiPredicate<FamilyType>::getCmdSize()) + sizeof(MI_BATCH_BUFFER_START);
EXPECT_EQ(expectedSize, EncodeBatchBufferStartOrEnd<FamilyType>::getCmdSizeConditionalRegRegBatchBufferStart());
constexpr uint64_t startAddress = 0x12340000;
constexpr AluRegisters compareReg1 = AluRegisters::R_1;
constexpr AluRegisters compareReg2 = AluRegisters::R_2;
for (auto compareOperation : {CompareOperation::Equal, CompareOperation::NotEqual, CompareOperation::GreaterOrEqual}) {
for (bool indirect : {false, true}) {
uint8_t buffer[expectedSize] = {};
LinearStream cmdStream(buffer, expectedSize);
EncodeBatchBufferStartOrEnd<FamilyType>::programConditionalRegRegBatchBufferStart(cmdStream, indirect ? 0 : startAddress, compareReg1, compareReg2, compareOperation, indirect);
EXPECT_EQ(expectedSize, cmdStream.getUsed());
validateBaseProgramming<FamilyType>(buffer, compareOperation, startAddress, indirect, compareReg1, compareReg2);
}
}
}