From 0193b3ea696bc01b77d9cffdb08d53d64c124e56 Mon Sep 17 00:00:00 2001 From: Filip Hazubski Date: Wed, 27 Nov 2019 18:00:52 +0100 Subject: [PATCH] Change maxNBitValue to a constexpr function Now maxNBitValue can be used with run time variables. Change-Id: I323071400305e05e6303a33e24e90c521246d73f Signed-off-by: Filip Hazubski --- core/memory_manager/gfx_partition.cpp | 10 ++++---- core/memory_manager/graphics_allocation.h | 4 ++-- core/memory_manager/memory_constants.h | 23 ++++++++++--------- .../compiler_interface_tests.cpp | 8 +++---- core/unit_tests/utilities/numeric_tests.cpp | 2 +- core/utilities/numeric.h | 4 +++- .../command_queue/gpgpu_walker_bdw_plus.inl | 2 +- runtime/dll/linux/allocator_helper.cpp | 2 +- runtime/event/event.cpp | 2 +- .../execution_environment.cpp | 2 +- runtime/gmm_helper/gmm_helper.h | 2 +- runtime/memory_manager/memory_manager.h | 2 +- runtime/memory_manager/page_table.cpp | 4 ++-- runtime/memory_manager/page_table.inl | 4 ++-- runtime/os_interface/linux/drm_neo.cpp | 2 +- runtime/os_interface/linux/hw_info_config.cpp | 2 +- .../enqueue_copy_buffer_rect_tests.cpp | 4 ++-- .../enqueue_copy_buffer_tests.cpp | 2 +- .../enqueue_copy_buffer_to_image_tests.cpp | 2 +- .../enqueue_copy_image_tests.cpp | 2 +- .../enqueue_copy_image_to_buffer_tests.cpp | 2 +- .../enqueue_fill_buffer_tests.cpp | 2 +- .../enqueue_fill_image_tests.cpp | 2 +- .../command_queue/enqueue_kernel_2_tests.cpp | 2 +- .../enqueue_read_buffer_rect_tests.cpp | 2 +- .../enqueue_read_buffer_tests.cpp | 2 +- .../enqueue_read_image_tests.cpp | 2 +- .../enqueue_write_buffer_rect_tests.cpp | 2 +- .../enqueue_write_buffer_tests.cpp | 2 +- .../enqueue_write_image_tests.cpp | 2 +- .../command_queue/work_group_size_tests.cpp | 2 +- unit_tests/linux/main_linux_dll.cpp | 2 +- .../memory_manager/gfx_partition_tests.inl | 14 +++++------ ..._manager_allocate_in_device_pool_tests.cpp | 2 +- .../linux/drm_memory_manager_tests.cpp | 2 +- .../scheduler/scheduler_source_tests.cpp | 2 +- 36 files changed, 66 insertions(+), 63 deletions(-) diff --git a/core/memory_manager/gfx_partition.cpp b/core/memory_manager/gfx_partition.cpp index 8ffaaed540..1d1bbb247f 100644 --- a/core/memory_manager/gfx_partition.cpp +++ b/core/memory_manager/gfx_partition.cpp @@ -106,13 +106,13 @@ void GfxPartition::init(uint64_t gpuAddressSpace, size_t cpuAddressRangeSizeToRe const uint64_t gfxHeap32Size = 4 * MemoryConstants::gigaByte; if (is32bit) { - gfxBase = maxNBitValue<32> + 1; + gfxBase = maxNBitValue(32) + 1; heapInit(HeapIndex::HEAP_SVM, 0ull, gfxBase); } else { - if (gpuAddressSpace == maxNBitValue<48>) { - gfxBase = maxNBitValue<48 - 1> + 1; + if (gpuAddressSpace == maxNBitValue(48)) { + gfxBase = maxNBitValue(48 - 1) + 1; heapInit(HeapIndex::HEAP_SVM, 0ull, gfxBase); - } else if (gpuAddressSpace == maxNBitValue<47>) { + } else if (gpuAddressSpace == maxNBitValue(47)) { reservedCpuAddressRangeSize = cpuAddressRangeSizeToReserve; UNRECOVERABLE_IF(reservedCpuAddressRangeSize == 0); reservedCpuAddressRange = osMemory->reserveCpuAddressRange(reservedCpuAddressRangeSize); @@ -121,7 +121,7 @@ void GfxPartition::init(uint64_t gpuAddressSpace, size_t cpuAddressRangeSizeToRe gfxBase = reinterpret_cast(reservedCpuAddressRange); gfxTop = gfxBase + reservedCpuAddressRangeSize; heapInit(HeapIndex::HEAP_SVM, 0ull, gpuAddressSpace + 1); - } else if (gpuAddressSpace < maxNBitValue<47>) { + } else if (gpuAddressSpace < maxNBitValue(47)) { gfxBase = 0ull; heapInit(HeapIndex::HEAP_SVM, 0ull, 0ull); } else { diff --git a/core/memory_manager/graphics_allocation.h b/core/memory_manager/graphics_allocation.h index eae5e24a45..3af4ee1b4a 100644 --- a/core/memory_manager/graphics_allocation.h +++ b/core/memory_manager/graphics_allocation.h @@ -230,8 +230,8 @@ class GraphicsAllocation : public IDNode { uint32_t inspectionId = 0u; }; struct AubInfo { - uint32_t aubWritable = maxNBitValue<32>; - uint32_t tbxWritable = maxNBitValue<32>; + uint32_t aubWritable = std::numeric_limits::max(); + uint32_t tbxWritable = std::numeric_limits::max(); bool allocDumpable = false; bool memObjectsAllocationWithWritableFlags = false; }; diff --git a/core/memory_manager/memory_constants.h b/core/memory_manager/memory_constants.h index 8f66730c12..febc8c845b 100644 --- a/core/memory_manager/memory_constants.h +++ b/core/memory_manager/memory_constants.h @@ -13,11 +13,12 @@ constexpr bool is32bit = (sizeof(void *) == 4); constexpr bool is64bit = (sizeof(void *) == 8); -template -constexpr uint64_t maxNBitValue = ((1ULL << N) - 1); -static_assert(maxNBitValue<8> == std::numeric_limits::max(), ""); -static_assert(maxNBitValue<16> == std::numeric_limits::max(), ""); -static_assert(maxNBitValue<32> == std::numeric_limits::max(), ""); +constexpr uint64_t maxNBitValue(uint64_t n) { + return ((1ULL << n) - 1); +} +static_assert(maxNBitValue(8) == std::numeric_limits::max(), ""); +static_assert(maxNBitValue(16) == std::numeric_limits::max(), ""); +static_assert(maxNBitValue(32) == std::numeric_limits::max(), ""); namespace MemoryConstants { static const uint64_t zoneHigh = ~(uint64_t)0xFFFFFFFF; @@ -35,16 +36,16 @@ static const size_t slmWindowAlignment = 128 * kiloByte; static const size_t slmWindowSize = 64 * kiloByte; static const uintptr_t pageMask = (pageSize - 1); static const uintptr_t page64kMask = (pageSize64k - 1); -static const uint64_t max32BitAppAddress = maxNBitValue<31>; -static const uint64_t max64BitAppAddress = maxNBitValue<47>; +static const uint64_t max32BitAppAddress = maxNBitValue(31); +static const uint64_t max64BitAppAddress = maxNBitValue(47); static const uint32_t sizeOf4GBinPageEntities = (MemoryConstants::gigaByte * 4 - MemoryConstants::pageSize) / MemoryConstants::pageSize; -static const uint64_t max32BitAddress = maxNBitValue<32>; -static const uint64_t max36BitAddress = ((1ULL << 36) - 1); -static const uint64_t max48BitAddress = maxNBitValue<48>; +static const uint64_t max32BitAddress = maxNBitValue(32); +static const uint64_t max36BitAddress = (maxNBitValue(36)); +static const uint64_t max48BitAddress = maxNBitValue(48); static const uintptr_t page4kEntryMask = std::numeric_limits::max() & ~MemoryConstants::pageMask; static const uintptr_t page64kEntryMask = std::numeric_limits::max() & ~MemoryConstants::page64kMask; static const int GfxAddressBits = is64bit ? 48 : 32; -static const uint64_t maxSvmAddress = is64bit ? maxNBitValue<47> : maxNBitValue<32>; +static const uint64_t maxSvmAddress = is64bit ? maxNBitValue(47) : maxNBitValue(32); } // namespace MemoryConstants diff --git a/core/unit_tests/compiler_interface/compiler_interface_tests.cpp b/core/unit_tests/compiler_interface/compiler_interface_tests.cpp index 24c327889e..54ad8ac3bd 100644 --- a/core/unit_tests/compiler_interface/compiler_interface_tests.cpp +++ b/core/unit_tests/compiler_interface/compiler_interface_tests.cpp @@ -581,7 +581,7 @@ TEST(TranslateTest, givenNullPtrAsGtPinInputWhenTranslatorReturnsNullptrThenNull TEST(TranslateTest, whenTranslatorReturnsInvalidOutputThenNullptrIsReturned) { TranslationCtxMock mockTranslationCtx; auto mockCifBuffer = CIF::RAII::UPtr_t(new MockCIFBuffer()); - for (uint32_t i = 1; i <= (1 << 3) - 1; ++i) { + for (uint32_t i = 1; i <= maxNBitValue(3); ++i) { mockTranslationCtx.returnNullptrDebugData = (i & 1) != 0; mockTranslationCtx.returnNullptrLog = (i & (1 << 1)) != 0; mockTranslationCtx.returnNullptrOutput = (i & (1 << 2)) != 0; @@ -593,7 +593,7 @@ TEST(TranslateTest, whenTranslatorReturnsInvalidOutputThenNullptrIsReturned) { TEST(TranslateTest, givenNullPtrAsGtPinInputWhenTranslatorReturnsInvalidOutputThenNullptrIsReturned) { TranslationCtxMock mockTranslationCtx; auto mockCifBuffer = CIF::RAII::UPtr_t(new MockCIFBuffer()); - for (uint32_t i = 1; i <= (1 << 3) - 1; ++i) { + for (uint32_t i = 1; i <= maxNBitValue(3); ++i) { mockTranslationCtx.returnNullptrDebugData = (i & 1) != 0; mockTranslationCtx.returnNullptrLog = (i & (1 << 1)) != 0; mockTranslationCtx.returnNullptrOutput = (i & (1 << 2)) != 0; @@ -605,7 +605,7 @@ TEST(TranslateTest, givenNullPtrAsGtPinInputWhenTranslatorReturnsInvalidOutputTh TEST(TranslateTest, givenSpecConstantsBuffersAndNullPtrAsGtPinInputWhenTranslatorReturnsInvalidOutputThenNullptrIsReturned) { TranslationCtxMock mockTranslationCtx; auto mockCifBuffer = CIF::RAII::UPtr_t(new MockCIFBuffer()); - for (uint32_t i = 1; i <= (1 << 3) - 1; ++i) { + for (uint32_t i = 1; i <= maxNBitValue(3); ++i) { mockTranslationCtx.returnNullptrDebugData = (i & 1) != 0; mockTranslationCtx.returnNullptrLog = (i & (1 << 1)) != 0; mockTranslationCtx.returnNullptrOutput = (i & (1 << 2)) != 0; @@ -617,7 +617,7 @@ TEST(TranslateTest, givenSpecConstantsBuffersAndNullPtrAsGtPinInputWhenTranslato TEST(TranslateTest, whenAnyArgIsNullThenNullptrIsReturnedAndTranslatorIsNotInvoked) { TranslationCtxMock mockTranslationCtx; auto mockCifBuffer = CIF::RAII::UPtr_t(new MockCIFBuffer()); - for (uint32_t i = 0; i < (1 << 3) - 1; ++i) { + for (uint32_t i = 0; i < maxNBitValue(3); ++i) { auto src = (i & 1) ? mockCifBuffer.get() : nullptr; auto opts = (i & (1 << 1)) ? mockCifBuffer.get() : nullptr; auto intOpts = (i & (1 << 2)) ? mockCifBuffer.get() : nullptr; diff --git a/core/unit_tests/utilities/numeric_tests.cpp b/core/unit_tests/utilities/numeric_tests.cpp index bfdc3b4767..93dc2b2f7f 100644 --- a/core/unit_tests/utilities/numeric_tests.cpp +++ b/core/unit_tests/utilities/numeric_tests.cpp @@ -38,7 +38,7 @@ TEST(FixedU4D8, whenCreatingFromTooBigFloatThenValueIsClamped) { FixedU4D8 u4d8Max{maxU4D8}; FixedU4D8 u4d8MaxPlus1{maxU4D8 + 1}; EXPECT_EQ(u4d8Max.getRawAccess(), u4d8MaxPlus1.getRawAccess()); - EXPECT_EQ((1U << (4 + 8)) - 1, u4d8Max.getRawAccess()); // all 12 bits should be set + EXPECT_EQ(maxNBitValue(4 + 8), u4d8Max.getRawAccess()); // all 12 bits should be set EXPECT_EQ(maxU4D8, u4d8Max.asFloat()); } diff --git a/core/utilities/numeric.h b/core/utilities/numeric.h index 8e91010ec2..a21fa610f7 100644 --- a/core/utilities/numeric.h +++ b/core/utilities/numeric.h @@ -7,6 +7,8 @@ #pragma once +#include "core/memory_manager/memory_constants.h" + #include namespace NEO { @@ -64,7 +66,7 @@ struct UnsignedFixedPointValue { template static constexpr FloatingType getMaxRepresentableFloatingPointValue() { return static_cast( - static_cast((1U << IntegerBits) - 1) + (static_cast((1U << FractionalBits) - 1) / (1U << FractionalBits))); + static_cast(maxNBitValue(IntegerBits)) + (static_cast(maxNBitValue(FractionalBits)) / (1U << FractionalBits))); } template diff --git a/runtime/command_queue/gpgpu_walker_bdw_plus.inl b/runtime/command_queue/gpgpu_walker_bdw_plus.inl index 9e790a510b..535fc15b32 100644 --- a/runtime/command_queue/gpgpu_walker_bdw_plus.inl +++ b/runtime/command_queue/gpgpu_walker_bdw_plus.inl @@ -35,7 +35,7 @@ inline size_t GpgpuWalkerHelper::setGpgpuWalkerThreadData( // compute executionMask - to tell which SIMD lines are active within thread auto remainderSimdLanes = localWorkSize & (simd - 1); - uint64_t executionMask = (1ull << remainderSimdLanes) - 1; + uint64_t executionMask = maxNBitValue(remainderSimdLanes); if (!executionMask) executionMask = ~executionMask; diff --git a/runtime/dll/linux/allocator_helper.cpp b/runtime/dll/linux/allocator_helper.cpp index 079c461e15..7a8c1a7f7c 100644 --- a/runtime/dll/linux/allocator_helper.cpp +++ b/runtime/dll/linux/allocator_helper.cpp @@ -13,7 +13,7 @@ namespace NEO { size_t getSizeToReserve() { - return (maxNBitValue<47> + 1) / 4; + return (maxNBitValue(47) + 1) / 4; } } // namespace NEO diff --git a/runtime/event/event.cpp b/runtime/event/event.cpp index 14192a176f..4f827ed682 100644 --- a/runtime/event/event.cpp +++ b/runtime/event/event.cpp @@ -232,7 +232,7 @@ void Event::updateCompletionStamp(uint32_t taskCount, uint32_t tasklevel, FlushS cl_ulong Event::getDelta(cl_ulong startTime, cl_ulong endTime) { - cl_ulong Max = (1ULL << OCLRT_NUM_TIMESTAMP_BITS) - 1; + cl_ulong Max = maxNBitValue(OCLRT_NUM_TIMESTAMP_BITS); cl_ulong Delta = 0; startTime &= Max; diff --git a/runtime/execution_environment/execution_environment.cpp b/runtime/execution_environment/execution_environment.cpp index e7ea650da1..22d5725da9 100644 --- a/runtime/execution_environment/execution_environment.cpp +++ b/runtime/execution_environment/execution_environment.cpp @@ -98,7 +98,7 @@ BuiltIns *ExecutionEnvironment::getBuiltIns() { } bool ExecutionEnvironment::isFullRangeSvm() const { - return hwInfo->capabilityTable.gpuAddressSpace >= maxNBitValue<47>; + return hwInfo->capabilityTable.gpuAddressSpace >= maxNBitValue(47); } void ExecutionEnvironment::prepareRootDeviceEnvironments(uint32_t numRootDevices) { diff --git a/runtime/gmm_helper/gmm_helper.h b/runtime/gmm_helper/gmm_helper.h index 0fa40081ec..ade1790671 100644 --- a/runtime/gmm_helper/gmm_helper.h +++ b/runtime/gmm_helper/gmm_helper.h @@ -37,7 +37,7 @@ class GmmHelper { template static uint64_t decanonize(uint64_t address) { - return (address & maxNBitValue); + return (address & maxNBitValue(addressWidth)); } static GmmClientContext *getClientContext(); diff --git a/runtime/memory_manager/memory_manager.h b/runtime/memory_manager/memory_manager.h index 2b497d2bfb..6ffe4f38dc 100644 --- a/runtime/memory_manager/memory_manager.h +++ b/runtime/memory_manager/memory_manager.h @@ -34,7 +34,7 @@ class HostPtrManager; class OsContext; inline DeviceBitfield getDeviceBitfieldForNDevices(uint32_t numDevices) { - return DeviceBitfield((1u << numDevices) - 1u); + return DeviceBitfield(maxNBitValue(numDevices)); } enum AllocationUsage { diff --git a/runtime/memory_manager/page_table.cpp b/runtime/memory_manager/page_table.cpp index c805e17f48..cd649027bb 100644 --- a/runtime/memory_manager/page_table.cpp +++ b/runtime/memory_manager/page_table.cpp @@ -14,7 +14,7 @@ namespace NEO { uintptr_t PTE::map(uintptr_t vm, size_t size, uint64_t entryBits, uint32_t memoryBank) { const size_t shift = 12; - const uint32_t mask = (1 << bits) - 1; + const auto mask = static_cast(maxNBitValue(bits)); size_t indexStart = (vm >> shift) & mask; size_t indexEnd = ((vm + size - 1) >> shift) & mask; uintptr_t res = -1; @@ -37,7 +37,7 @@ uintptr_t PTE::map(uintptr_t vm, size_t size, uint64_t entryBits, uint32_t memor void PTE::pageWalk(uintptr_t vm, size_t size, size_t offset, uint64_t entryBits, PageWalker &pageWalker, uint32_t memoryBank) { static const uint32_t bits = 9; const size_t shift = 12; - const uint32_t mask = (1 << bits) - 1; + const auto mask = static_cast(maxNBitValue(bits)); size_t indexStart = (vm >> shift) & mask; size_t indexEnd = ((vm + size - 1) >> shift) & mask; uint64_t res = -1; diff --git a/runtime/memory_manager/page_table.inl b/runtime/memory_manager/page_table.inl index 8ab79bc6ee..af4855ed4c 100644 --- a/runtime/memory_manager/page_table.inl +++ b/runtime/memory_manager/page_table.inl @@ -24,7 +24,7 @@ inline void PageTable::pageWalk(uintptr_t vm, size_t size, size_t of template inline uintptr_t PageTable::map(uintptr_t vm, size_t size, uint64_t entryBits, uint32_t memoryBank) { const size_t shift = T::getBits() + 12; - const uintptr_t mask = (1 << bits) - 1; + const uintptr_t mask = static_cast(maxNBitValue(bits)); size_t indexStart = (vm >> shift) & mask; size_t indexEnd = ((vm + size - 1) >> shift) & mask; uintptr_t res = -1; @@ -48,7 +48,7 @@ inline uintptr_t PageTable::map(uintptr_t vm, size_t size, uint6 template inline void PageTable::pageWalk(uintptr_t vm, size_t size, size_t offset, uint64_t entryBits, PageWalker &pageWalker, uint32_t memoryBank) { const size_t shift = T::getBits() + 12; - const uintptr_t mask = (1 << bits) - 1; + const uintptr_t mask = static_cast(maxNBitValue(bits)); size_t indexStart = (vm >> shift) & mask; size_t indexEnd = ((vm + size - 1) >> shift) & mask; uintptr_t vmMask = (uintptr_t(-1) >> (sizeof(void *) * 8 - shift - bits)); diff --git a/runtime/os_interface/linux/drm_neo.cpp b/runtime/os_interface/linux/drm_neo.cpp index 5e76a20577..75596228e2 100644 --- a/runtime/os_interface/linux/drm_neo.cpp +++ b/runtime/os_interface/linux/drm_neo.cpp @@ -156,7 +156,7 @@ int Drm::getQueueSliceCount(drm_i915_gem_context_param_sseu *sseu) { } uint64_t Drm::getSliceMask(uint64_t sliceCount) { - return static_cast((1 << sliceCount) - 1); + return maxNBitValue(sliceCount); } bool Drm::setQueueSliceCount(uint64_t sliceCount) { if (sliceCountChangeSupported) { diff --git a/runtime/os_interface/linux/hw_info_config.cpp b/runtime/os_interface/linux/hw_info_config.cpp index ffc87d7f53..f3cf07282e 100644 --- a/runtime/os_interface/linux/hw_info_config.cpp +++ b/runtime/os_interface/linux/hw_info_config.cpp @@ -26,7 +26,7 @@ namespace NEO { HwInfoConfig *hwInfoConfigFactory[IGFX_MAX_PRODUCT] = {}; uint32_t bitExact(uint32_t value, uint32_t highBit, uint32_t lowBit) { - uint32_t bitVal = ((value >> lowBit) & ((1 << (highBit - lowBit + 1)) - 1)); + uint32_t bitVal = static_cast((value >> lowBit) & maxNBitValue(highBit - lowBit + 1)); return bitVal; } diff --git a/unit_tests/command_queue/enqueue_copy_buffer_rect_tests.cpp b/unit_tests/command_queue/enqueue_copy_buffer_rect_tests.cpp index e2b24ed986..9c517e4c9d 100644 --- a/unit_tests/command_queue/enqueue_copy_buffer_rect_tests.cpp +++ b/unit_tests/command_queue/enqueue_copy_buffer_rect_tests.cpp @@ -124,7 +124,7 @@ HWCMDTEST_F(IGFX_GEN8_CORE, EnqueueCopyBufferRectTest, WhenCopyingBufferRect2DTh // Compute the SIMD lane mask size_t simd = cmd->getSimdSize() == GPGPU_WALKER::SIMD_SIZE_SIMD32 ? 32 : cmd->getSimdSize() == GPGPU_WALKER::SIMD_SIZE_SIMD16 ? 16 : 8; - uint64_t simdMask = (1ull << simd) - 1; + uint64_t simdMask = maxNBitValue(simd); // Mask off lanes based on the execution masks auto laneMaskRight = cmd->getRightExecutionMask() & simdMask; @@ -301,7 +301,7 @@ HWCMDTEST_F(IGFX_GEN8_CORE, EnqueueCopyBufferRectTest, WhenCopyingBufferRect3DTh // Compute the SIMD lane mask size_t simd = cmd->getSimdSize() == GPGPU_WALKER::SIMD_SIZE_SIMD32 ? 32 : cmd->getSimdSize() == GPGPU_WALKER::SIMD_SIZE_SIMD16 ? 16 : 8; - uint64_t simdMask = (1ull << simd) - 1; + uint64_t simdMask = maxNBitValue(simd); // Mask off lanes based on the execution masks auto laneMaskRight = cmd->getRightExecutionMask() & simdMask; diff --git a/unit_tests/command_queue/enqueue_copy_buffer_tests.cpp b/unit_tests/command_queue/enqueue_copy_buffer_tests.cpp index 389ffd288b..56c7ecc3bc 100644 --- a/unit_tests/command_queue/enqueue_copy_buffer_tests.cpp +++ b/unit_tests/command_queue/enqueue_copy_buffer_tests.cpp @@ -101,7 +101,7 @@ HWCMDTEST_F(IGFX_GEN8_CORE, EnqueueCopyBufferTest, WhenCopyingBufferThenGpgpuWal // Compute the SIMD lane mask size_t simd = cmd->getSimdSize() == GPGPU_WALKER::SIMD_SIZE_SIMD32 ? 32 : cmd->getSimdSize() == GPGPU_WALKER::SIMD_SIZE_SIMD16 ? 16 : 8; - uint64_t simdMask = (1ull << simd) - 1; + uint64_t simdMask = maxNBitValue(simd); // Mask off lanes based on the execution masks auto laneMaskRight = cmd->getRightExecutionMask() & simdMask; diff --git a/unit_tests/command_queue/enqueue_copy_buffer_to_image_tests.cpp b/unit_tests/command_queue/enqueue_copy_buffer_to_image_tests.cpp index 468eafa180..0077c4b101 100644 --- a/unit_tests/command_queue/enqueue_copy_buffer_to_image_tests.cpp +++ b/unit_tests/command_queue/enqueue_copy_buffer_to_image_tests.cpp @@ -40,7 +40,7 @@ HWCMDTEST_F(IGFX_GEN8_CORE, EnqueueCopyBufferToImageTest, WhenCopyingBufferToIma // Compute the SIMD lane mask size_t simd = cmd->getSimdSize() == GPGPU_WALKER::SIMD_SIZE_SIMD32 ? 32 : cmd->getSimdSize() == GPGPU_WALKER::SIMD_SIZE_SIMD16 ? 16 : 8; - uint64_t simdMask = (1ull << simd) - 1; + uint64_t simdMask = maxNBitValue(simd); // Mask off lanes based on the execution masks auto laneMaskRight = cmd->getRightExecutionMask() & simdMask; diff --git a/unit_tests/command_queue/enqueue_copy_image_tests.cpp b/unit_tests/command_queue/enqueue_copy_image_tests.cpp index c4ca6eb700..ad0083f38f 100644 --- a/unit_tests/command_queue/enqueue_copy_image_tests.cpp +++ b/unit_tests/command_queue/enqueue_copy_image_tests.cpp @@ -39,7 +39,7 @@ HWCMDTEST_F(IGFX_GEN8_CORE, EnqueueCopyImageTest, WhenCopyingImageThenGpgpuWalke // Compute the SIMD lane mask size_t simd = cmd->getSimdSize() == GPGPU_WALKER::SIMD_SIZE_SIMD32 ? 32 : cmd->getSimdSize() == GPGPU_WALKER::SIMD_SIZE_SIMD16 ? 16 : 8; - uint64_t simdMask = (1ull << simd) - 1; + uint64_t simdMask = maxNBitValue(simd); // Mask off lanes based on the execution masks auto laneMaskRight = cmd->getRightExecutionMask() & simdMask; diff --git a/unit_tests/command_queue/enqueue_copy_image_to_buffer_tests.cpp b/unit_tests/command_queue/enqueue_copy_image_to_buffer_tests.cpp index 3306e53a88..018764c0fa 100644 --- a/unit_tests/command_queue/enqueue_copy_image_to_buffer_tests.cpp +++ b/unit_tests/command_queue/enqueue_copy_image_to_buffer_tests.cpp @@ -41,7 +41,7 @@ HWCMDTEST_F(IGFX_GEN8_CORE, EnqueueCopyImageToBufferTest, WhenCopyingImageToBuff // Compute the SIMD lane mask size_t simd = cmd->getSimdSize() == GPGPU_WALKER::SIMD_SIZE_SIMD32 ? 32 : cmd->getSimdSize() == GPGPU_WALKER::SIMD_SIZE_SIMD16 ? 16 : 8; - uint64_t simdMask = (1ull << simd) - 1; + uint64_t simdMask = maxNBitValue(simd); // Mask off lanes based on the execution masks auto laneMaskRight = cmd->getRightExecutionMask() & simdMask; diff --git a/unit_tests/command_queue/enqueue_fill_buffer_tests.cpp b/unit_tests/command_queue/enqueue_fill_buffer_tests.cpp index a489c57463..2e9a761859 100644 --- a/unit_tests/command_queue/enqueue_fill_buffer_tests.cpp +++ b/unit_tests/command_queue/enqueue_fill_buffer_tests.cpp @@ -74,7 +74,7 @@ HWCMDTEST_F(IGFX_GEN8_CORE, EnqueueFillBufferCmdTests, WhenFillingBufferThenGpgp // Compute the SIMD lane mask size_t simd = cmd->getSimdSize() == GPGPU_WALKER::SIMD_SIZE_SIMD32 ? 32 : cmd->getSimdSize() == GPGPU_WALKER::SIMD_SIZE_SIMD16 ? 16 : 8; - uint64_t simdMask = (1ull << simd) - 1; + uint64_t simdMask = maxNBitValue(simd); // Mask off lanes based on the execution masks auto laneMaskRight = cmd->getRightExecutionMask() & simdMask; diff --git a/unit_tests/command_queue/enqueue_fill_image_tests.cpp b/unit_tests/command_queue/enqueue_fill_image_tests.cpp index f325e7890b..4793bc3371 100644 --- a/unit_tests/command_queue/enqueue_fill_image_tests.cpp +++ b/unit_tests/command_queue/enqueue_fill_image_tests.cpp @@ -60,7 +60,7 @@ HWCMDTEST_F(IGFX_GEN8_CORE, EnqueueFillImageTest, WhenFillingImageThenGpgpuWalke // Compute the SIMD lane mask size_t simd = cmd->getSimdSize() == GPGPU_WALKER::SIMD_SIZE_SIMD32 ? 32 : cmd->getSimdSize() == GPGPU_WALKER::SIMD_SIZE_SIMD16 ? 16 : 8; - uint64_t simdMask = (1ull << simd) - 1; + uint64_t simdMask = maxNBitValue(simd); // Mask off lanes based on the execution masks auto laneMaskRight = cmd->getRightExecutionMask() & simdMask; diff --git a/unit_tests/command_queue/enqueue_kernel_2_tests.cpp b/unit_tests/command_queue/enqueue_kernel_2_tests.cpp index 0d72b817bd..031c5ff225 100644 --- a/unit_tests/command_queue/enqueue_kernel_2_tests.cpp +++ b/unit_tests/command_queue/enqueue_kernel_2_tests.cpp @@ -162,7 +162,7 @@ HWCMDTEST_P(IGFX_GEN8_CORE, EnqueueWorkItemTests, GPGPUWalker) { // Compute the SIMD lane mask size_t simd = cmd->getSimdSize() == GPGPU_WALKER::SIMD_SIZE_SIMD32 ? 32 : cmd->getSimdSize() == GPGPU_WALKER::SIMD_SIZE_SIMD16 ? 16 : 8; - uint64_t simdMask = (1ull << simd) - 1; + uint64_t simdMask = maxNBitValue(simd); // Mask off lanes based on the execution masks auto laneMaskRight = cmd->getRightExecutionMask() & simdMask; diff --git a/unit_tests/command_queue/enqueue_read_buffer_rect_tests.cpp b/unit_tests/command_queue/enqueue_read_buffer_rect_tests.cpp index eb87d5c680..c12c4f1845 100644 --- a/unit_tests/command_queue/enqueue_read_buffer_rect_tests.cpp +++ b/unit_tests/command_queue/enqueue_read_buffer_rect_tests.cpp @@ -138,7 +138,7 @@ HWCMDTEST_F(IGFX_GEN8_CORE, EnqueueReadBufferRectTest, Given2dRegionWhenReadingB // Compute the SIMD lane mask size_t simd = cmd->getSimdSize() == GPGPU_WALKER::SIMD_SIZE_SIMD32 ? 32 : cmd->getSimdSize() == GPGPU_WALKER::SIMD_SIZE_SIMD16 ? 16 : 8; - uint64_t simdMask = (1ull << simd) - 1; + uint64_t simdMask = maxNBitValue(simd); // Mask off lanes based on the execution masks auto laneMaskRight = cmd->getRightExecutionMask() & simdMask; diff --git a/unit_tests/command_queue/enqueue_read_buffer_tests.cpp b/unit_tests/command_queue/enqueue_read_buffer_tests.cpp index abb4a065b5..6b4b1999a0 100644 --- a/unit_tests/command_queue/enqueue_read_buffer_tests.cpp +++ b/unit_tests/command_queue/enqueue_read_buffer_tests.cpp @@ -79,7 +79,7 @@ HWCMDTEST_F(IGFX_GEN8_CORE, EnqueueReadBufferTypeTest, GPGPUWalker) { // Compute the SIMD lane mask size_t simd = cmd->getSimdSize() == GPGPU_WALKER::SIMD_SIZE_SIMD32 ? 32 : cmd->getSimdSize() == GPGPU_WALKER::SIMD_SIZE_SIMD16 ? 16 : 8; - uint64_t simdMask = (1ull << simd) - 1; + uint64_t simdMask = maxNBitValue(simd); // Mask off lanes based on the execution masks auto laneMaskRight = cmd->getRightExecutionMask() & simdMask; diff --git a/unit_tests/command_queue/enqueue_read_image_tests.cpp b/unit_tests/command_queue/enqueue_read_image_tests.cpp index a67d724c45..77bca504cd 100644 --- a/unit_tests/command_queue/enqueue_read_image_tests.cpp +++ b/unit_tests/command_queue/enqueue_read_image_tests.cpp @@ -40,7 +40,7 @@ HWCMDTEST_F(IGFX_GEN8_CORE, EnqueueReadImageTest, WhenReadingImageThenGpgpuWalke // Compute the SIMD lane mask size_t simd = cmd->getSimdSize() == GPGPU_WALKER::SIMD_SIZE_SIMD32 ? 32 : cmd->getSimdSize() == GPGPU_WALKER::SIMD_SIZE_SIMD16 ? 16 : 8; - uint64_t simdMask = (1ull << simd) - 1; + uint64_t simdMask = maxNBitValue(simd); // Mask off lanes based on the execution masks auto laneMaskRight = cmd->getRightExecutionMask() & simdMask; diff --git a/unit_tests/command_queue/enqueue_write_buffer_rect_tests.cpp b/unit_tests/command_queue/enqueue_write_buffer_rect_tests.cpp index 5f2d03186a..9ddca6507c 100644 --- a/unit_tests/command_queue/enqueue_write_buffer_rect_tests.cpp +++ b/unit_tests/command_queue/enqueue_write_buffer_rect_tests.cpp @@ -113,7 +113,7 @@ HWCMDTEST_F(IGFX_GEN8_CORE, EnqueueWriteBufferRectTest, Given2dRegionWhenWriting // Compute the SIMD lane mask size_t simd = cmd->getSimdSize() == GPGPU_WALKER::SIMD_SIZE_SIMD32 ? 32 : cmd->getSimdSize() == GPGPU_WALKER::SIMD_SIZE_SIMD16 ? 16 : 8; - uint64_t simdMask = (1ull << simd) - 1; + uint64_t simdMask = maxNBitValue(simd); // Mask off lanes based on the execution masks auto laneMaskRight = cmd->getRightExecutionMask() & simdMask; diff --git a/unit_tests/command_queue/enqueue_write_buffer_tests.cpp b/unit_tests/command_queue/enqueue_write_buffer_tests.cpp index 8b24b614e8..bbf2866c3e 100644 --- a/unit_tests/command_queue/enqueue_write_buffer_tests.cpp +++ b/unit_tests/command_queue/enqueue_write_buffer_tests.cpp @@ -102,7 +102,7 @@ HWCMDTEST_F(IGFX_GEN8_CORE, EnqueueWriteBufferTypeTest, WhenWritingBufferThenCom // Compute the SIMD lane mask size_t simd = cmd->getSimdSize() == GPGPU_WALKER::SIMD_SIZE_SIMD32 ? 32 : cmd->getSimdSize() == GPGPU_WALKER::SIMD_SIZE_SIMD16 ? 16 : 8; - uint64_t simdMask = (1ull << simd) - 1; + uint64_t simdMask = maxNBitValue(simd); // Mask off lanes based on the execution masks auto laneMaskRight = cmd->getRightExecutionMask() & simdMask; diff --git a/unit_tests/command_queue/enqueue_write_image_tests.cpp b/unit_tests/command_queue/enqueue_write_image_tests.cpp index 33bf8b90cf..04b65901a4 100644 --- a/unit_tests/command_queue/enqueue_write_image_tests.cpp +++ b/unit_tests/command_queue/enqueue_write_image_tests.cpp @@ -39,7 +39,7 @@ HWCMDTEST_F(IGFX_GEN8_CORE, EnqueueWriteImageTest, WhenWritingImageThenCommandsA // Compute the SIMD lane mask size_t simd = cmd->getSimdSize() == GPGPU_WALKER::SIMD_SIZE_SIMD32 ? 32 : cmd->getSimdSize() == GPGPU_WALKER::SIMD_SIZE_SIMD16 ? 16 : 8; - uint64_t simdMask = (1ull << simd) - 1; + uint64_t simdMask = maxNBitValue(simd); // Mask off lanes based on the execution masks auto laneMaskRight = cmd->getRightExecutionMask() & simdMask; diff --git a/unit_tests/command_queue/work_group_size_tests.cpp b/unit_tests/command_queue/work_group_size_tests.cpp index 6acd244b98..1819425b64 100644 --- a/unit_tests/command_queue/work_group_size_tests.cpp +++ b/unit_tests/command_queue/work_group_size_tests.cpp @@ -22,7 +22,7 @@ struct WorkGroupSizeBase { // Compute the SIMD lane mask size_t simd = pCmd.getSimdSize() == GPGPU_WALKER::SIMD_SIZE_SIMD32 ? 32 : pCmd.getSimdSize() == GPGPU_WALKER::SIMD_SIZE_SIMD16 ? 16 : 8; - uint64_t simdMask = (1ull << simd) - 1; + uint64_t simdMask = maxNBitValue(simd); // Mask off lanes based on the execution masks auto laneMaskRight = pCmd.getRightExecutionMask() & simdMask; diff --git a/unit_tests/linux/main_linux_dll.cpp b/unit_tests/linux/main_linux_dll.cpp index 1d4b1d328b..812e56cbdc 100644 --- a/unit_tests/linux/main_linux_dll.cpp +++ b/unit_tests/linux/main_linux_dll.cpp @@ -353,7 +353,7 @@ TEST_F(DrmTests, whenDrmIsCreatedThenSetMemoryRegionsDoesntFailAndDrmObjectIsRet } TEST(AllocatorHelper, givenExpectedSizeToReserveWhenGetSizeToReserveCalledThenExpectedValueReturned) { - EXPECT_EQ((maxNBitValue<47> + 1) / 4, NEO::getSizeToReserve()); + EXPECT_EQ((maxNBitValue(47) + 1) / 4, NEO::getSizeToReserve()); } TEST(DrmMemoryManagerCreate, whenCallCreateMemoryManagerThenDrmMemoryManagerIsCreated) { diff --git a/unit_tests/memory_manager/gfx_partition_tests.inl b/unit_tests/memory_manager/gfx_partition_tests.inl index fab737ef51..5f30060dd1 100644 --- a/unit_tests/memory_manager/gfx_partition_tests.inl +++ b/unit_tests/memory_manager/gfx_partition_tests.inl @@ -86,9 +86,9 @@ void testGfxPartition(MockGfxPartition &gfxPartition, uint64_t gfxBase, uint64_t TEST(GfxPartitionTest, testGfxPartitionFullRange48BitSVM) { MockGfxPartition gfxPartition; - gfxPartition.init(maxNBitValue<48>, reservedCpuAddressRangeSize, 0); + gfxPartition.init(maxNBitValue(48), reservedCpuAddressRangeSize, 0); - uint64_t gfxTop = maxNBitValue<48> + 1; + uint64_t gfxTop = maxNBitValue(48) + 1; uint64_t gfxBase = MemoryConstants::maxSvmAddress + 1; testGfxPartition(gfxPartition, gfxBase, gfxTop, gfxBase); @@ -96,10 +96,10 @@ TEST(GfxPartitionTest, testGfxPartitionFullRange48BitSVM) { TEST(GfxPartitionTest, testGfxPartitionFullRange47BitSVM) { MockGfxPartition gfxPartition; - gfxPartition.init(maxNBitValue<47>, reservedCpuAddressRangeSize, 0); + gfxPartition.init(maxNBitValue(47), reservedCpuAddressRangeSize, 0); uint64_t gfxBase = is32bit ? MemoryConstants::maxSvmAddress + 1 : (uint64_t)gfxPartition.getReservedCpuAddressRange(); - uint64_t gfxTop = is32bit ? maxNBitValue<47> + 1 : gfxBase + gfxPartition.getReservedCpuAddressRangeSize(); + uint64_t gfxTop = is32bit ? maxNBitValue(47) + 1 : gfxBase + gfxPartition.getReservedCpuAddressRangeSize(); uint64_t svmTop = MemoryConstants::maxSvmAddress + 1; testGfxPartition(gfxPartition, gfxBase, gfxTop, svmTop); @@ -107,10 +107,10 @@ TEST(GfxPartitionTest, testGfxPartitionFullRange47BitSVM) { TEST(GfxPartitionTest, testGfxPartitionLimitedRange) { MockGfxPartition gfxPartition; - gfxPartition.init(maxNBitValue<47 - 1>, reservedCpuAddressRangeSize, 0); + gfxPartition.init(maxNBitValue(47 - 1), reservedCpuAddressRangeSize, 0); uint64_t gfxBase = is32bit ? MemoryConstants::maxSvmAddress + 1 : 0ull; - uint64_t gfxTop = maxNBitValue<47 - 1> + 1; + uint64_t gfxTop = maxNBitValue(47 - 1) + 1; uint64_t svmTop = gfxBase; testGfxPartition(gfxPartition, gfxBase, gfxTop, svmTop); @@ -122,5 +122,5 @@ TEST(GfxPartitionTest, testGfxPartitionUnsupportedRange) { } MockGfxPartition gfxPartition; - EXPECT_THROW(gfxPartition.init(maxNBitValue<48 + 1>, reservedCpuAddressRangeSize, 0), std::exception); + EXPECT_THROW(gfxPartition.init(maxNBitValue(48 + 1), reservedCpuAddressRangeSize, 0), std::exception); } diff --git a/unit_tests/memory_manager/memory_manager_allocate_in_device_pool_tests.cpp b/unit_tests/memory_manager/memory_manager_allocate_in_device_pool_tests.cpp index ce0686d6be..7f4d9fae47 100644 --- a/unit_tests/memory_manager/memory_manager_allocate_in_device_pool_tests.cpp +++ b/unit_tests/memory_manager/memory_manager_allocate_in_device_pool_tests.cpp @@ -63,7 +63,7 @@ TEST(MemoryManagerTest, givenSvmGpuAllocationTypeWhenAllocationSystemMemoryFails } TEST(MemoryManagerTest, givenSvmGpuAllocationTypeWhenAllocationSucceedThenReturnGpuAddressAsHostPtr) { - if (platformDevices[0]->capabilityTable.gpuAddressSpace != maxNBitValue<48> && platformDevices[0]->capabilityTable.gpuAddressSpace != maxNBitValue<47>) { + if (platformDevices[0]->capabilityTable.gpuAddressSpace != maxNBitValue(48) && platformDevices[0]->capabilityTable.gpuAddressSpace != maxNBitValue(47)) { return; } diff --git a/unit_tests/os_interface/linux/drm_memory_manager_tests.cpp b/unit_tests/os_interface/linux/drm_memory_manager_tests.cpp index a4d36f4905..dbe120dddb 100644 --- a/unit_tests/os_interface/linux/drm_memory_manager_tests.cpp +++ b/unit_tests/os_interface/linux/drm_memory_manager_tests.cpp @@ -3143,7 +3143,7 @@ TEST_F(DrmMemoryManagerTest, givenSvmCpuAllocationWhenSizeAndAlignmentProvidedBu TEST_F(DrmMemoryManagerTest, givenDrmMemoryManagerAndReleaseGpuRangeIsCalledThenGpuAddressIsDecanonized) { auto mockGfxPartition = std::make_unique(); - mockGfxPartition->init(maxNBitValue<48>, 0, 0); + mockGfxPartition->init(maxNBitValue(48), 0, 0); auto size = 2 * MemoryConstants::megaByte; auto gpuAddress = mockGfxPartition->heapAllocate(HeapIndex::HEAP_STANDARD, size); auto gpuAddressCanonized = GmmHelper::canonize(gpuAddress); diff --git a/unit_tests/scheduler/scheduler_source_tests.cpp b/unit_tests/scheduler/scheduler_source_tests.cpp index 53adce4bcc..17ba1191fe 100644 --- a/unit_tests/scheduler/scheduler_source_tests.cpp +++ b/unit_tests/scheduler/scheduler_source_tests.cpp @@ -223,7 +223,7 @@ HWCMDTEST_F(IGFX_GEN8_CORE, SchedulerSourceTest, PatchGpgpuWalker) { EXPECT_EQ(DimSize.y, walker->getThreadGroupIdYDimension()); //EXPECT_EQ(DimSize.z, walker->getThreadGroupIdZDimension()); - uint32_t mask = (1 << (TotalLocalWorkSize % SIMDSize)) - 1; + uint32_t mask = static_cast(maxNBitValue(TotalLocalWorkSize % SIMDSize)); if (mask == 0) mask = ~0; uint32_t yMask = 0xffffffff;