From 01db5ef22a192389f35514badb276e5b27dfda7e Mon Sep 17 00:00:00 2001 From: Bellekallu Rajkiran Date: Tue, 22 Feb 2022 11:15:53 +0000 Subject: [PATCH] Add prelim support for memory, engine and scheduler Related-To: LOCI-2864 Source of prelim headers: https://github.com/intel-gpu/drm-uapi-helper/tree/master/i915-shared-headers Signed-off-by: Bellekallu Rajkiran --- level_zero/tools/source/CMakeLists.txt | 8 +- .../source/sysman/engine/linux/CMakeLists.txt | 13 +- .../engine/linux/os_engine_imp_prelim.cpp | 131 ++++++++ .../source/sysman/memory/linux/CMakeLists.txt | 13 +- .../memory/linux/os_memory_imp_prelim.cpp | 251 +++++++++++++++ .../memory/linux/os_memory_imp_prelim.h | 61 ++++ .../sysman/scheduler/linux/CMakeLists.txt | 13 +- .../linux/os_scheduler_imp_prelim.cpp | 295 ++++++++++++++++++ .../sysman/engine/linux/CMakeLists.txt | 24 +- .../sysman/memory/linux/CMakeLists.txt | 16 +- .../sysman/scheduler/linux/CMakeLists.txt | 20 +- .../uapi/prelim/drm/intel_hwconfig_types.h | 185 ++++++----- 12 files changed, 923 insertions(+), 107 deletions(-) create mode 100644 level_zero/tools/source/sysman/engine/linux/os_engine_imp_prelim.cpp create mode 100644 level_zero/tools/source/sysman/memory/linux/os_memory_imp_prelim.cpp create mode 100644 level_zero/tools/source/sysman/memory/linux/os_memory_imp_prelim.h create mode 100644 level_zero/tools/source/sysman/scheduler/linux/os_scheduler_imp_prelim.cpp diff --git a/level_zero/tools/source/CMakeLists.txt b/level_zero/tools/source/CMakeLists.txt index f401664145..51a04b3c78 100644 --- a/level_zero/tools/source/CMakeLists.txt +++ b/level_zero/tools/source/CMakeLists.txt @@ -1,5 +1,5 @@ # -# Copyright (C) 2020-2021 Intel Corporation +# Copyright (C) 2020-2022 Intel Corporation # # SPDX-License-Identifier: MIT # @@ -15,5 +15,11 @@ target_sources(${L0_STATIC_LIB_NAME} ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt ) +if((NEO_ENABLE_i915_PRELIM_DETECTION) AND ("${BRANCH_TYPE}" STREQUAL "")) + target_include_directories(${L0_STATIC_LIB_NAME} PUBLIC + ${I915_INCLUDES_DIR}/prelim + ) +endif() + # Make our source files visible to parent set_property(GLOBAL PROPERTY L0_TOOLS_SOURCES ${L0_TOOLS_SOURCES}) diff --git a/level_zero/tools/source/sysman/engine/linux/CMakeLists.txt b/level_zero/tools/source/sysman/engine/linux/CMakeLists.txt index 73920a8d92..1e98f620a6 100755 --- a/level_zero/tools/source/sysman/engine/linux/CMakeLists.txt +++ b/level_zero/tools/source/sysman/engine/linux/CMakeLists.txt @@ -1,15 +1,24 @@ # -# Copyright (C) 2020-2021 Intel Corporation +# Copyright (C) 2020-2022 Intel Corporation # # SPDX-License-Identifier: MIT # set(L0_SRCS_TOOLS_SYSMAN_ENGINE_LINUX ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt - ${CMAKE_CURRENT_SOURCE_DIR}${BRANCH_DIR_SUFFIX}os_engine_imp.cpp ${CMAKE_CURRENT_SOURCE_DIR}/os_engine_imp.h ) +if(NEO_ENABLE_i915_PRELIM_DETECTION) + list(APPEND L0_SRCS_TOOLS_SYSMAN_ENGINE_LINUX + ${CMAKE_CURRENT_SOURCE_DIR}/os_engine_imp_prelim.cpp + ) +else() + list(APPEND L0_SRCS_TOOLS_SYSMAN_ENGINE_LINUX + ${CMAKE_CURRENT_SOURCE_DIR}/os_engine_imp.cpp + ) +endif() + if(UNIX) target_sources(${L0_STATIC_LIB_NAME} PRIVATE diff --git a/level_zero/tools/source/sysman/engine/linux/os_engine_imp_prelim.cpp b/level_zero/tools/source/sysman/engine/linux/os_engine_imp_prelim.cpp new file mode 100644 index 0000000000..e359ace525 --- /dev/null +++ b/level_zero/tools/source/sysman/engine/linux/os_engine_imp_prelim.cpp @@ -0,0 +1,131 @@ +/* + * Copyright (C) 2022 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#include "shared/source/os_interface/linux/engine_info.h" + +#include "level_zero/tools/source/sysman/engine/linux/os_engine_imp.h" + +#include "sysman/linux/os_sysman_imp.h" +#include "third_party/uapi/prelim/drm/i915_drm_prelim.h" + +namespace L0 { + +static const std::multimap<__u16, zes_engine_group_t> i915ToEngineMap = { + {static_cast<__u16>(I915_ENGINE_CLASS_RENDER), ZES_ENGINE_GROUP_RENDER_SINGLE}, + {static_cast<__u16>(I915_ENGINE_CLASS_VIDEO), ZES_ENGINE_GROUP_MEDIA_DECODE_SINGLE}, + {static_cast<__u16>(I915_ENGINE_CLASS_VIDEO), ZES_ENGINE_GROUP_MEDIA_ENCODE_SINGLE}, + {static_cast<__u16>(I915_ENGINE_CLASS_COPY), ZES_ENGINE_GROUP_COPY_SINGLE}, + {static_cast<__u16>(PRELIM_I915_ENGINE_CLASS_COMPUTE), ZES_ENGINE_GROUP_COMPUTE_SINGLE}, + {static_cast<__u16>(I915_ENGINE_CLASS_VIDEO_ENHANCE), ZES_ENGINE_GROUP_MEDIA_ENHANCEMENT_SINGLE}}; + +static const std::multimap engineToI915Map = { + {ZES_ENGINE_GROUP_RENDER_SINGLE, static_cast<__u16>(I915_ENGINE_CLASS_RENDER)}, + {ZES_ENGINE_GROUP_MEDIA_DECODE_SINGLE, static_cast<__u16>(I915_ENGINE_CLASS_VIDEO)}, + {ZES_ENGINE_GROUP_MEDIA_ENCODE_SINGLE, static_cast<__u16>(I915_ENGINE_CLASS_VIDEO)}, + {ZES_ENGINE_GROUP_COPY_SINGLE, static_cast<__u16>(I915_ENGINE_CLASS_COPY)}, + {ZES_ENGINE_GROUP_COMPUTE_SINGLE, static_cast<__u16>(PRELIM_I915_ENGINE_CLASS_COMPUTE)}, + {ZES_ENGINE_GROUP_MEDIA_ENHANCEMENT_SINGLE, static_cast<__u16>(I915_ENGINE_CLASS_VIDEO_ENHANCE)}}; + +zes_engine_group_t LinuxEngineImp::getGroupFromEngineType(zes_engine_group_t type) { + if (type == ZES_ENGINE_GROUP_RENDER_SINGLE) { + return ZES_ENGINE_GROUP_RENDER_ALL; + } + if (type == ZES_ENGINE_GROUP_COMPUTE_SINGLE) { + return ZES_ENGINE_GROUP_COMPUTE_ALL; + } + if (type == ZES_ENGINE_GROUP_COPY_SINGLE) { + return ZES_ENGINE_GROUP_COPY_ALL; + } + if (type == ZES_ENGINE_GROUP_MEDIA_DECODE_SINGLE || type == ZES_ENGINE_GROUP_MEDIA_ENCODE_SINGLE || type == ZES_ENGINE_GROUP_MEDIA_ENHANCEMENT_SINGLE) { + return ZES_ENGINE_GROUP_MEDIA_ALL; + } + return ZES_ENGINE_GROUP_ALL; +} + +ze_result_t OsEngine::getNumEngineTypeAndInstances(std::set> &engineGroupInstance, OsSysman *pOsSysman) { + LinuxSysmanImp *pLinuxSysmanImp = static_cast(pOsSysman); + NEO::Drm *pDrm = &pLinuxSysmanImp->getDrm(); + + if (pDrm->sysmanQueryEngineInfo() == false) { + return ZE_RESULT_ERROR_UNSUPPORTED_FEATURE; + } + auto engineInfo = pDrm->getEngineInfo(); + for (auto itr = engineInfo->engines.begin(); itr != engineInfo->engines.end(); ++itr) { + uint32_t subDeviceId = engineInfo->getEngineTileIndex(itr->engine); + auto i915ToEngineMapRange = i915ToEngineMap.equal_range(static_cast<__u16>(itr->engine.engineClass)); + for (auto L0EngineEntryInMap = i915ToEngineMapRange.first; L0EngineEntryInMap != i915ToEngineMapRange.second; L0EngineEntryInMap++) { + auto L0EngineType = L0EngineEntryInMap->second; + engineGroupInstance.insert({L0EngineType, {static_cast(itr->engine.engineInstance), subDeviceId}}); + engineGroupInstance.insert({LinuxEngineImp::getGroupFromEngineType(L0EngineType), {0u, subDeviceId}}); + engineGroupInstance.insert({ZES_ENGINE_GROUP_ALL, {0u, subDeviceId}}); + } + } + return ZE_RESULT_SUCCESS; +} + +ze_result_t LinuxEngineImp::getActivity(zes_engine_stats_t *pStats) { + if (fd < 0) { + return ZE_RESULT_ERROR_UNSUPPORTED_FEATURE; + } + uint64_t data[2] = {}; + if (pPmuInterface->pmuRead(static_cast(fd), data, sizeof(data)) < 0) { + return ZE_RESULT_ERROR_UNSUPPORTED_FEATURE; + } + // In data[], First u64 is "active time", And second u64 is "timestamp". Both in nanoseconds + pStats->activeTime = data[0] / microSecondsToNanoSeconds; + pStats->timestamp = data[1] / microSecondsToNanoSeconds; + return ZE_RESULT_SUCCESS; +} + +ze_result_t LinuxEngineImp::getProperties(zes_engine_properties_t &properties) { + properties.subdeviceId = subDeviceId; + properties.onSubdevice = onSubDevice; + properties.type = engineGroup; + return ZE_RESULT_SUCCESS; +} + +void LinuxEngineImp::init() { + uint32_t subDeviceCount = 0; + pDevice->getSubDevices(&subDeviceCount, nullptr); + onSubDevice = (subDeviceCount == 0) ? 0 : 1; + uint64_t config = UINT64_MAX; + switch (engineGroup) { + case ZES_ENGINE_GROUP_ALL: + config = __PRELIM_I915_PMU_ANY_ENGINE_GROUP_BUSY(subDeviceId); + break; + case ZES_ENGINE_GROUP_COMPUTE_ALL: + case ZES_ENGINE_GROUP_RENDER_ALL: + config = __PRELIM_I915_PMU_RENDER_GROUP_BUSY(subDeviceId); + break; + case ZES_ENGINE_GROUP_COPY_ALL: + config = __PRELIM_I915_PMU_COPY_GROUP_BUSY(subDeviceId); + break; + case ZES_ENGINE_GROUP_MEDIA_ALL: + config = __PRELIM_I915_PMU_MEDIA_GROUP_BUSY(subDeviceId); + break; + default: + auto i915EngineClass = engineToI915Map.find(engineGroup); + config = I915_PMU_ENGINE_BUSY(i915EngineClass->second, engineInstance); + break; + } + fd = pPmuInterface->pmuInterfaceOpen(config, -1, PERF_FORMAT_TOTAL_TIME_ENABLED); +} + +LinuxEngineImp::LinuxEngineImp(OsSysman *pOsSysman, zes_engine_group_t type, uint32_t engineInstance, uint32_t subDeviceId) : engineGroup(type), engineInstance(engineInstance), subDeviceId(subDeviceId) { + LinuxSysmanImp *pLinuxSysmanImp = static_cast(pOsSysman); + pDrm = &pLinuxSysmanImp->getDrm(); + pDevice = pLinuxSysmanImp->getDeviceHandle(); + pPmuInterface = pLinuxSysmanImp->getPmuInterface(); + init(); +} + +OsEngine *OsEngine::create(OsSysman *pOsSysman, zes_engine_group_t type, uint32_t engineInstance, uint32_t subDeviceId) { + LinuxEngineImp *pLinuxEngineImp = new LinuxEngineImp(pOsSysman, type, engineInstance, subDeviceId); + return static_cast(pLinuxEngineImp); +} + +} // namespace L0 diff --git a/level_zero/tools/source/sysman/memory/linux/CMakeLists.txt b/level_zero/tools/source/sysman/memory/linux/CMakeLists.txt index 377c1f6133..ad181e89fb 100755 --- a/level_zero/tools/source/sysman/memory/linux/CMakeLists.txt +++ b/level_zero/tools/source/sysman/memory/linux/CMakeLists.txt @@ -1,5 +1,5 @@ # -# Copyright (C) 2020-2021 Intel Corporation +# Copyright (C) 2020-2022 Intel Corporation # # SPDX-License-Identifier: MIT # @@ -8,15 +8,20 @@ set(L0_SRCS_TOOLS_SYSMAN_MEMORY_LINUX ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt ) -if(SUPPORT_DG1 AND "${BRANCH_TYPE}" STREQUAL "") +if(NEO_ENABLE_i915_PRELIM_DETECTION) + list(APPEND L0_SRCS_TOOLS_SYSMAN_MEMORY_LINUX + ${CMAKE_CURRENT_SOURCE_DIR}/os_memory_imp_prelim.cpp + ${CMAKE_CURRENT_SOURCE_DIR}/os_memory_imp_prelim.h + ) +elseif(SUPPORT_DG1 AND "${BRANCH_TYPE}" STREQUAL "") list(APPEND L0_SRCS_TOOLS_SYSMAN_MEMORY_LINUX ${CMAKE_CURRENT_SOURCE_DIR}/os_memory_imp.h ${CMAKE_CURRENT_SOURCE_DIR}/os_memory_imp_dg1.cpp ) else() list(APPEND L0_SRCS_TOOLS_SYSMAN_MEMORY_LINUX - ${CMAKE_CURRENT_SOURCE_DIR}${BRANCH_DIR_SUFFIX}os_memory_imp.h - ${CMAKE_CURRENT_SOURCE_DIR}${BRANCH_DIR_SUFFIX}os_memory_imp.cpp + ${CMAKE_CURRENT_SOURCE_DIR}/os_memory_imp.h + ${CMAKE_CURRENT_SOURCE_DIR}/os_memory_imp.cpp ) endif() diff --git a/level_zero/tools/source/sysman/memory/linux/os_memory_imp_prelim.cpp b/level_zero/tools/source/sysman/memory/linux/os_memory_imp_prelim.cpp new file mode 100644 index 0000000000..8e171d9cf3 --- /dev/null +++ b/level_zero/tools/source/sysman/memory/linux/os_memory_imp_prelim.cpp @@ -0,0 +1,251 @@ +/* + * Copyright (C) 2022 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#include "level_zero/tools/source/sysman/memory/linux/os_memory_imp_prelim.h" + +#include "shared/source/os_interface/linux/system_info.h" + +#include "level_zero/tools/source/sysman/sysman_const.h" + +#include "drm/intel_hwconfig_types.h" +#include "igfxfmid.h" +#include "sysman/linux/os_sysman_imp.h" + +namespace L0 { + +const std::string LinuxMemoryImp::deviceMemoryHealth("device_memory_health"); + +void LinuxMemoryImp::init() { + if (isSubdevice) { + const std::string baseDir = "gt/gt" + std::to_string(subdeviceId) + "/"; + physicalSizeFile = baseDir + "addr_range"; + } +} + +LinuxMemoryImp::LinuxMemoryImp(OsSysman *pOsSysman, ze_bool_t onSubdevice, uint32_t subdeviceId) : isSubdevice(onSubdevice), subdeviceId(subdeviceId) { + LinuxSysmanImp *pLinuxSysmanImp = static_cast(pOsSysman); + pDrm = &pLinuxSysmanImp->getDrm(); + pDevice = pLinuxSysmanImp->getDeviceHandle(); + pSysfsAccess = &pLinuxSysmanImp->getSysfsAccess(); + pPmt = pLinuxSysmanImp->getPlatformMonitoringTechAccess(subdeviceId); + init(); +} + +bool LinuxMemoryImp::isMemoryModuleSupported() { + return pDevice->getDriverHandle()->getMemoryManager()->isLocalMemorySupported(pDevice->getRootDeviceIndex()); +} + +ze_result_t LinuxMemoryImp::getProperties(zes_mem_properties_t *pProperties) { + pProperties->type = ZES_MEM_TYPE_DDR; + pProperties->numChannels = -1; + if (pDrm->querySystemInfo()) { + auto memSystemInfo = pDrm->getSystemInfo(); + if (memSystemInfo != nullptr) { + pProperties->numChannels = memSystemInfo->getMaxMemoryChannels(); + auto memType = memSystemInfo->getMemoryType(); + switch (memType) { + case INTEL_HWCONFIG_MEMORY_TYPE_HBM2e: + case INTEL_HWCONFIG_MEMORY_TYPE_HBM2: + pProperties->type = ZES_MEM_TYPE_HBM; + break; + case INTEL_HWCONFIG_MEMORY_TYPE_LPDDR4: + pProperties->type = ZES_MEM_TYPE_LPDDR4; + break; + case INTEL_HWCONFIG_MEMORY_TYPE_LPDDR5: + pProperties->type = ZES_MEM_TYPE_LPDDR5; + break; + default: + pProperties->type = ZES_MEM_TYPE_DDR; + break; + } + } + } + pProperties->location = ZES_MEM_LOC_DEVICE; + pProperties->onSubdevice = isSubdevice; + pProperties->subdeviceId = subdeviceId; + pProperties->busWidth = memoryBusWidth; // Hardcode + + pProperties->physicalSize = 0; + if (isSubdevice) { + std::string memval; + ze_result_t result = pSysfsAccess->read(physicalSizeFile, memval); + uint64_t intval = strtoull(memval.c_str(), nullptr, 16); + if (ZE_RESULT_SUCCESS != result) { + pProperties->physicalSize = 0u; + } else { + pProperties->physicalSize = intval; + } + } + + return ZE_RESULT_SUCCESS; +} + +ze_result_t LinuxMemoryImp::getVFIDString(std::string &vfID) { + uint32_t vf0VfIdVal = 0; + std::string key = "VF0_VFID"; + auto result = pPmt->readValue(key, vf0VfIdVal); + if (result != ZE_RESULT_SUCCESS) { + return result; + } + + uint32_t vf1VfIdVal = 0; + key = "VF1_VFID"; + result = pPmt->readValue(key, vf1VfIdVal); + if (result != ZE_RESULT_SUCCESS) { + return result; + } + + // At any point of time only one VF(virtual function) could be active and thus would + // read greater than zero val. If both VF0 and VF1 are reading 0 or both are reading + // greater than 0, then we would be confused in taking the decision of correct VF. + // Lets assume and report this as a error condition + if (((vf0VfIdVal == 0) && (vf1VfIdVal == 0)) || + ((vf0VfIdVal > 0) && (vf1VfIdVal > 0))) { + return ZE_RESULT_ERROR_UNKNOWN; + } + + if (vf0VfIdVal > 0) { + vfID = "VF0"; + } + if (vf1VfIdVal > 0) { + vfID = "VF1"; + } + return result; +} + +void LinuxMemoryImp::getHbmFrequency(PRODUCT_FAMILY productFamily, unsigned short stepping, uint64_t &hbmFrequency) { + hbmFrequency = 0; + if (productFamily == IGFX_XE_HP_SDV) { + // For IGFX_XE_HP HBM frequency would be 2.8 GT/s = 2.8 * 1000 * 1000 * 1000 T/s = 2800000000 T/s + hbmFrequency = 2.8 * gigaUnitTransferToUnitTransfer; + } else if (productFamily == IGFX_PVC) { + if (stepping == REVISION_B) { + const std::string baseDir = "gt/gt" + std::to_string(subdeviceId) + "/"; + // Calculating bandwidth based on HBM max frequency + const std::string hbmRP0FreqFile = baseDir + "hbm_RP0_freq_mhz"; + uint64_t hbmFreqValue = 0; + ze_result_t result = pSysfsAccess->read(hbmRP0FreqFile, hbmFreqValue); + if (ZE_RESULT_SUCCESS == result) { + hbmFrequency = hbmFreqValue * 1000 * 1000; // Converting MHz value to Hz + return; + } + } else if (stepping == REVISION_A0) { + // For IGFX_PVC REV A0 HBM frequency would be 3.2 GT/s = 3.2 * 1000 * 1000 * 1000 T/s = 3200000000 T/s + hbmFrequency = 3.2 * gigaUnitTransferToUnitTransfer; + } + } +} + +ze_result_t LinuxMemoryImp::getBandwidth(zes_mem_bandwidth_t *pBandwidth) { + if (pPmt == nullptr) { + return ZE_RESULT_ERROR_UNSUPPORTED_FEATURE; + } + std::string vfId = ""; + auto result = getVFIDString(vfId); + if (result != ZE_RESULT_SUCCESS) { + return result; + } + uint32_t numHbmModules = 0u; + auto &hwInfo = pDevice->getNEODevice()->getHardwareInfo(); + auto productFamily = hwInfo.platform.eProductFamily; + auto stepping = NEO::HwInfoConfig::get(productFamily)->getSteppingFromHwRevId(hwInfo); + if (productFamily == IGFX_XE_HP_SDV) { + numHbmModules = 2u; + } else if (productFamily == IGFX_PVC) { + numHbmModules = 4u; + } + + pBandwidth->readCounter = 0; + pBandwidth->writeCounter = 0; + pBandwidth->timestamp = 0; + pBandwidth->maxBandwidth = 0; + for (auto hbmModuleIndex = 0u; hbmModuleIndex < numHbmModules; hbmModuleIndex++) { + uint32_t counterValue = 0; + // To read counters from VFID 0 and HBM module 0, key would be: VF0_HBM0_READ + std::string readCounterKey = vfId + "_HBM" + std::to_string(hbmModuleIndex) + "_READ"; + result = pPmt->readValue(readCounterKey, counterValue); + if (result != ZE_RESULT_SUCCESS) { + return result; + } + pBandwidth->readCounter += counterValue; + + counterValue = 0; + // To write counters to VFID 0 and HBM module 0, key would be: VF0_HBM0_Write + std::string writeCounterKey = vfId + "_HBM" + std::to_string(hbmModuleIndex) + "_WRITE"; + result = pPmt->readValue(writeCounterKey, counterValue); + if (result != ZE_RESULT_SUCCESS) { + return result; + } + pBandwidth->writeCounter += counterValue; + } + + uint32_t timeStampL = 0; + std::string timeStamp = vfId + "_TIMESTAMP_L"; + result = pPmt->readValue(timeStamp, timeStampL); + if (result != ZE_RESULT_SUCCESS) { + return result; + } + + uint32_t timeStampH = 0; + timeStamp = vfId + "_TIMESTAMP_H"; + result = pPmt->readValue(timeStamp, timeStampH); + if (result != ZE_RESULT_SUCCESS) { + return result; + } + pBandwidth->timestamp |= timeStampH; + pBandwidth->timestamp = (pBandwidth->timestamp << 32) | timeStampL; + + uint64_t hbmFrequency = 0; + getHbmFrequency(productFamily, stepping, hbmFrequency); + + pBandwidth->maxBandwidth = memoryBusWidth * hbmFrequency * numHbmModules; + pBandwidth->maxBandwidth /= 8; // Divide by 8 to get bandwidth in bytes/sec + + return result; +} + +ze_result_t LinuxMemoryImp::getState(zes_mem_state_t *pState) { + std::string memHealth; + ze_result_t result = pSysfsAccess->read(deviceMemoryHealth, memHealth); + if (ZE_RESULT_SUCCESS != result) { + pState->health = ZES_MEM_HEALTH_UNKNOWN; + } else { + auto health = i915ToL0MemHealth.find(memHealth); + if (health == i915ToL0MemHealth.end()) { + pState->health = ZES_MEM_HEALTH_UNKNOWN; + } else { + pState->health = i915ToL0MemHealth.at(memHealth); + } + } + + auto memRegions = pDrm->getMemoryRegions(); + if (memRegions.empty()) { + return ZE_RESULT_ERROR_UNSUPPORTED_FEATURE; + } + prelim_drm_i915_query_memory_regions *data = reinterpret_cast(memRegions.data()); + + std::vector deviceRegions; + for (uint32_t regionIndex = 0; regionIndex < data->num_regions; regionIndex++) { + if (data->regions[regionIndex].region.memory_class == PRELIM_I915_MEMORY_CLASS_DEVICE) { + deviceRegions.push_back(data->regions[regionIndex]); + } + } + + UNRECOVERABLE_IF(deviceRegions.size() <= subdeviceId); + + pState->free = deviceRegions[subdeviceId].unallocated_size; + pState->size = deviceRegions[subdeviceId].probed_size; + + return ZE_RESULT_SUCCESS; +} + +OsMemory *OsMemory::create(OsSysman *pOsSysman, ze_bool_t onSubdevice, uint32_t subdeviceId) { + LinuxMemoryImp *pLinuxMemoryImp = new LinuxMemoryImp(pOsSysman, onSubdevice, subdeviceId); + return static_cast(pLinuxMemoryImp); +} + +} // namespace L0 diff --git a/level_zero/tools/source/sysman/memory/linux/os_memory_imp_prelim.h b/level_zero/tools/source/sysman/memory/linux/os_memory_imp_prelim.h new file mode 100644 index 0000000000..3528b2ee0e --- /dev/null +++ b/level_zero/tools/source/sysman/memory/linux/os_memory_imp_prelim.h @@ -0,0 +1,61 @@ +/* + * Copyright (C) 2022 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#pragma once +#include "shared/source/helpers/non_copyable_or_moveable.h" +#include "shared/source/os_interface/linux/drm_neo.h" + +#include "sysman/memory/os_memory.h" + +#include + +namespace L0 { + +class SysfsAccess; +struct Device; +class PlatformMonitoringTech; +class LinuxMemoryImp : public OsMemory, NEO::NonCopyableOrMovableClass { + public: + ze_result_t getProperties(zes_mem_properties_t *pProperties) override; + ze_result_t getBandwidth(zes_mem_bandwidth_t *pBandwidth) override; + ze_result_t getState(zes_mem_state_t *pState) override; + bool isMemoryModuleSupported() override; + LinuxMemoryImp(OsSysman *pOsSysman, ze_bool_t onSubdevice, uint32_t subdeviceId); + LinuxMemoryImp() = default; + ~LinuxMemoryImp() override = default; + + protected: + SysfsAccess *pSysfsAccess = nullptr; + NEO::Drm *pDrm = nullptr; + Device *pDevice = nullptr; + PlatformMonitoringTech *pPmt = nullptr; + void getHbmFrequency(PRODUCT_FAMILY productFamily, unsigned short stepping, uint64_t &hbmFrequency); + + private: + ze_result_t getVFIDString(std::string &vfID); + static const std::string deviceMemoryHealth; + bool isSubdevice = false; + uint32_t subdeviceId = 0; + std::string physicalSizeFile; + void init(); +}; + +// Mapping of i915 memory health to L0 health params +// OK status for No error, no HBM memory sparing, default value +// REBOOT_ALARM status for Hardware warning interrupt received and uevent has been sent, and system should be rebooted ASAP +// EC_FAILED sysfs status for Error correction failed: user did not reboot, and the uncorrectable errors happened +// DEGRADED sysfs status for System has been rebooted and memory sparing is in action, detectable at boot time +// DEGRADED_FAILED sysfs status for Upon receival of the final interrupt that uncorrectable errors happened when memory was already in sparing mode + +const std::map i915ToL0MemHealth{ + {"OK", ZES_MEM_HEALTH_OK}, + {"REBOOT_ALARM", ZES_MEM_HEALTH_DEGRADED}, + {"DEGRADED", ZES_MEM_HEALTH_CRITICAL}, + {"DEGRADED_FAILED", ZES_MEM_HEALTH_REPLACE}, + {"EC_FAILED", ZES_MEM_HEALTH_REPLACE}}; + +} // namespace L0 diff --git a/level_zero/tools/source/sysman/scheduler/linux/CMakeLists.txt b/level_zero/tools/source/sysman/scheduler/linux/CMakeLists.txt index 22dd8ef6dc..455dba0c7c 100644 --- a/level_zero/tools/source/sysman/scheduler/linux/CMakeLists.txt +++ b/level_zero/tools/source/sysman/scheduler/linux/CMakeLists.txt @@ -1,15 +1,24 @@ # -# Copyright (C) 2020-2021 Intel Corporation +# Copyright (C) 2020-2022 Intel Corporation # # SPDX-License-Identifier: MIT # set(L0_SRCS_TOOLS_SYSMAN_SCHEDULER_LINUX ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt - ${CMAKE_CURRENT_SOURCE_DIR}${BRANCH_DIR_SUFFIX}os_scheduler_imp.cpp ${CMAKE_CURRENT_SOURCE_DIR}/os_scheduler_imp.h ) +if(NEO_ENABLE_i915_PRELIM_DETECTION) + list(APPEND L0_SRCS_TOOLS_SYSMAN_SCHEDULER_LINUX + ${CMAKE_CURRENT_SOURCE_DIR}/os_scheduler_imp_prelim.cpp + ) +else() + list(APPEND L0_SRCS_TOOLS_SYSMAN_SCHEDULER_LINUX + ${CMAKE_CURRENT_SOURCE_DIR}/os_scheduler_imp.cpp + ) +endif() + if(UNIX) target_sources(${L0_STATIC_LIB_NAME} PRIVATE diff --git a/level_zero/tools/source/sysman/scheduler/linux/os_scheduler_imp_prelim.cpp b/level_zero/tools/source/sysman/scheduler/linux/os_scheduler_imp_prelim.cpp new file mode 100644 index 0000000000..994110ad58 --- /dev/null +++ b/level_zero/tools/source/sysman/scheduler/linux/os_scheduler_imp_prelim.cpp @@ -0,0 +1,295 @@ +/* + * Copyright (C) 2022 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#include "shared/source/os_interface/linux/engine_info.h" + +#include "level_zero/tools/source/sysman/scheduler/linux/os_scheduler_imp.h" + +#include "sysman/linux/os_sysman_imp.h" + +namespace L0 { + +const std::string LinuxSchedulerImp::preemptTimeoutMilliSecs("preempt_timeout_ms"); +const std::string LinuxSchedulerImp::defaultPreemptTimeouttMilliSecs(".defaults/preempt_timeout_ms"); +const std::string LinuxSchedulerImp::timesliceDurationMilliSecs("timeslice_duration_ms"); +const std::string LinuxSchedulerImp::defaultTimesliceDurationMilliSecs(".defaults/timeslice_duration_ms"); +const std::string LinuxSchedulerImp::heartbeatIntervalMilliSecs("heartbeat_interval_ms"); +const std::string LinuxSchedulerImp::defaultHeartbeatIntervalMilliSecs(".defaults/heartbeat_interval_ms"); +const std::string LinuxSchedulerImp::engineDir("engine"); +constexpr uint16_t milliSecsToMicroSecs = 1000; + +static const std::map<__u16, std::string> i915EngineClassToSysfsEngineMap = { + {I915_ENGINE_CLASS_RENDER, "rcs"}, + {static_cast<__u16>(I915_ENGINE_CLASS_COMPUTE), "ccs"}, + {I915_ENGINE_CLASS_COPY, "bcs"}, + {I915_ENGINE_CLASS_VIDEO, "vcs"}, + {I915_ENGINE_CLASS_VIDEO_ENHANCE, "vecs"}}; + +static const std::map sysfsEngineMapToLevel0EngineType = { + {"rcs", ZES_ENGINE_TYPE_FLAG_RENDER}, + {"ccs", ZES_ENGINE_TYPE_FLAG_COMPUTE}, + {"bcs", ZES_ENGINE_TYPE_FLAG_DMA}, + {"vcs", ZES_ENGINE_TYPE_FLAG_MEDIA}, + {"vecs", ZES_ENGINE_TYPE_FLAG_OTHER}}; + +static const std::multimap level0EngineTypeToSysfsEngineMap = { + {ZES_ENGINE_TYPE_FLAG_RENDER, "rcs"}, + {ZES_ENGINE_TYPE_FLAG_COMPUTE, "ccs"}, + {ZES_ENGINE_TYPE_FLAG_DMA, "bcs"}, + {ZES_ENGINE_TYPE_FLAG_MEDIA, "vcs"}, + {ZES_ENGINE_TYPE_FLAG_OTHER, "vecs"}}; + +static const std::map sysfsEngineMapToi915EngineClass = { + {"rcs", I915_ENGINE_CLASS_RENDER}, + {"ccs", static_cast<__u16>(I915_ENGINE_CLASS_COMPUTE)}, + {"bcs", I915_ENGINE_CLASS_COPY}, + {"vcs", I915_ENGINE_CLASS_VIDEO}, + {"vecs", I915_ENGINE_CLASS_VIDEO_ENHANCE}}; + +ze_result_t LinuxSchedulerImp::getProperties(zes_sched_properties_t &schedProperties) { + schedProperties.onSubdevice = onSubdevice; + schedProperties.subdeviceId = subdeviceId; + schedProperties.canControl = canControlScheduler(); + schedProperties.engines = this->engineType; + schedProperties.supportedModes = (1 << ZES_SCHED_MODE_TIMEOUT) | (1 << ZES_SCHED_MODE_TIMESLICE) | (1 << ZES_SCHED_MODE_EXCLUSIVE); + return ZE_RESULT_SUCCESS; +} + +ze_result_t LinuxSchedulerImp::getPreemptTimeout(uint64_t &timeout, ze_bool_t getDefault) { + ze_result_t result = ZE_RESULT_ERROR_UNKNOWN; + uint32_t i = 0; + std::vector timeoutVec = {}; + timeoutVec.resize(listOfEngines.size()); + for (const auto &engineName : listOfEngines) { + if (getDefault) { + result = pSysfsAccess->read(engineDir + "/" + engineName + "/" + defaultPreemptTimeouttMilliSecs, timeout); + } else { + result = pSysfsAccess->read(engineDir + "/" + engineName + "/" + preemptTimeoutMilliSecs, timeout); + } + if (result == ZE_RESULT_SUCCESS) { + timeout = timeout * milliSecsToMicroSecs; + timeoutVec[i] = timeout; + i++; + } else { + if (result == ZE_RESULT_ERROR_NOT_AVAILABLE) { + result = ZE_RESULT_ERROR_UNSUPPORTED_FEATURE; + } + return result; + } + } + + if (engineType == ZES_ENGINE_TYPE_FLAG_COMPUTE) { + timeout = *std::max_element(timeoutVec.begin(), timeoutVec.end()); + return result; + } + + // check if all engines of the same type have the same scheduling param values + if (std::adjacent_find(timeoutVec.begin(), timeoutVec.end(), std::not_equal_to<>()) == timeoutVec.end()) { + timeout = timeoutVec[0]; + return result; + } else { + return ZE_RESULT_ERROR_UNKNOWN; + } +} + +ze_result_t LinuxSchedulerImp::getTimesliceDuration(uint64_t ×lice, ze_bool_t getDefault) { + ze_result_t result = ZE_RESULT_ERROR_UNKNOWN; + uint32_t i = 0; + std::vector timesliceVec = {}; + timesliceVec.resize(listOfEngines.size()); + for (const auto &engineName : listOfEngines) { + if (getDefault) { + result = pSysfsAccess->read(engineDir + "/" + engineName + "/" + defaultTimesliceDurationMilliSecs, timeslice); + } else { + result = pSysfsAccess->read(engineDir + "/" + engineName + "/" + timesliceDurationMilliSecs, timeslice); + } + if (result == ZE_RESULT_SUCCESS) { + timeslice = timeslice * milliSecsToMicroSecs; + timesliceVec[i] = timeslice; + i++; + } else { + if (result == ZE_RESULT_ERROR_NOT_AVAILABLE) { + result = ZE_RESULT_ERROR_UNSUPPORTED_FEATURE; + } + return result; + } + } + // check if all engines of the same type have the same scheduling param values + if (std::adjacent_find(timesliceVec.begin(), timesliceVec.end(), std::not_equal_to<>()) == timesliceVec.end()) { + timeslice = timesliceVec[0]; + return result; + } else { + return ZE_RESULT_ERROR_UNKNOWN; + } +} + +ze_result_t LinuxSchedulerImp::getHeartbeatInterval(uint64_t &heartbeat, ze_bool_t getDefault) { + ze_result_t result = ZE_RESULT_ERROR_UNKNOWN; + uint32_t i = 0; + std::vector heartbeatVec = {}; + heartbeatVec.resize(listOfEngines.size()); + for (const auto &engineName : listOfEngines) { + if (getDefault) { + result = pSysfsAccess->read(engineDir + "/" + engineName + "/" + defaultHeartbeatIntervalMilliSecs, heartbeat); + } else { + result = pSysfsAccess->read(engineDir + "/" + engineName + "/" + heartbeatIntervalMilliSecs, heartbeat); + } + if (result == ZE_RESULT_SUCCESS) { + heartbeat = heartbeat * milliSecsToMicroSecs; + heartbeatVec[i] = heartbeat; + i++; + } else { + if (result == ZE_RESULT_ERROR_NOT_AVAILABLE) { + result = ZE_RESULT_ERROR_UNSUPPORTED_FEATURE; + } + return result; + } + } + // check if all engines of the same type have the same scheduling param values + if (std::adjacent_find(heartbeatVec.begin(), heartbeatVec.end(), std::not_equal_to<>()) == heartbeatVec.end()) { + heartbeat = heartbeatVec[0]; + return result; + } else { + return ZE_RESULT_ERROR_UNKNOWN; + } +} + +ze_result_t LinuxSchedulerImp::setPreemptTimeout(uint64_t timeout) { + timeout = timeout / milliSecsToMicroSecs; + ze_result_t result = ZE_RESULT_ERROR_UNKNOWN; + for (const auto &engineName : listOfEngines) { + result = pSysfsAccess->write(engineDir + "/" + engineName + "/" + preemptTimeoutMilliSecs, timeout); + if (result != ZE_RESULT_SUCCESS) { + if (result == ZE_RESULT_ERROR_NOT_AVAILABLE) { + result = ZE_RESULT_ERROR_UNSUPPORTED_FEATURE; + } + return result; + } + } + return result; +} + +ze_result_t LinuxSchedulerImp::setTimesliceDuration(uint64_t timeslice) { + timeslice = timeslice / milliSecsToMicroSecs; + ze_result_t result = ZE_RESULT_ERROR_UNKNOWN; + for (const auto &engineName : listOfEngines) { + result = pSysfsAccess->write(engineDir + "/" + engineName + "/" + timesliceDurationMilliSecs, timeslice); + if (result != ZE_RESULT_SUCCESS) { + if (result == ZE_RESULT_ERROR_NOT_AVAILABLE) { + result = ZE_RESULT_ERROR_UNSUPPORTED_FEATURE; + } + return result; + } + } + return result; +} + +ze_result_t LinuxSchedulerImp::setHeartbeatInterval(uint64_t heartbeat) { + heartbeat = heartbeat / milliSecsToMicroSecs; + ze_result_t result = ZE_RESULT_ERROR_UNKNOWN; + for (const auto &engineName : listOfEngines) { + result = pSysfsAccess->write(engineDir + "/" + engineName + "/" + heartbeatIntervalMilliSecs, heartbeat); + if (result != ZE_RESULT_SUCCESS) { + if (result == ZE_RESULT_ERROR_NOT_AVAILABLE) { + result = ZE_RESULT_ERROR_UNSUPPORTED_FEATURE; + } + return result; + } + } + return result; +} + +ze_bool_t LinuxSchedulerImp::canControlScheduler() { + return 1; +} + +static ze_result_t getNumEngineTypeAndInstancesForSubDevices(std::map> &mapOfEngines, + NEO::Drm *pDrm, uint32_t subdeviceId) { + auto engineInfo = pDrm->getEngineInfo(); + if (engineInfo == nullptr) { + return ZE_RESULT_ERROR_UNSUPPORTED_FEATURE; + } + std::vector listOfEngines; + engineInfo->getListOfEnginesOnATile(subdeviceId, listOfEngines); + for (const auto &engine : listOfEngines) { + auto sysfEngineString = i915EngineClassToSysfsEngineMap.find(static_cast(engine.engineClass)); + if (sysfEngineString == i915EngineClassToSysfsEngineMap.end()) { + continue; + } + + std::string sysfsEngineDirNode = sysfEngineString->second + std::to_string(engine.engineInstance); + auto level0EngineType = sysfsEngineMapToLevel0EngineType.find(sysfEngineString->second); + auto ret = mapOfEngines.find(level0EngineType->second); + if (ret != mapOfEngines.end()) { + ret->second.push_back(sysfsEngineDirNode); + } else { + std::vector engineVec = {}; + engineVec.push_back(sysfsEngineDirNode); + mapOfEngines.emplace(level0EngineType->second, engineVec); + } + } + return ZE_RESULT_SUCCESS; +} + +static ze_result_t getNumEngineTypeAndInstancesForDevice(std::map> &mapOfEngines, SysfsAccess *pSysfsAccess) { + std::vector localListOfAllEngines = {}; + auto result = pSysfsAccess->scanDirEntries(LinuxSchedulerImp::engineDir, localListOfAllEngines); + if (ZE_RESULT_SUCCESS != result) { + if (result == ZE_RESULT_ERROR_NOT_AVAILABLE) { + result = ZE_RESULT_ERROR_UNSUPPORTED_FEATURE; + } + return result; + } + for_each(localListOfAllEngines.begin(), localListOfAllEngines.end(), + [&](std::string &mappedEngine) { + for (auto itr = level0EngineTypeToSysfsEngineMap.begin(); itr != level0EngineTypeToSysfsEngineMap.end(); itr++) { + char digits[] = "0123456789"; + auto mappedEngineName = mappedEngine.substr(0, mappedEngine.find_first_of(digits, 0)); + if (0 == mappedEngineName.compare(itr->second.c_str())) { + auto ret = mapOfEngines.find(itr->first); + if (ret != mapOfEngines.end()) { + ret->second.push_back(mappedEngine); + } else { + std::vector engineVec = {}; + engineVec.push_back(mappedEngine); + mapOfEngines.emplace(itr->first, engineVec); + } + } + } + }); + return result; +} + +ze_result_t OsScheduler::getNumEngineTypeAndInstances( + std::map> &mapOfEngines, OsSysman *pOsSysman, ze_device_handle_t subdeviceHandle) { + LinuxSysmanImp *pLinuxSysmanImp = static_cast(pOsSysman); + auto pDrm = &pLinuxSysmanImp->getDrm(); + auto pSysfsAccess = &pLinuxSysmanImp->getSysfsAccess(); + ze_device_properties_t deviceProperties = {}; + Device::fromHandle(subdeviceHandle)->getProperties(&deviceProperties); + if (deviceProperties.flags & ZE_DEVICE_PROPERTY_FLAG_SUBDEVICE) { + return getNumEngineTypeAndInstancesForSubDevices(mapOfEngines, pDrm, deviceProperties.subdeviceId); + } + + return getNumEngineTypeAndInstancesForDevice(mapOfEngines, pSysfsAccess); +} + +LinuxSchedulerImp::LinuxSchedulerImp( + OsSysman *pOsSysman, zes_engine_type_flag_t type, std::vector &listOfEngines, ze_bool_t isSubdevice, + uint32_t subdeviceId) : engineType(type), onSubdevice(isSubdevice), subdeviceId(subdeviceId) { + LinuxSysmanImp *pLinuxSysmanImp = static_cast(pOsSysman); + pSysfsAccess = &pLinuxSysmanImp->getSysfsAccess(); + this->listOfEngines = listOfEngines; +} + +OsScheduler *OsScheduler::create( + OsSysman *pOsSysman, zes_engine_type_flag_t type, std::vector &listOfEngines, ze_bool_t isSubdevice, uint32_t subdeviceId) { + LinuxSchedulerImp *pLinuxSchedulerImp = new LinuxSchedulerImp(pOsSysman, type, listOfEngines, isSubdevice, subdeviceId); + return static_cast(pLinuxSchedulerImp); +} + +} // namespace L0 diff --git a/level_zero/tools/test/unit_tests/sources/sysman/engine/linux/CMakeLists.txt b/level_zero/tools/test/unit_tests/sources/sysman/engine/linux/CMakeLists.txt index f2a2aad4f9..4dca7aa73f 100644 --- a/level_zero/tools/test/unit_tests/sources/sysman/engine/linux/CMakeLists.txt +++ b/level_zero/tools/test/unit_tests/sources/sysman/engine/linux/CMakeLists.txt @@ -1,15 +1,25 @@ # -# Copyright (C) 2020-2021 Intel Corporation +# Copyright (C) 2020-2022 Intel Corporation # # SPDX-License-Identifier: MIT # -if(UNIX) - target_sources(${TARGET_NAME} - PRIVATE - ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt - ${CMAKE_CURRENT_SOURCE_DIR}${BRANCH_DIR_SUFFIX}test_zes_engine.cpp - ${CMAKE_CURRENT_SOURCE_DIR}${BRANCH_DIR_SUFFIX}mock_engine.h +set(L0_TESTS_TOOLS_SYSMAN_ENGINE_LINUX + ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt + ${CMAKE_CURRENT_SOURCE_DIR}${BRANCH_DIR_SUFFIX}test_zes_engine.cpp + ${CMAKE_CURRENT_SOURCE_DIR}${BRANCH_DIR_SUFFIX}mock_engine.h +) + +if((NEO_ENABLE_i915_PRELIM_DETECTION) AND ("${BRANCH_TYPE}" STREQUAL "")) + list(REMOVE_ITEM L0_TESTS_TOOLS_SYSMAN_ENGINE_LINUX + ${CMAKE_CURRENT_SOURCE_DIR}/test_zes_engine.cpp + ${CMAKE_CURRENT_SOURCE_DIR}/mock_engine.h ) endif() +if(UNIX) + target_sources(${TARGET_NAME} + PRIVATE + ${L0_TESTS_TOOLS_SYSMAN_ENGINE_LINUX} + ) +endif() diff --git a/level_zero/tools/test/unit_tests/sources/sysman/memory/linux/CMakeLists.txt b/level_zero/tools/test/unit_tests/sources/sysman/memory/linux/CMakeLists.txt index eb2793dedd..94fdc3d5ad 100644 --- a/level_zero/tools/test/unit_tests/sources/sysman/memory/linux/CMakeLists.txt +++ b/level_zero/tools/test/unit_tests/sources/sysman/memory/linux/CMakeLists.txt @@ -1,5 +1,5 @@ # -# Copyright (C) 2020-2021 Intel Corporation +# Copyright (C) 2020-2022 Intel Corporation # # SPDX-License-Identifier: MIT # @@ -20,6 +20,20 @@ else() ) endif() +if((NEO_ENABLE_i915_PRELIM_DETECTION) AND ("${BRANCH_TYPE}" STREQUAL "")) + if(SUPPORT_DG1) + list(REMOVE_ITEM L0_TESTS_TOOLS_SYSMAN_MEMORY_LINUX + ${CMAKE_CURRENT_SOURCE_DIR}/test_sysman_memory_dg1.cpp + ${CMAKE_CURRENT_SOURCE_DIR}/mock_memory.h + ) + else() + list(REMOVE_ITEM L0_TESTS_TOOLS_SYSMAN_MEMORY_LINUX + ${CMAKE_CURRENT_SOURCE_DIR}/test_sysman_memory.cpp + ${CMAKE_CURRENT_SOURCE_DIR}/mock_memory.h + ) + endif() +endif() + if(UNIX) target_sources(${TARGET_NAME} PRIVATE diff --git a/level_zero/tools/test/unit_tests/sources/sysman/scheduler/linux/CMakeLists.txt b/level_zero/tools/test/unit_tests/sources/sysman/scheduler/linux/CMakeLists.txt index a515c87652..3d31aed7c1 100644 --- a/level_zero/tools/test/unit_tests/sources/sysman/scheduler/linux/CMakeLists.txt +++ b/level_zero/tools/test/unit_tests/sources/sysman/scheduler/linux/CMakeLists.txt @@ -1,14 +1,26 @@ # -# Copyright (C) 2020-2021 Intel Corporation +# Copyright (C) 2020-2022 Intel Corporation # # SPDX-License-Identifier: MIT # +set(L0_TESTS_TOOLS_SYSMAN_SCHEDULER_LINUX + ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt + ${CMAKE_CURRENT_SOURCE_DIR}${BRANCH_DIR_SUFFIX}test_zes_scheduler.cpp + ${CMAKE_CURRENT_SOURCE_DIR}${BRANCH_DIR_SUFFIX}mock_sysfs_scheduler.h +) + +if((NEO_ENABLE_i915_PRELIM_DETECTION) AND ("${BRANCH_TYPE}" STREQUAL "")) + list(REMOVE_ITEM L0_TESTS_TOOLS_SYSMAN_SCHEDULER_LINUX + ${CMAKE_CURRENT_SOURCE_DIR}/test_zes_scheduler.cpp + ${CMAKE_CURRENT_SOURCE_DIR}/mock_sysfs_scheduler.h + ) +endif() + if(UNIX) target_sources(${TARGET_NAME} PRIVATE - ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt - ${CMAKE_CURRENT_SOURCE_DIR}${BRANCH_DIR_SUFFIX}test_zes_scheduler.cpp - ${CMAKE_CURRENT_SOURCE_DIR}${BRANCH_DIR_SUFFIX}mock_sysfs_scheduler.h + ${L0_TESTS_TOOLS_SYSMAN_SCHEDULER_LINUX} ) endif() + diff --git a/third_party/uapi/prelim/drm/intel_hwconfig_types.h b/third_party/uapi/prelim/drm/intel_hwconfig_types.h index bb2abb53e9..fc1b31ced8 100644 --- a/third_party/uapi/prelim/drm/intel_hwconfig_types.h +++ b/third_party/uapi/prelim/drm/intel_hwconfig_types.h @@ -1,102 +1,115 @@ /* SPDX-License-Identifier: MIT */ /* - * Copyright © 2021 Intel Corporation + * Copyright © 2021-2022 Intel Corporation */ #ifndef _INTEL_HWCONFIG_TYPES_H_ #define _INTEL_HWCONFIG_TYPES_H_ /** - * enum intel_hwconfig - Global definition of hwconfig table attributes - * - * Intel devices provide a KLV (Key/Length/Value) table containing - * the static hardware configuration for that platform. - * This enum defines the current attribute keys for this KLV. - */ + * enum intel_hwconfig - Global definition of hwconfig table attributes + * + * Intel devices provide a KLV (Key/Length/Value) table containing + * the static hardware configuration for that platform. + * This header defines the current attribute keys for this KLV. + */ enum intel_hwconfig { - INTEL_HWCONFIG_MAX_SLICES_SUPPORTED = 1, - INTEL_HWCONFIG_MAX_DUAL_SUBSLICES_SUPPORTED, /* 2 */ - INTEL_HWCONFIG_MAX_NUM_EU_PER_DSS, /* 3 */ - INTEL_HWCONFIG_NUM_PIXEL_PIPES, /* 4 */ - INTEL_HWCONFIG_DEPRECATED_MAX_NUM_GEOMETRY_PIPES, /* 5 */ - INTEL_HWCONFIG_DEPRECATED_L3_CACHE_SIZE_IN_KB, /* 6 */ - INTEL_HWCONFIG_DEPRECATED_L3_BANK_COUNT, /* 7 */ - INTEL_HWCONFIG_L3_CACHE_WAYS_SIZE_IN_BYTES, /* 8 */ - INTEL_HWCONFIG_L3_CACHE_WAYS_PER_SECTOR, /* 9 */ - INTEL_HWCONFIG_MAX_MEMORY_CHANNELS, /* 10 */ - INTEL_HWCONFIG_MEMORY_TYPE, /* 11 */ - INTEL_HWCONFIG_CACHE_TYPES, /* 12 */ - INTEL_HWCONFIG_LOCAL_MEMORY_PAGE_SIZES_SUPPORTED, /* 13 */ - INTEL_HWCONFIG_DEPRECATED_SLM_SIZE_IN_KB, /* 14 */ - INTEL_HWCONFIG_NUM_THREADS_PER_EU, /* 15 */ - INTEL_HWCONFIG_TOTAL_VS_THREADS, /* 16 */ - INTEL_HWCONFIG_TOTAL_GS_THREADS, /* 17 */ - INTEL_HWCONFIG_TOTAL_HS_THREADS, /* 18 */ - INTEL_HWCONFIG_TOTAL_DS_THREADS, /* 19 */ - INTEL_HWCONFIG_TOTAL_VS_THREADS_POCS, /* 20 */ - INTEL_HWCONFIG_TOTAL_PS_THREADS, /* 21 */ - INTEL_HWCONFIG_DEPRECATED_MAX_FILL_RATE, /* 22 */ - INTEL_HWCONFIG_MAX_RCS, /* 23 */ - INTEL_HWCONFIG_MAX_CCS, /* 24 */ - INTEL_HWCONFIG_MAX_VCS, /* 25 */ - INTEL_HWCONFIG_MAX_VECS, /* 26 */ - INTEL_HWCONFIG_MAX_COPY_CS, /* 27 */ - INTEL_HWCONFIG_DEPRECATED_URB_SIZE_IN_KB, /* 28 */ - INTEL_HWCONFIG_MIN_VS_URB_ENTRIES, /* 29 */ - INTEL_HWCONFIG_MAX_VS_URB_ENTRIES, /* 30 */ - INTEL_HWCONFIG_MIN_PCS_URB_ENTRIES, /* 31 */ - INTEL_HWCONFIG_MAX_PCS_URB_ENTRIES, /* 32 */ - INTEL_HWCONFIG_MIN_HS_URB_ENTRIES, /* 33 */ - INTEL_HWCONFIG_MAX_HS_URB_ENTRIES, /* 34 */ - INTEL_HWCONFIG_MIN_GS_URB_ENTRIES, /* 35 */ - INTEL_HWCONFIG_MAX_GS_URB_ENTRIES, /* 36 */ - INTEL_HWCONFIG_MIN_DS_URB_ENTRIES, /* 37 */ - INTEL_HWCONFIG_MAX_DS_URB_ENTRIES, /* 38 */ - INTEL_HWCONFIG_PUSH_CONSTANT_URB_RESERVED_SIZE, /* 39 */ - INTEL_HWCONFIG_POCS_PUSH_CONSTANT_URB_RESERVED_SIZE, /* 40 */ - INTEL_HWCONFIG_URB_REGION_ALIGNMENT_SIZE_IN_BYTES, /* 41 */ - INTEL_HWCONFIG_URB_ALLOCATION_SIZE_UNITS_IN_BYTES, /* 42 */ - INTEL_HWCONFIG_MAX_URB_SIZE_CCS_IN_BYTES, /* 43 */ - INTEL_HWCONFIG_VS_MIN_DEREF_BLOCK_SIZE_HANDLE_COUNT, /* 44 */ - INTEL_HWCONFIG_DS_MIN_DEREF_BLOCK_SIZE_HANDLE_COUNT, /* 45 */ - INTEL_HWCONFIG_NUM_RT_STACKS_PER_DSS, /* 46 */ - INTEL_HWCONFIG_MAX_URB_STARTING_ADDRESS, /* 47 */ - INTEL_HWCONFIG_MIN_CS_URB_ENTRIES, /* 48 */ - INTEL_HWCONFIG_MAX_CS_URB_ENTRIES, /* 49 */ - INTEL_HWCONFIG_L3_ALLOC_PER_BANK_URB, /* 50 */ - INTEL_HWCONFIG_L3_ALLOC_PER_BANK_REST, /* 51 */ - INTEL_HWCONFIG_L3_ALLOC_PER_BANK_DC, /* 52 */ - INTEL_HWCONFIG_L3_ALLOC_PER_BANK_RO, /* 53 */ - INTEL_HWCONFIG_L3_ALLOC_PER_BANK_Z, /* 54 */ - INTEL_HWCONFIG_L3_ALLOC_PER_BANK_COLOR, /* 55 */ - INTEL_HWCONFIG_L3_ALLOC_PER_BANK_UNIFIED_TILE_CACHE, /* 56 */ - INTEL_HWCONFIG_L3_ALLOC_PER_BANK_COMMAND_BUFFER, /* 57 */ - INTEL_HWCONFIG_L3_ALLOC_PER_BANK_RW, /* 58 */ - INTEL_HWCONFIG_MAX_NUM_L3_CONFIGS, /* 59 */ - INTEL_HWCONFIG_BINDLESS_SURFACE_OFFSET_BIT_COUNT, /* 60 */ - INTEL_HWCONFIG_RESERVED_CCS_WAYS, /* 61 */ - INTEL_HWCONFIG_CSR_SIZE_IN_MB, /* 62 */ - INTEL_HWCONFIG_GEOMETRY_PIPES_PER_SLICE, /* 63 */ - INTEL_HWCONFIG_L3_BANK_SIZE_IN_KB, /* 64 */ - INTEL_HWCONFIG_SLM_SIZE_PER_DSS, /* 65 */ - INTEL_HWCONFIG_MAX_PIXEL_FILL_RATE_PER_SLICE, /* 66 */ - INTEL_HWCONFIG_MAX_PIXEL_FILL_RATE_PER_DSS, /* 67 */ - INTEL_HWCONFIG_URB_SIZE_PER_SLICE_IN_KB, /* 68 */ - INTEL_HWCONFIG_URB_SIZE_PER_L3_BANK_COUNT_IN_KB, /* 69 */ - INTEL_HWCONFIG_MAX_SUBSLICE, /* 70 */ - INTEL_HWCONFIG_MAX_EU_PER_SUBSLICE, /* 71 */ - INTEL_HWCONFIG_RAMBO_L3_BANK_SIZE_IN_KB, /* 72 */ - INTEL_HWCONFIG_SLM_SIZE_PER_SS_IN_KB, /* 73 */ - __INTEL_HWCONFIG_LIMIT + INTEL_HWCONFIG_MAX_SLICES_SUPPORTED = 1, + INTEL_HWCONFIG_MAX_DUAL_SUBSLICES_SUPPORTED, /* 2 */ + INTEL_HWCONFIG_MAX_NUM_EU_PER_DSS, /* 3 */ + INTEL_HWCONFIG_NUM_PIXEL_PIPES, /* 4 */ + INTEL_HWCONFIG_DEPRECATED_MAX_NUM_GEOMETRY_PIPES, /* 5 */ + INTEL_HWCONFIG_DEPRECATED_L3_CACHE_SIZE_IN_KB, /* 6 */ + INTEL_HWCONFIG_DEPRECATED_L3_BANK_COUNT, /* 7 */ + INTEL_HWCONFIG_L3_CACHE_WAYS_SIZE_IN_BYTES, /* 8 */ + INTEL_HWCONFIG_L3_CACHE_WAYS_PER_SECTOR, /* 9 */ + INTEL_HWCONFIG_MAX_MEMORY_CHANNELS, /* 10 */ + INTEL_HWCONFIG_MEMORY_TYPE, /* 11 */ + INTEL_HWCONFIG_CACHE_TYPES, /* 12 */ + /* + * Local Memory page sizes supported lists all possible supported sizes + * For example, 4KB and 64KB will be listed as (SZ_4K | SZ_64K) + */ + INTEL_HWCONFIG_LOCAL_MEMORY_PAGE_SIZES_SUPPORTED, /* 13 */ + INTEL_HWCONFIG_DEPRECATED_SLM_SIZE_IN_KB, /* 14 */ + INTEL_HWCONFIG_NUM_THREADS_PER_EU, /* 15 */ + INTEL_HWCONFIG_TOTAL_VS_THREADS, /* 16 */ + INTEL_HWCONFIG_TOTAL_GS_THREADS, /* 17 */ + INTEL_HWCONFIG_TOTAL_HS_THREADS, /* 18 */ + INTEL_HWCONFIG_TOTAL_DS_THREADS, /* 19 */ + INTEL_HWCONFIG_TOTAL_VS_THREADS_POCS, /* 20 */ + INTEL_HWCONFIG_TOTAL_PS_THREADS, /* 21 */ + INTEL_HWCONFIG_DEPRECATED_MAX_FILL_RATE, /* 22 */ + INTEL_HWCONFIG_MAX_RCS, /* 23 */ + INTEL_HWCONFIG_MAX_CCS, /* 24 */ + INTEL_HWCONFIG_MAX_VCS, /* 25 */ + INTEL_HWCONFIG_MAX_VECS, /* 26 */ + INTEL_HWCONFIG_MAX_COPY_CS, /* 27 */ + /* URB Size might be configurable by UMD in certain platforms */ + INTEL_HWCONFIG_DEPRECATED_URB_SIZE_IN_KB, /* 28 */ + INTEL_HWCONFIG_MIN_VS_URB_ENTRIES, /* 29 */ + INTEL_HWCONFIG_MAX_VS_URB_ENTRIES, /* 30 */ + INTEL_HWCONFIG_MIN_PCS_URB_ENTRIES, /* 31 */ + INTEL_HWCONFIG_MAX_PCS_URB_ENTRIES, /* 32 */ + INTEL_HWCONFIG_MIN_HS_URB_ENTRIES, /* 33 */ + INTEL_HWCONFIG_MAX_HS_URB_ENTRIES, /* 34 */ + INTEL_HWCONFIG_MIN_GS_URB_ENTRIES, /* 35 */ + INTEL_HWCONFIG_MAX_GS_URB_ENTRIES, /* 36 */ + INTEL_HWCONFIG_MIN_DS_URB_ENTRIES, /* 37 */ + INTEL_HWCONFIG_MAX_DS_URB_ENTRIES, /* 38 */ + INTEL_HWCONFIG_PUSH_CONSTANT_URB_RESERVED_SIZE, /* 39 */ + INTEL_HWCONFIG_POCS_PUSH_CONSTANT_URB_RESERVED_SIZE, /* 40 */ + INTEL_HWCONFIG_URB_REGION_ALIGNMENT_SIZE_IN_BYTES, /* 41 */ + INTEL_HWCONFIG_URB_ALLOCATION_SIZE_UNITS_IN_BYTES, /* 42 */ + INTEL_HWCONFIG_MAX_URB_SIZE_CCS_IN_BYTES, /* 43 */ + INTEL_HWCONFIG_VS_MIN_DEREF_BLOCK_SIZE_HANDLE_COUNT, /* 44 */ + INTEL_HWCONFIG_DS_MIN_DEREF_BLOCK_SIZE_HANDLE_COUNT, /* 45 */ + INTEL_HWCONFIG_NUM_RT_STACKS_PER_DSS, /* 46 */ + INTEL_HWCONFIG_MAX_URB_STARTING_ADDRESS, /* 47 */ + INTEL_HWCONFIG_MIN_CS_URB_ENTRIES, /* 48 */ + INTEL_HWCONFIG_MAX_CS_URB_ENTRIES, /* 49 */ + INTEL_HWCONFIG_L3_ALLOC_PER_BANK_URB, /* 50 */ + INTEL_HWCONFIG_L3_ALLOC_PER_BANK_REST, /* 51 */ + INTEL_HWCONFIG_L3_ALLOC_PER_BANK_DC, /* 52 */ + INTEL_HWCONFIG_L3_ALLOC_PER_BANK_RO, /* 53 */ + INTEL_HWCONFIG_L3_ALLOC_PER_BANK_Z, /* 54 */ + INTEL_HWCONFIG_L3_ALLOC_PER_BANK_COLOR, /* 55 */ + INTEL_HWCONFIG_L3_ALLOC_PER_BANK_UNIFIED_TILE_CACHE, /* 56 */ + INTEL_HWCONFIG_L3_ALLOC_PER_BANK_COMMAND_BUFFER, /* 57 */ + INTEL_HWCONFIG_L3_ALLOC_PER_BANK_RW, /* 58 */ + INTEL_HWCONFIG_MAX_NUM_L3_CONFIGS, /* 59 */ + INTEL_HWCONFIG_BINDLESS_SURFACE_OFFSET_BIT_COUNT, /* 60 */ + INTEL_HWCONFIG_RESERVED_CCS_WAYS, /* 61 */ + INTEL_HWCONFIG_CSR_SIZE_IN_MB, /* 62 */ + INTEL_HWCONFIG_GEOMETRY_PIPES_PER_SLICE, /* 63 */ + INTEL_HWCONFIG_L3_BANK_SIZE_IN_KB, /* 64 */ + INTEL_HWCONFIG_SLM_SIZE_PER_DSS, /* 65 */ + INTEL_HWCONFIG_MAX_PIXEL_FILL_RATE_PER_SLICE, /* 66 */ + INTEL_HWCONFIG_MAX_PIXEL_FILL_RATE_PER_DSS, /* 67 */ + INTEL_HWCONFIG_URB_SIZE_PER_SLICE_IN_KB, /* 68 */ + INTEL_HWCONFIG_URB_SIZE_PER_L3_BANK_COUNT_IN_KB, /* 69 */ + INTEL_HWCONFIG_MAX_SUBSLICE, /* 70 */ + INTEL_HWCONFIG_MAX_EU_PER_SUBSLICE, /* 71 */ + INTEL_HWCONFIG_RAMBO_L3_BANK_SIZE_IN_KB, /* 72 */ + INTEL_HWCONFIG_SLM_SIZE_PER_SS_IN_KB, /* 73 */ + INTEL_HWCONFIG_NUM_HBM_STACKS_PER_TILE, /* 74 */ + INTEL_HWCONFIG_NUM_CHANNELS_PER_HBM_STACK, /* 75 */ + INTEL_HWCONFIG_HBM_CHANNEL_WIDTH_IN_BYTES, /* 76 */ + __INTEL_HWCONFIG_MAX }; +#define INTEL_HWCONFIG_MAX (__INTEL_HWCONFIG_MAX - 1) + enum { - INTEL_HWCONFIG_MEMORY_TYPE_LPDDR4 = 0, - INTEL_HWCONFIG_MEMORY_TYPE_LPDDR5, + INTEL_HWCONFIG_MEMORY_TYPE_LPDDR4 = 0, + INTEL_HWCONFIG_MEMORY_TYPE_LPDDR5, + INTEL_HWCONFIG_MEMORY_TYPE_HBM2, + INTEL_HWCONFIG_MEMORY_TYPE_HBM2e, + INTEL_HWCONFIG_MEMORY_TYPE_GDDR6, }; -#define INTEL_HWCONFIG_CACHE_TYPE_L3 BIT(0) -#define INTEL_HWCONFIG_CACHE_TYPE_LLC BIT(1) -#define INTEL_HWCONFIG_CACHE_TYPE_EDRAM BIT(2) +#define INTEL_HWCONFIG_CACHE_TYPE_L3 BIT(0) +#define INTEL_HWCONFIG_CACHE_TYPE_LLC BIT(1) +#define INTEL_HWCONFIG_CACHE_TYPE_EDRAM BIT(2) #endif /* _INTEL_HWCONFIG_TYPES_H_ */