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Refactor memory object control state methods in generated commands

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remove setters/getters for Index To Mocs Tables fields
all information contained in MOCS from gmm client context is now handled
by dedicated method set/get MemoryObjectControlState

Related-To: NEO-6466


Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
This commit is contained in:
Mateusz Jablonski
2021-12-13 12:34:09 +00:00
committed by Compute-Runtime-Automation
parent 601271c92e
commit 03e617d14f
35 changed files with 582 additions and 327 deletions
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4
shared/test/unit_test/gen11/CMakeLists.txt
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@@ -5,5 +5,9 @@
#
if(TESTS_GEN11)
target_sources(neo_shared_tests PRIVATE
${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt
${CMAKE_CURRENT_SOURCE_DIR}/hw_cmds_gen11_tests.cpp
)
add_subdirectories()
endif()

59
shared/test/unit_test/gen11/hw_cmds_gen11_tests.cpp Normal file
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/*
* Copyright (C) 2021 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "shared/source/gen11/hw_cmds_base.h"
#include "test.h"
using namespace NEO;
using Gen11HwCmdTest = ::testing::Test;
GEN11TEST_F(Gen11HwCmdTest, givenRenderSurfaceStateWhenProgrammingMocsThenMocsIndexIsSetProperly) {
auto renderSurfaceState = FamilyType::cmdInitRenderSurfaceState;
uint32_t mocs = 4u;
uint32_t expectedMocsIndex = (mocs >> 1);
renderSurfaceState.setMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, renderSurfaceState.TheStructure.Common.MemoryObjectControlState_IndexToMocsTables);
}
GEN11TEST_F(Gen11HwCmdTest, givenStateBaseAddressWhenProgrammingMocsThenMocsIndexIsSetProperly) {
auto stateBaseAddress = FamilyType::cmdInitStateBaseAddress;
uint32_t mocs = 4u;
uint32_t expectedMocsIndex = (mocs >> 1);
stateBaseAddress.setGeneralStateMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, stateBaseAddress.TheStructure.Common.GeneralStateMemoryObjectControlState_IndexToMocsTables);
stateBaseAddress.setStatelessDataPortAccessMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, stateBaseAddress.TheStructure.Common.StatelessDataPortAccessMemoryObjectControlState_IndexToMocsTables);
stateBaseAddress.setSurfaceStateMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, stateBaseAddress.TheStructure.Common.SurfaceStateMemoryObjectControlState_IndexToMocsTables);
stateBaseAddress.setDynamicStateMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, stateBaseAddress.TheStructure.Common.DynamicStateMemoryObjectControlState_IndexToMocsTables);
stateBaseAddress.setIndirectObjectMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, stateBaseAddress.TheStructure.Common.IndirectObjectMemoryObjectControlState_IndexToMocsTables);
stateBaseAddress.setInstructionMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, stateBaseAddress.TheStructure.Common.InstructionMemoryObjectControlState_IndexToMocsTables);
stateBaseAddress.setBindlessSurfaceStateMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, stateBaseAddress.TheStructure.Common.BindlessSurfaceStateMemoryObjectControlState_IndexToMocsTables);
stateBaseAddress.setBindlessSamplerStateMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, stateBaseAddress.TheStructure.Common.BindlessSamplerStateMemoryObjectControlState_IndexToMocsTables);
}
GEN11TEST_F(Gen11HwCmdTest, givenMediaSurfaceStateWhenProgrammingMocsThenMocsIndexIsSetProperly) {
auto mediaSurfaceState = FamilyType::cmdInitMediaSurfaceState;
uint32_t mocs = 4u;
uint32_t expectedMocsIndex = (mocs >> 1);
mediaSurfaceState.setSurfaceMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, mediaSurfaceState.TheStructure.Common.SurfaceMemoryObjectControlState_IndexToMocsTables);
}

4
shared/test/unit_test/gen12lp/CMakeLists.txt
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@@ -5,5 +5,9 @@
#
if(TESTS_GEN12LP)
target_sources(neo_shared_tests PRIVATE
${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt
${CMAKE_CURRENT_SOURCE_DIR}/hw_cmds_gen12lp_tests.cpp
)
add_subdirectories()
endif()

59
shared/test/unit_test/gen12lp/hw_cmds_gen12lp_tests.cpp Normal file
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@@ -0,0 +1,59 @@
/*
* Copyright (C) 2021 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "shared/source/gen12lp/hw_cmds_base.h"
#include "test.h"
using namespace NEO;
using Gen12lpHwCmdTest = ::testing::Test;
GEN12LPTEST_F(Gen12lpHwCmdTest, givenRenderSurfaceStateWhenProgrammingMocsThenMocsIndexIsSetProperly) {
auto renderSurfaceState = FamilyType::cmdInitRenderSurfaceState;
uint32_t mocs = 4u;
uint32_t expectedMocsIndex = (mocs >> 1);
renderSurfaceState.setMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, renderSurfaceState.TheStructure.Common.MemoryObjectControlStateIndexToMocsTables);
}
GEN12LPTEST_F(Gen12lpHwCmdTest, givenStateBaseAddressWhenProgrammingMocsThenMocsIndexIsSetProperly) {
auto stateBaseAddress = FamilyType::cmdInitStateBaseAddress;
uint32_t mocs = 4u;
uint32_t expectedMocsIndex = (mocs >> 1);
stateBaseAddress.setGeneralStateMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, stateBaseAddress.TheStructure.Common.GeneralStateMemoryObjectControlState_IndexToMocsTables);
stateBaseAddress.setStatelessDataPortAccessMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, stateBaseAddress.TheStructure.Common.StatelessDataPortAccessMemoryObjectControlState_IndexToMocsTables);
stateBaseAddress.setSurfaceStateMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, stateBaseAddress.TheStructure.Common.SurfaceStateMemoryObjectControlState_IndexToMocsTables);
stateBaseAddress.setDynamicStateMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, stateBaseAddress.TheStructure.Common.DynamicStateMemoryObjectControlState_IndexToMocsTables);
stateBaseAddress.setIndirectObjectMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, stateBaseAddress.TheStructure.Common.IndirectObjectMemoryObjectControlState_IndexToMocsTables);
stateBaseAddress.setInstructionMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, stateBaseAddress.TheStructure.Common.InstructionMemoryObjectControlState_IndexToMocsTables);
stateBaseAddress.setBindlessSurfaceStateMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, stateBaseAddress.TheStructure.Common.BindlessSurfaceStateMemoryObjectControlState_IndexToMocsTables);
stateBaseAddress.setBindlessSamplerStateMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, stateBaseAddress.TheStructure.Common.BindlessSamplerStateMemoryObjectControlState_IndexToMocsTables);
}
GEN12LPTEST_F(Gen12lpHwCmdTest, givenMediaSurfaceStateWhenProgrammingMocsThenMocsIndexIsSetProperly) {
auto mediaSurfaceState = FamilyType::cmdInitMediaSurfaceState;
uint32_t mocs = 4u;
uint32_t expectedMocsIndex = (mocs >> 1);
mediaSurfaceState.setSurfaceMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, mediaSurfaceState.TheStructure.Common.SurfaceMemoryObjectControlStateIndexToMocsTables);
}

4
shared/test/unit_test/gen9/CMakeLists.txt
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@@ -5,5 +5,9 @@
#
if(TESTS_GEN9)
target_sources(neo_shared_tests PRIVATE
${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt
${CMAKE_CURRENT_SOURCE_DIR}/hw_cmds_gen9_tests.cpp
)
add_subdirectories()
endif()

56
shared/test/unit_test/gen9/hw_cmds_gen9_tests.cpp Normal file
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/*
* Copyright (C) 2021 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "shared/source/gen9/hw_cmds_base.h"
#include "test.h"
using namespace NEO;
using Gen9HwCmdTest = ::testing::Test;
GEN9TEST_F(Gen9HwCmdTest, givenRenderSurfaceStateWhenProgrammingMocsThenMocsIndexIsSetProperly) {
auto renderSurfaceState = FamilyType::cmdInitRenderSurfaceState;
uint32_t mocs = 4u;
uint32_t expectedMocsIndex = (mocs >> 1);
renderSurfaceState.setMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, renderSurfaceState.TheStructure.Common.MemoryObjectControlState_IndexToMocsTables);
}
GEN9TEST_F(Gen9HwCmdTest, givenStateBaseAddressWhenProgrammingMocsThenMocsIndexIsSetProperly) {
auto stateBaseAddress = FamilyType::cmdInitStateBaseAddress;
uint32_t mocs = 4u;
uint32_t expectedMocsIndex = (mocs >> 1);
stateBaseAddress.setGeneralStateMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, stateBaseAddress.TheStructure.Common.GeneralStateMemoryObjectControlState_IndexToMocsTables);
stateBaseAddress.setStatelessDataPortAccessMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, stateBaseAddress.TheStructure.Common.StatelessDataPortAccessMemoryObjectControlState_IndexToMocsTables);
stateBaseAddress.setSurfaceStateMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, stateBaseAddress.TheStructure.Common.SurfaceStateMemoryObjectControlState_IndexToMocsTables);
stateBaseAddress.setDynamicStateMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, stateBaseAddress.TheStructure.Common.DynamicStateMemoryObjectControlState_IndexToMocsTables);
stateBaseAddress.setIndirectObjectMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, stateBaseAddress.TheStructure.Common.IndirectObjectMemoryObjectControlState_IndexToMocsTables);
stateBaseAddress.setInstructionMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, stateBaseAddress.TheStructure.Common.InstructionMemoryObjectControlState_IndexToMocsTables);
stateBaseAddress.setBindlessSurfaceStateMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, stateBaseAddress.TheStructure.Common.BindlessSurfaceStateMemoryObjectControlState_IndexToMocsTables);
}
GEN9TEST_F(Gen9HwCmdTest, givenMediaSurfaceStateWhenProgrammingMocsThenMocsIndexIsSetProperly) {
auto mediaSurfaceState = FamilyType::cmdInitMediaSurfaceState;
uint32_t mocs = 4u;
uint32_t expectedMocsIndex = (mocs >> 1);
mediaSurfaceState.setSurfaceMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, mediaSurfaceState.TheStructure.Common.SurfaceMemoryObjectControlState_IndexToMocsTables);
}

13
shared/test/unit_test/xe_hp_core/CMakeLists.txt Normal file
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#
# Copyright (C) 2021 Intel Corporation
#
# SPDX-License-Identifier: MIT
#
if(TESTS_XE_HP_CORE)
target_sources(neo_shared_tests PRIVATE
${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt
${CMAKE_CURRENT_SOURCE_DIR}/hw_cmds_xe_hp_core_tests.cpp
)
add_subdirectories()
endif()

80
shared/test/unit_test/xe_hp_core/hw_cmds_xe_hp_core_tests.cpp Normal file
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/*
* Copyright (C) 2021 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "shared/source/xe_hp_core/hw_cmds_base.h"
#include "test.h"
using namespace NEO;
using XeHpCoreHwCmdTest = ::testing::Test;
XE_HP_CORE_TEST_F(XeHpCoreHwCmdTest, givenRenderSurfaceStateWhenProgrammingMocsThenMocsIndexIsSetProperly) {
auto renderSurfaceState = FamilyType::cmdInitRenderSurfaceState;
uint32_t mocs = 4u;
uint32_t expectedMocsIndex = (mocs >> 1);
renderSurfaceState.setMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, renderSurfaceState.TheStructure.Common.MemoryObjectControlStateIndexToMocsTables);
}
XE_HP_CORE_TEST_F(XeHpCoreHwCmdTest, givenStateBaseAddressWhenProgrammingMocsThenMocsIndexIsSetProperly) {
auto stateBaseAddress = FamilyType::cmdInitStateBaseAddress;
uint32_t mocs = 4u;
uint32_t expectedMocsIndex = (mocs >> 1);
stateBaseAddress.setGeneralStateMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, stateBaseAddress.TheStructure.Common.GeneralStateMemoryObjectControlState_IndexToMocsTables);
stateBaseAddress.setStatelessDataPortAccessMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, stateBaseAddress.TheStructure.Common.StatelessDataPortAccessMemoryObjectControlState_IndexToMocsTables);
stateBaseAddress.setSurfaceStateMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, stateBaseAddress.TheStructure.Common.SurfaceStateMemoryObjectControlState_IndexToMocsTables);
stateBaseAddress.setDynamicStateMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, stateBaseAddress.TheStructure.Common.DynamicStateMemoryObjectControlState_IndexToMocsTables);
stateBaseAddress.setInstructionMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, stateBaseAddress.TheStructure.Common.InstructionMemoryObjectControlState_IndexToMocsTables);
stateBaseAddress.setBindlessSurfaceStateMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, stateBaseAddress.TheStructure.Common.BindlessSurfaceStateMemoryObjectControlState_IndexToMocsTables);
stateBaseAddress.setBindlessSamplerStateMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, stateBaseAddress.TheStructure.Common.BindlessSamplerStateMemoryObjectControlState_IndexToMocsTables);
}
XE_HP_CORE_TEST_F(XeHpCoreHwCmdTest, givenPostSyncDataWhenProgrammingMocsThenMocsIndexIsSetProperly) {
auto postSyncData = FamilyType::cmdInitPostSyncData;
uint32_t mocs = 4u;
uint32_t expectedMocsIndex = (mocs >> 1);
postSyncData.setMocs(mocs);
EXPECT_EQ(expectedMocsIndex, postSyncData.TheStructure.Common.MocsIndexToMocsTables);
}
XE_HP_CORE_TEST_F(XeHpCoreHwCmdTest, givenLoadRegisterMemWhenProgrammingMocsThenMocsIndexIsSetProperly) {
auto loadRegisterMem = FamilyType::cmdInitLoadRegisterMem;
uint32_t mocs = 4u;
uint32_t expectedMocsIndex = (mocs >> 1);
loadRegisterMem.setMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, loadRegisterMem.TheStructure.Common.MemoryObjectControlStateIndexToMocsTables);
}
XE_HP_CORE_TEST_F(XeHpCoreHwCmdTest, givenStoreRegisterMemWhenProgrammingMocsThenMocsIndexIsSetProperly) {
auto storeRegisterMem = FamilyType::cmdInitStoreRegisterMem;
uint32_t mocs = 4u;
uint32_t expectedMocsIndex = (mocs >> 1);
storeRegisterMem.setMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, storeRegisterMem.TheStructure.Common.MemoryObjectControlStateIndexToMocsTables);
}
XE_HP_CORE_TEST_F(XeHpCoreHwCmdTest, givenStoreDataImmWhenProgrammingMocsThenMocsIndexIsSetProperly) {
auto storeDataImm = FamilyType::cmdInitStoreDataImm;
uint32_t mocs = 4u;
uint32_t expectedMocsIndex = (mocs >> 1);
storeDataImm.setMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, storeDataImm.TheStructure.Common.MemoryObjectControlStateIndexToMocsTables);
}

13
shared/test/unit_test/xe_hpc_core/CMakeLists.txt Normal file
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#
# Copyright (C) 2021 Intel Corporation
#
# SPDX-License-Identifier: MIT
#
if(TESTS_XE_HPC_CORE)
target_sources(neo_shared_tests PRIVATE
${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt
${CMAKE_CURRENT_SOURCE_DIR}/hw_cmds_xe_hpc_core_tests.cpp
)
add_subdirectories()
endif()

64
shared/test/unit_test/xe_hpc_core/hw_cmds_xe_hpc_core_tests.cpp Normal file
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/*
* Copyright (C) 2021 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "shared/source/xe_hpc_core/hw_cmds_base.h"
#include "test.h"
using namespace NEO;
using XeHpcCoreHwCmdTest = ::testing::Test;
XE_HPC_CORETEST_F(XeHpcCoreHwCmdTest, givenMediaSurfaceStateWhenProgrammingMocsThenMocsIndexIsSetProperly) {
auto mediaSurfaceState = FamilyType::cmdInitMediaSurfaceState;
uint32_t mocs = 4u;
uint32_t expectedMocsIndex = (mocs >> 1);
mediaSurfaceState.setSurfaceMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, mediaSurfaceState.TheStructure.Common.SurfaceMemoryObjectControlStateIndexToMocsTables);
}
XE_HPC_CORETEST_F(XeHpcCoreHwCmdTest, givenRenderSurfaceStateWhenProgrammingMocsThenMocsIndexIsSetProperly) {
auto renderSurfaceState = FamilyType::cmdInitRenderSurfaceState;
uint32_t mocs = 4u;
uint32_t expectedMocsIndex = (mocs >> 1);
renderSurfaceState.setMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, renderSurfaceState.TheStructure.Common.MemoryObjectControlStateIndexToMocsTables);
}
XE_HPC_CORETEST_F(XeHpcCoreHwCmdTest, givenStateBaseAddressWhenProgrammingMocsThenMocsIndexIsSetProperly) {
auto stateBaseAddress = FamilyType::cmdInitStateBaseAddress;
uint32_t mocs = 4u;
uint32_t expectedMocsIndex = (mocs >> 1);
stateBaseAddress.setGeneralStateMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, stateBaseAddress.TheStructure.Common.GeneralStateMemoryObjectControlStateIndexToMocsTables);
stateBaseAddress.setStatelessDataPortAccessMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, stateBaseAddress.TheStructure.Common.StatelessDataPortAccessMemoryObjectControlStateIndexToMocsTables);
stateBaseAddress.setSurfaceStateMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, stateBaseAddress.TheStructure.Common.SurfaceStateMemoryObjectControlStateIndexToMocsTables);
stateBaseAddress.setDynamicStateMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, stateBaseAddress.TheStructure.Common.DynamicStateMemoryObjectControlStateIndexToMocsTables);
stateBaseAddress.setInstructionMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, stateBaseAddress.TheStructure.Common.InstructionMemoryObjectControlStateIndexToMocsTables);
stateBaseAddress.setBindlessSurfaceStateMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, stateBaseAddress.TheStructure.Common.BindlessSurfaceStateMemoryObjectControlStateIndexToMocsTables);
stateBaseAddress.setBindlessSamplerStateMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, stateBaseAddress.TheStructure.Common.BindlessSamplerStateMemoryObjectControlStateIndexToMocsTables);
}
XE_HPC_CORETEST_F(XeHpcCoreHwCmdTest, givenPostSyncDataWhenProgrammingMocsThenMocsIndexIsSetProperly) {
auto postSyncData = FamilyType::cmdInitPostSyncData;
uint32_t mocs = 4u;
uint32_t expectedMocsIndex = (mocs >> 1);
postSyncData.setMocs(mocs);
EXPECT_EQ(expectedMocsIndex, postSyncData.TheStructure.Common.MocsIndexToMocsTables);
}

13
shared/test/unit_test/xe_hpg_core/CMakeLists.txt Normal file
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#
# Copyright (C) 2021 Intel Corporation
#
# SPDX-License-Identifier: MIT
#
if(TESTS_XE_HPG_CORE)
target_sources(neo_shared_tests PRIVATE
${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt
${CMAKE_CURRENT_SOURCE_DIR}/hw_cmds_xe_hpg_core_tests.cpp
)
add_subdirectories()
endif()

88
shared/test/unit_test/xe_hpg_core/hw_cmds_xe_hpg_core_tests.cpp Normal file
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/*
* Copyright (C) 2021 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "shared/source/xe_hpg_core/hw_cmds_base.h"
#include "test.h"
using namespace NEO;
using XeHpgCoreHwCmdTest = ::testing::Test;
XE_HPG_CORETEST_F(XeHpgCoreHwCmdTest, givenMediaSurfaceStateWhenProgrammingMocsThenMocsIndexIsSetProperly) {
auto mediaSurfaceState = FamilyType::cmdInitMediaSurfaceState;
uint32_t mocs = 4u;
uint32_t expectedMocsIndex = (mocs >> 1);
mediaSurfaceState.setSurfaceMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, mediaSurfaceState.TheStructure.Common.SurfaceMemoryObjectControlState_IndexToMocsTables);
}
XE_HPG_CORETEST_F(XeHpgCoreHwCmdTest, givenRenderSurfaceStateWhenProgrammingMocsThenMocsIndexIsSetProperly) {
auto renderSurfaceState = FamilyType::cmdInitRenderSurfaceState;
uint32_t mocs = 4u;
uint32_t expectedMocsIndex = (mocs >> 1);
renderSurfaceState.setMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, renderSurfaceState.TheStructure.Common.MemoryObjectControlStateIndexToMocsTables);
}
XE_HPG_CORETEST_F(XeHpgCoreHwCmdTest, givenStateBaseAddressWhenProgrammingMocsThenMocsIndexIsSetProperly) {
auto stateBaseAddress = FamilyType::cmdInitStateBaseAddress;
uint32_t mocs = 4u;
uint32_t expectedMocsIndex = (mocs >> 1);
stateBaseAddress.setGeneralStateMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, stateBaseAddress.TheStructure.Common.GeneralStateMemoryObjectControlState_IndexToMocsTables);
stateBaseAddress.setStatelessDataPortAccessMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, stateBaseAddress.TheStructure.Common.StatelessDataPortAccessMemoryObjectControlState_IndexToMocsTables);
stateBaseAddress.setSurfaceStateMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, stateBaseAddress.TheStructure.Common.SurfaceStateMemoryObjectControlState_IndexToMocsTables);
stateBaseAddress.setDynamicStateMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, stateBaseAddress.TheStructure.Common.DynamicStateMemoryObjectControlState_IndexToMocsTables);
stateBaseAddress.setInstructionMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, stateBaseAddress.TheStructure.Common.InstructionMemoryObjectControlState_IndexToMocsTables);
stateBaseAddress.setBindlessSurfaceStateMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, stateBaseAddress.TheStructure.Common.BindlessSurfaceStateMemoryObjectControlState_IndexToMocsTables);
stateBaseAddress.setBindlessSamplerStateMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, stateBaseAddress.TheStructure.Common.BindlessSamplerStateMemoryObjectControlState_IndexToMocsTables);
}
XE_HPG_CORETEST_F(XeHpgCoreHwCmdTest, givenPostSyncDataWhenProgrammingMocsThenMocsIndexIsSetProperly) {
auto postSyncData = FamilyType::cmdInitPostSyncData;
uint32_t mocs = 4u;
uint32_t expectedMocsIndex = (mocs >> 1);
postSyncData.setMocs(mocs);
EXPECT_EQ(expectedMocsIndex, postSyncData.TheStructure.Common.MocsIndexToMocsTables);
}
XE_HPG_CORETEST_F(XeHpgCoreHwCmdTest, givenLoadRegisterMemWhenProgrammingMocsThenMocsIndexIsSetProperly) {
auto loadRegisterMem = FamilyType::cmdInitLoadRegisterMem;
uint32_t mocs = 4u;
uint32_t expectedMocsIndex = (mocs >> 1);
loadRegisterMem.setMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, loadRegisterMem.TheStructure.Common.MemoryObjectControlStateIndexToMocsTables);
}
XE_HPG_CORETEST_F(XeHpgCoreHwCmdTest, givenStoreRegisterMemWhenProgrammingMocsThenMocsIndexIsSetProperly) {
auto storeRegisterMem = FamilyType::cmdInitStoreRegisterMem;
uint32_t mocs = 4u;
uint32_t expectedMocsIndex = (mocs >> 1);
storeRegisterMem.setMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, storeRegisterMem.TheStructure.Common.MemoryObjectControlStateIndexToMocsTables);
}
XE_HPG_CORETEST_F(XeHpgCoreHwCmdTest, givenStoreDataImmWhenProgrammingMocsThenMocsIndexIsSetProperly) {
auto storeDataImm = FamilyType::cmdInitStoreDataImm;
uint32_t mocs = 4u;
uint32_t expectedMocsIndex = (mocs >> 1);
storeDataImm.setMemoryObjectControlState(mocs);
EXPECT_EQ(expectedMocsIndex, storeDataImm.TheStructure.Common.MemoryObjectControlStateIndexToMocsTables);
}