mirror of
https://github.com/intel/compute-runtime.git
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Revert "Improve build time: command_queue tests"
This reverts commit 76c78f017e.
Change-Id: Icb7eb473a17de5c072ba1833812fa084c4873465
This commit is contained in:
Maciej Dziuban
committed by
sys_ocldev
sys_ocldev
parent
dae9527b11
commit
049ba5c625
393
unit_tests/command_queue/enqueue_write_buffer_tests.cpp
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393
unit_tests/command_queue/enqueue_write_buffer_tests.cpp
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@@ -0,0 +1,393 @@
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/*
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* Copyright (c) 2017 - 2018, Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included
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* in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include "unit_tests/command_queue/buffer_operations_fixture.h"
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#include "runtime/built_ins/built_ins.h"
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#include "runtime/built_ins/builtins_dispatch_builder.h"
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#include "reg_configs_common.h"
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#include "runtime/helpers/dispatch_info.h"
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#include "unit_tests/command_queue/enqueue_fixture.h"
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#include "unit_tests/gen_common/gen_commands_common_validation.h"
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#include "unit_tests/helpers/debug_manager_state_restore.h"
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#include "unit_tests/helpers/unit_test_helper.h"
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#include "test.h"
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using namespace OCLRT;
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HWTEST_F(EnqueueWriteBufferTypeTest, null_mem_object) {
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auto data = 1;
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auto retVal = clEnqueueWriteBuffer(
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pCmdQ,
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nullptr,
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false,
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0,
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sizeof(data),
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&data,
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0,
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nullptr,
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nullptr);
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EXPECT_EQ(CL_INVALID_MEM_OBJECT, retVal);
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}
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HWTEST_F(EnqueueWriteBufferTypeTest, null_user_pointer) {
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auto data = 1;
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auto retVal = clEnqueueWriteBuffer(
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pCmdQ,
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srcBuffer.get(),
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false,
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0,
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sizeof(data),
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nullptr,
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0,
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nullptr,
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nullptr);
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EXPECT_EQ(CL_INVALID_VALUE, retVal);
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}
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HWTEST_F(EnqueueWriteBufferTypeTest, alignsToCSR_Blocking) {
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//this test case assumes IOQ
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auto &csr = pDevice->getUltCommandStreamReceiver<FamilyType>();
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csr.taskCount = pCmdQ->taskCount + 100;
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csr.taskLevel = pCmdQ->taskLevel + 50;
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auto oldCsrTaskLevel = csr.peekTaskLevel();
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srcBuffer->forceDisallowCPUCopy = true;
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EnqueueWriteBufferHelper<>::enqueueWriteBuffer(pCmdQ, srcBuffer.get(), CL_TRUE);
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EXPECT_EQ(csr.peekTaskCount(), pCmdQ->taskCount);
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EXPECT_EQ(oldCsrTaskLevel, pCmdQ->taskLevel);
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}
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HWTEST_F(EnqueueWriteBufferTypeTest, alignsToCSR_NonBlocking) {
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//this test case assumes IOQ
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auto &csr = pDevice->getUltCommandStreamReceiver<FamilyType>();
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csr.taskCount = pCmdQ->taskCount + 100;
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csr.taskLevel = pCmdQ->taskLevel + 50;
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EnqueueWriteBufferHelper<>::enqueueWriteBuffer(pCmdQ, srcBuffer.get(), CL_FALSE);
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EXPECT_EQ(csr.peekTaskCount(), pCmdQ->taskCount);
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EXPECT_EQ(csr.peekTaskLevel(), pCmdQ->taskLevel + 1);
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}
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HWCMDTEST_F(IGFX_GEN8_CORE, EnqueueWriteBufferTypeTest, GPGPUWalker) {
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typedef typename FamilyType::GPGPU_WALKER GPGPU_WALKER;
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srcBuffer->forceDisallowCPUCopy = true;
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enqueueWriteBuffer<FamilyType>();
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ASSERT_NE(cmdList.end(), itorWalker);
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auto *cmd = (GPGPU_WALKER *)*itorWalker;
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// Verify GPGPU_WALKER parameters
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EXPECT_NE(0u, cmd->getThreadGroupIdXDimension());
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EXPECT_NE(0u, cmd->getThreadGroupIdYDimension());
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EXPECT_NE(0u, cmd->getThreadGroupIdZDimension());
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EXPECT_NE(0u, cmd->getRightExecutionMask());
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EXPECT_NE(0u, cmd->getBottomExecutionMask());
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EXPECT_EQ(GPGPU_WALKER::SIMD_SIZE_SIMD32, cmd->getSimdSize());
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EXPECT_NE(0u, cmd->getIndirectDataLength());
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EXPECT_FALSE(cmd->getIndirectParameterEnable());
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// Compute the SIMD lane mask
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size_t simd =
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cmd->getSimdSize() == GPGPU_WALKER::SIMD_SIZE_SIMD32 ? 32 : cmd->getSimdSize() == GPGPU_WALKER::SIMD_SIZE_SIMD16 ? 16 : 8;
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uint64_t simdMask = (1ull << simd) - 1;
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// Mask off lanes based on the execution masks
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auto laneMaskRight = cmd->getRightExecutionMask() & simdMask;
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auto lanesPerThreadX = 0;
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while (laneMaskRight) {
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lanesPerThreadX += laneMaskRight & 1;
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laneMaskRight >>= 1;
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}
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}
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HWTEST_F(EnqueueWriteBufferTypeTest, bumpsTaskLevel) {
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auto taskLevelBefore = pCmdQ->taskLevel;
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srcBuffer->forceDisallowCPUCopy = true;
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EnqueueWriteBufferHelper<>::enqueueWriteBuffer(pCmdQ, srcBuffer.get(), EnqueueWriteBufferTraits::blocking);
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EXPECT_GT(pCmdQ->taskLevel, taskLevelBefore);
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}
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HWTEST_F(EnqueueWriteBufferTypeTest, addsCommands) {
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auto usedCmdBufferBefore = pCS->getUsed();
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srcBuffer->forceDisallowCPUCopy = true;
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EnqueueWriteBufferHelper<>::enqueueWriteBuffer(pCmdQ, srcBuffer.get(), EnqueueWriteBufferTraits::blocking);
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EXPECT_NE(usedCmdBufferBefore, pCS->getUsed());
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}
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HWTEST_F(EnqueueWriteBufferTypeTest, addsIndirectData) {
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auto dshBefore = pDSH->getUsed();
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auto iohBefore = pIOH->getUsed();
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auto sshBefore = pSSH->getUsed();
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srcBuffer->forceDisallowCPUCopy = true;
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EnqueueWriteBufferHelper<>::enqueueWriteBuffer(pCmdQ, srcBuffer.get(), EnqueueWriteBufferTraits::blocking);
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MultiDispatchInfo multiDispatchInfo;
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auto &builder = pCmdQ->getDevice().getExecutionEnvironment()->getBuiltIns()->getBuiltinDispatchInfoBuilder(EBuiltInOps::CopyBufferToBuffer,
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pCmdQ->getContext(), pCmdQ->getDevice());
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ASSERT_NE(nullptr, &builder);
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BuiltinDispatchInfoBuilder::BuiltinOpParams dc;
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dc.srcPtr = EnqueueWriteBufferTraits::hostPtr;
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dc.dstMemObj = srcBuffer.get();
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dc.dstOffset = {EnqueueWriteBufferTraits::offset, 0, 0};
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dc.size = {srcBuffer->getSize(), 0, 0};
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builder.buildDispatchInfos(multiDispatchInfo, dc);
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EXPECT_NE(0u, multiDispatchInfo.size());
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auto kernel = multiDispatchInfo.begin()->getKernel();
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EXPECT_TRUE(UnitTestHelper<FamilyType>::evaluateDshUsage(dshBefore, pDSH->getUsed(), kernel));
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EXPECT_NE(iohBefore, pIOH->getUsed());
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if (kernel->requiresSshForBuffers()) {
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EXPECT_NE(sshBefore, pSSH->getUsed());
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}
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}
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HWCMDTEST_F(IGFX_GEN8_CORE, EnqueueWriteBufferTypeTest, LoadRegisterImmediateL3CNTLREG) {
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srcBuffer->forceDisallowCPUCopy = true;
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enqueueWriteBuffer<FamilyType>();
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validateL3Programming<FamilyType>(cmdList, itorWalker);
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}
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HWCMDTEST_F(IGFX_GEN8_CORE, EnqueueWriteBufferTypeTest, WhenEnqueueIsDoneThenStateBaseAddressIsProperlyProgrammed) {
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srcBuffer->forceDisallowCPUCopy = true;
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enqueueWriteBuffer<FamilyType>();
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validateStateBaseAddress<FamilyType>(this->pDevice->getCommandStreamReceiver().getMemoryManager()->getInternalHeapBaseAddress(),
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pDSH, pIOH, pSSH, itorPipelineSelect, itorWalker, cmdList, 0llu);
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}
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HWCMDTEST_F(IGFX_GEN8_CORE, EnqueueWriteBufferTypeTest, MediaInterfaceDescriptorLoad) {
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typedef typename FamilyType::MEDIA_INTERFACE_DESCRIPTOR_LOAD MEDIA_INTERFACE_DESCRIPTOR_LOAD;
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typedef typename FamilyType::INTERFACE_DESCRIPTOR_DATA INTERFACE_DESCRIPTOR_DATA;
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srcBuffer->forceDisallowCPUCopy = true;
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enqueueWriteBuffer<FamilyType>();
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// All state should be programmed before walker
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auto itorCmd = find<MEDIA_INTERFACE_DESCRIPTOR_LOAD *>(itorPipelineSelect, itorWalker);
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ASSERT_NE(itorWalker, itorCmd);
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auto *cmd = (MEDIA_INTERFACE_DESCRIPTOR_LOAD *)*itorCmd;
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// Verify we have a valid length -- multiple of INTERFACE_DESCRIPTOR_DATAs
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EXPECT_EQ(0u, cmd->getInterfaceDescriptorTotalLength() % sizeof(INTERFACE_DESCRIPTOR_DATA));
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// Validate the start address
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size_t alignmentStartAddress = 64 * sizeof(uint8_t);
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EXPECT_EQ(0u, cmd->getInterfaceDescriptorDataStartAddress() % alignmentStartAddress);
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// Validate the length
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EXPECT_NE(0u, cmd->getInterfaceDescriptorTotalLength());
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size_t alignmentTotalLength = 32 * sizeof(uint8_t);
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EXPECT_EQ(0u, cmd->getInterfaceDescriptorTotalLength() % alignmentTotalLength);
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// Generically validate this command
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FamilyType::PARSE::template validateCommand<MEDIA_INTERFACE_DESCRIPTOR_LOAD *>(cmdList.begin(), itorCmd);
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}
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HWCMDTEST_F(IGFX_GEN8_CORE, EnqueueWriteBufferTypeTest, InterfaceDescriptorData) {
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typedef typename FamilyType::MEDIA_INTERFACE_DESCRIPTOR_LOAD MEDIA_INTERFACE_DESCRIPTOR_LOAD;
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typedef typename FamilyType::STATE_BASE_ADDRESS STATE_BASE_ADDRESS;
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typedef typename FamilyType::INTERFACE_DESCRIPTOR_DATA INTERFACE_DESCRIPTOR_DATA;
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srcBuffer->forceDisallowCPUCopy = true;
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enqueueWriteBuffer<FamilyType>();
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// Extract the MIDL command
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auto itorCmd = find<MEDIA_INTERFACE_DESCRIPTOR_LOAD *>(itorPipelineSelect, itorWalker);
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ASSERT_NE(itorWalker, itorCmd);
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auto *cmdMIDL = (MEDIA_INTERFACE_DESCRIPTOR_LOAD *)*itorCmd;
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// Extract the SBA command
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itorCmd = find<STATE_BASE_ADDRESS *>(cmdList.begin(), itorWalker);
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ASSERT_NE(itorWalker, itorCmd);
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auto *cmdSBA = (STATE_BASE_ADDRESS *)*itorCmd;
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// Extrach the DSH
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auto DSH = cmdSBA->getDynamicStateBaseAddress();
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ASSERT_NE(0u, DSH);
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// IDD should be located within DSH
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auto iddStart = cmdMIDL->getInterfaceDescriptorDataStartAddress();
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auto IDDEnd = iddStart + cmdMIDL->getInterfaceDescriptorTotalLength();
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ASSERT_LE(IDDEnd, cmdSBA->getDynamicStateBufferSize() * MemoryConstants::pageSize);
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// Extract the IDD
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auto &IDD = *(INTERFACE_DESCRIPTOR_DATA *)(DSH + iddStart);
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// Validate the kernel start pointer. Technically, a kernel can start at address 0 but let's force a value.
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auto kernelStartPointer = ((uint64_t)IDD.getKernelStartPointerHigh() << 32) + IDD.getKernelStartPointer();
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EXPECT_LE(kernelStartPointer, cmdSBA->getInstructionBufferSize() * MemoryConstants::pageSize);
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EXPECT_NE(0u, IDD.getNumberOfThreadsInGpgpuThreadGroup());
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EXPECT_NE(0u, IDD.getCrossThreadConstantDataReadLength());
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EXPECT_NE(0u, IDD.getConstantIndirectUrbEntryReadLength());
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}
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HWCMDTEST_F(IGFX_GEN8_CORE, EnqueueWriteBufferTypeTest, PipelineSelect) {
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srcBuffer->forceDisallowCPUCopy = true;
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enqueueWriteBuffer<FamilyType>();
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int numCommands = getNumberOfPipelineSelectsThatEnablePipelineSelect<FamilyType>();
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EXPECT_EQ(1, numCommands);
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}
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HWCMDTEST_F(IGFX_GEN8_CORE, EnqueueWriteBufferTypeTest, MediaVFEState) {
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srcBuffer->forceDisallowCPUCopy = true;
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enqueueWriteBuffer<FamilyType>();
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validateMediaVFEState<FamilyType>(&pDevice->getHardwareInfo(), cmdMediaVfeState, cmdList, itorMediaVfeState);
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}
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HWTEST_F(EnqueueWriteBufferTypeTest, givenOOQWithEnabledSupportCpuCopiesAndDstPtrEqualSrcPtrAndZeroCopyBufferTrueWhenWriteBufferIsExecutedThenTaskLevelNotIncreased) {
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DebugManagerStateRestore dbgRestore;
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DebugManager.flags.DoCpuCopyOnWriteBuffer.set(true);
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cl_int retVal = CL_SUCCESS;
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std::unique_ptr<CommandQueue> pCmdOOQ(createCommandQueue(pDevice, CL_QUEUE_OUT_OF_ORDER_EXEC_MODE_ENABLE));
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void *ptr = zeroCopyBuffer->getCpuAddressForMemoryTransfer();
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EXPECT_EQ(retVal, CL_SUCCESS);
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retVal = pCmdOOQ->enqueueWriteBuffer(zeroCopyBuffer.get(),
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CL_FALSE,
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0,
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MemoryConstants::cacheLineSize,
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ptr,
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0,
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nullptr,
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nullptr);
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EXPECT_EQ(CL_SUCCESS, retVal);
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EXPECT_EQ(pCmdOOQ->taskLevel, 0u);
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pCmdOOQ->flush();
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}
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HWTEST_F(EnqueueWriteBufferTypeTest, givenOOQWithDisabledSupportCpuCopiesAndDstPtrEqualSrcPtrZeroCopyBufferWhenWriteBufferIsExecutedThenTaskLevelNotIncreased) {
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DebugManagerStateRestore dbgRestore;
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DebugManager.flags.DoCpuCopyOnWriteBuffer.set(false);
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cl_int retVal = CL_SUCCESS;
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std::unique_ptr<CommandQueue> pCmdOOQ(createCommandQueue(pDevice, CL_QUEUE_OUT_OF_ORDER_EXEC_MODE_ENABLE));
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void *ptr = srcBuffer->getCpuAddressForMemoryTransfer();
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EXPECT_EQ(retVal, CL_SUCCESS);
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retVal = pCmdOOQ->enqueueWriteBuffer(zeroCopyBuffer.get(),
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CL_FALSE,
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0,
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MemoryConstants::cacheLineSize,
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ptr,
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0,
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nullptr,
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nullptr);
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EXPECT_EQ(CL_SUCCESS, retVal);
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EXPECT_EQ(pCmdOOQ->taskLevel, 0u);
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pCmdOOQ->flush();
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}
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HWTEST_F(EnqueueWriteBufferTypeTest, givenInOrderQueueAndEnabledSupportCpuCopiesAndDstPtrZeroCopyBufferEqualSrcPtrWhenWriteBufferIsExecutedThenTaskLevelShouldNotBeIncreased) {
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DebugManagerStateRestore dbgRestore;
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DebugManager.flags.DoCpuCopyOnWriteBuffer.set(true);
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cl_int retVal = CL_SUCCESS;
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void *ptr = zeroCopyBuffer->getCpuAddressForMemoryTransfer();
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EXPECT_EQ(retVal, CL_SUCCESS);
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retVal = pCmdQ->enqueueWriteBuffer(zeroCopyBuffer.get(),
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CL_FALSE,
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0,
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MemoryConstants::cacheLineSize,
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ptr,
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0,
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nullptr,
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nullptr);
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EXPECT_EQ(CL_SUCCESS, retVal);
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EXPECT_EQ(pCmdQ->taskLevel, 0u);
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}
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HWTEST_F(EnqueueWriteBufferTypeTest, givenInOrderQueueAndDisabledSupportCpuCopiesAndDstPtrZeroCopyBufferEqualSrcPtrWhenWriteBufferIsExecutedThenTaskLevelShouldNotBeIncreased) {
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DebugManagerStateRestore dbgRestore;
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DebugManager.flags.DoCpuCopyOnWriteBuffer.set(false);
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cl_int retVal = CL_SUCCESS;
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void *ptr = zeroCopyBuffer->getCpuAddressForMemoryTransfer();
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EXPECT_EQ(retVal, CL_SUCCESS);
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retVal = pCmdQ->enqueueWriteBuffer(zeroCopyBuffer.get(),
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CL_FALSE,
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0,
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MemoryConstants::cacheLineSize,
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ptr,
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0,
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nullptr,
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nullptr);
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EXPECT_EQ(CL_SUCCESS, retVal);
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EXPECT_EQ(pCmdQ->taskLevel, 0u);
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}
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HWTEST_F(EnqueueWriteBufferTypeTest, givenInOrderQueueAndDisabledSupportCpuCopiesAndDstPtrZeroCopyBufferEqualSrcPtrWhenWriteBufferIsExecutedThenTaskLevelShouldBeIncreased) {
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DebugManagerStateRestore dbgRestore;
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DebugManager.flags.DoCpuCopyOnWriteBuffer.set(false);
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cl_int retVal = CL_SUCCESS;
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void *ptr = srcBuffer->getCpuAddressForMemoryTransfer();
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EXPECT_EQ(retVal, CL_SUCCESS);
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retVal = pCmdQ->enqueueWriteBuffer(srcBuffer.get(),
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CL_FALSE,
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0,
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MemoryConstants::cacheLineSize,
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ptr,
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0,
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nullptr,
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nullptr);
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EXPECT_EQ(CL_SUCCESS, retVal);
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EXPECT_EQ(pCmdQ->taskLevel, 1u);
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}
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HWTEST_F(EnqueueWriteBufferTypeTest, givenInOrderQueueAndEnabledSupportCpuCopiesAndDstPtrNonZeroCopyBufferEqualSrcPtrWhenWriteBufferIsExecutedThenTaskLevelShouldBeIncreased) {
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DebugManagerStateRestore dbgRestore;
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DebugManager.flags.DoCpuCopyOnWriteBuffer.set(true);
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cl_int retVal = CL_SUCCESS;
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void *ptr = srcBuffer->getCpuAddressForMemoryTransfer();
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EXPECT_EQ(retVal, CL_SUCCESS);
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retVal = pCmdQ->enqueueWriteBuffer(srcBuffer.get(),
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CL_FALSE,
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0,
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MemoryConstants::cacheLineSize,
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ptr,
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0,
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nullptr,
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nullptr);
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EXPECT_EQ(CL_SUCCESS, retVal);
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EXPECT_EQ(pCmdQ->taskLevel, 1u);
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}
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using NegativeFailAllocationTest = Test<NegativeFailAllocationCommandEnqueueBaseFixture>;
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HWTEST_F(NegativeFailAllocationTest, givenEnqueueWriteBufferWhenHostPtrAllocationCreationFailsThenReturnOutOfResource) {
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cl_int retVal = CL_SUCCESS;
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retVal = pCmdQ->enqueueWriteBuffer(buffer.get(),
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CL_FALSE,
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0,
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MemoryConstants::cacheLineSize,
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ptr,
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0,
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nullptr,
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nullptr);
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EXPECT_EQ(CL_OUT_OF_RESOURCES, retVal);
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}
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