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refactor: use common indirectDataAlignment static constexpr value

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Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
This commit is contained in:
Kamil Kopryk
2024-02-15 14:15:06 +00:00
committed by Compute-Runtime-Automation
parent cc1732c930
commit 0c5cba8ebd
4 changed files with 11 additions and 17 deletions
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8
opencl/source/helpers/hardware_commands_helper_xehp_and_later.inl
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@@ -61,11 +61,7 @@ size_t HardwareCommandsHelper<GfxFamily>::sendCrossThreadData(
uint32_t &sizeCrossThreadData, uint32_t &sizeCrossThreadData,
[[maybe_unused]] uint64_t scratchAddress) { [[maybe_unused]] uint64_t scratchAddress) {
constexpr bool heaplessModeEnabled = GfxFamily::template isHeaplessMode<WalkerType>(); indirectHeap.align(GfxFamily::indirectDataAlignment);
if constexpr (heaplessModeEnabled == false) {
indirectHeap.align(WalkerType::INDIRECTDATASTARTADDRESS_ALIGN_SIZE);
}
auto offsetCrossThreadData = indirectHeap.getUsed(); auto offsetCrossThreadData = indirectHeap.getUsed();
char *dest = nullptr; char *dest = nullptr;
@@ -120,6 +116,8 @@ size_t HardwareCommandsHelper<GfxFamily>::sendCrossThreadData(
memcpy_s(dest, sizeCrossThreadData, src, sizeCrossThreadData); memcpy_s(dest, sizeCrossThreadData, src, sizeCrossThreadData);
} }
constexpr bool heaplessModeEnabled = GfxFamily::template isHeaplessMode<WalkerType>();
if constexpr (heaplessModeEnabled) { if constexpr (heaplessModeEnabled) {
auto device = kernel.getContext().getDevice(0); auto device = kernel.getContext().getDevice(0);
uint64_t indirectDataAddress = device->getMemoryManager()->getInternalHeapBaseAddress(device->getRootDeviceIndex(), indirectHeap.getGraphicsAllocation()->isAllocatedInLocalMemoryPool()); uint64_t indirectDataAddress = device->getMemoryManager()->getInternalHeapBaseAddress(device->getRootDeviceIndex(), indirectHeap.getGraphicsAllocation()->isAllocatedInLocalMemoryPool());

14
shared/source/helpers/uint16_avx2.h
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@@ -53,11 +53,8 @@ struct uint16x16_t { // NOLINT(readability-identifier-naming)
} }
inline void load(const void *alignedPtr) { inline void load(const void *alignedPtr) {
if (isAligned<32>(alignedPtr)) { DEBUG_BREAK_IF(!isAligned<32>(alignedPtr));
value = _mm256_load_si256(reinterpret_cast<const __m256i *>(alignedPtr)); // AVX value = _mm256_load_si256(reinterpret_cast<const __m256i *>(alignedPtr)); // AVX
} else {
loadUnaligned(alignedPtr);
}
} }
inline void loadUnaligned(const void *ptr) { inline void loadUnaligned(const void *ptr) {
@@ -65,11 +62,8 @@ struct uint16x16_t { // NOLINT(readability-identifier-naming)
} }
inline void store(void *alignedPtr) { inline void store(void *alignedPtr) {
if (isAligned<32>(alignedPtr)) { DEBUG_BREAK_IF(!isAligned<32>(alignedPtr));
_mm256_store_si256(reinterpret_cast<__m256i *>(alignedPtr), value); // AVX _mm256_store_si256(reinterpret_cast<__m256i *>(alignedPtr), value); // AVX
} else {
storeUnaligned(alignedPtr);
}
} }
inline void storeUnaligned(void *ptr) { inline void storeUnaligned(void *ptr) {

3
shared/source/xe_hpc_core/hw_cmds_xe_hpc_core_base.h
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@@ -1,5 +1,5 @@
/* /*
* Copyright (C) 2021-2023 Intel Corporation * Copyright (C) 2021-2024 Intel Corporation
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT
* *
@@ -129,6 +129,7 @@ struct XeHpcCoreFamily : public XeHpcCore {
static const STATE_SYSTEM_MEM_FENCE_ADDRESS cmdInitStateSystemMemFenceAddress; static const STATE_SYSTEM_MEM_FENCE_ADDRESS cmdInitStateSystemMemFenceAddress;
static constexpr bool isQwordInOrderCounter = false; static constexpr bool isQwordInOrderCounter = false;
static constexpr bool walkerPostSyncSupport = true; static constexpr bool walkerPostSyncSupport = true;
static constexpr size_t indirectDataAlignment = COMPUTE_WALKER::INDIRECTDATASTARTADDRESS_ALIGN_SIZE;
static constexpr bool supportsCmdSet(GFXCORE_FAMILY cmdSetBaseFamily) { static constexpr bool supportsCmdSet(GFXCORE_FAMILY cmdSetBaseFamily) {
return cmdSetBaseFamily == IGFX_XE_HP_CORE; return cmdSetBaseFamily == IGFX_XE_HP_CORE;

3
shared/source/xe_hpg_core/hw_cmds_xe_hpg_core_base.h
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@@ -1,5 +1,5 @@
/* /*
* Copyright (C) 2021-2023 Intel Corporation * Copyright (C) 2021-2024 Intel Corporation
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT
* *
@@ -145,6 +145,7 @@ struct XeHpgCoreFamily : public XeHpgCore {
static const STATE_SIP cmdInitStateSip; static const STATE_SIP cmdInitStateSip;
static constexpr bool isQwordInOrderCounter = false; static constexpr bool isQwordInOrderCounter = false;
static constexpr bool walkerPostSyncSupport = true; static constexpr bool walkerPostSyncSupport = true;
static constexpr size_t indirectDataAlignment = COMPUTE_WALKER::INDIRECTDATASTARTADDRESS_ALIGN_SIZE;
static constexpr bool supportsCmdSet(GFXCORE_FAMILY cmdSetBaseFamily) { static constexpr bool supportsCmdSet(GFXCORE_FAMILY cmdSetBaseFamily) {
return cmdSetBaseFamily == IGFX_XE_HP_CORE; return cmdSetBaseFamily == IGFX_XE_HP_CORE;