performance: add debug key to control cpu cacheablitiy

Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
This commit is contained in:
Michal Mrozek
2024-06-19 09:52:20 +00:00
committed by Compute-Runtime-Automation
parent f7888fac0d
commit 0e29ab8387
4 changed files with 22 additions and 0 deletions

View File

@@ -377,6 +377,7 @@ AllowUnrestrictedSize = 0
ForceDefaultThreadArbitrationPolicyIfNotSpecified = 0
DoNotFreeResources = 0
OverrideGmmResourceUsageField = -1
OverrideGmmCacheableField = -1
LogAllocationType = 0
LogAllocationStdout = 0
ProgramExtendedPipeControlPriorToNonPipelinedStateCommand = -1