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Change DebugMode and TdCtl registers on xehp

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- refactor tests to use UnitTestHelper

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
This commit is contained in:
Mateusz Hoppe
2021-09-23 16:46:42 +00:00
committed by Compute-Runtime-Automation
parent e7a7a61b4e
commit 0e58821455
12 changed files with 190 additions and 8 deletions
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27
shared/test/common/gen11/test_preamble_gen11.cpp
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@@ -160,3 +160,30 @@ GEN11TEST_F(ThreadArbitrationGen11, whenGetSupportThreadArbitrationPoliciesIsCal
supportedPolicies.end(),
ThreadArbitrationPolicy::RoundRobinAfterDependency));
}
using PreambleFixtureGen11 = PreambleFixture;
GEN11TEST_F(PreambleFixtureGen11, whenKernelDebuggingCommandsAreProgrammedThenCorrectRegisterAddressesAndValuesAreSet) {
typedef typename FamilyType::MI_LOAD_REGISTER_IMM MI_LOAD_REGISTER_IMM;
auto bufferSize = PreambleHelper<FamilyType>::getKernelDebuggingCommandsSize(true);
auto buffer = std::unique_ptr<char[]>(new char[bufferSize]);
LinearStream stream(buffer.get(), bufferSize);
PreambleHelper<FamilyType>::programKernelDebugging(&stream);
HardwareParse hwParser;
hwParser.parseCommands<FamilyType>(stream);
auto cmdList = hwParser.getCommandsList<MI_LOAD_REGISTER_IMM>();
ASSERT_EQ(2u, cmdList.size());
auto it = cmdList.begin();
MI_LOAD_REGISTER_IMM *pCmd = reinterpret_cast<MI_LOAD_REGISTER_IMM *>(*it);
EXPECT_EQ(0x20d8u, pCmd->getRegisterOffset());
EXPECT_EQ((1u << 5) | (1u << 21), pCmd->getDataDword());
it++;
pCmd = reinterpret_cast<MI_LOAD_REGISTER_IMM *>(*it);
EXPECT_EQ(0xe400u, pCmd->getRegisterOffset());
EXPECT_EQ((1u << 7) | (1u << 4), pCmd->getDataDword());
}

22
shared/test/common/gen11/unit_test_helper_gen11.cpp
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@@ -11,5 +11,27 @@
namespace NEO {
using Family = ICLFamily;
template <>
uint32_t UnitTestHelper<Family>::getDebugModeRegisterOffset() {
return 0x20d8;
}
template <>
uint32_t UnitTestHelper<Family>::getDebugModeRegisterValue() {
return (1u << 5) | (1u << 21);
}
template <>
uint32_t UnitTestHelper<Family>::getTdCtlRegisterOffset() {
return 0xe400;
}
template <>
uint32_t UnitTestHelper<Family>::getTdCtlRegisterValue() {
return (1u << 7) | (1u << 4);
}
template struct UnitTestHelper<ICLFamily>;
} // namespace NEO

28
shared/test/common/gen12lp/test_preamble_gen12lp.cpp
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@@ -203,3 +203,31 @@ GEN12LPTEST_F(PreemptionWatermarkGen12LP, WhenPreambleIsCreatedThenPreambleWorkA
expectedSize += PreambleHelper<FamilyType>::getKernelDebuggingCommandsSize(mockDevice.isDebuggerActive());
EXPECT_EQ(expectedSize, PreambleHelper<FamilyType>::getAdditionalCommandsSize(mockDevice));
}
using PreambleFixtureGen12lp = PreambleFixture;
GEN12LPTEST_F(PreambleFixtureGen12lp, whenKernelDebuggingCommandsAreProgrammedThenCorrectRegisterAddressesAndValuesAreSet) {
typedef typename FamilyType::MI_LOAD_REGISTER_IMM MI_LOAD_REGISTER_IMM;
auto bufferSize = PreambleHelper<FamilyType>::getKernelDebuggingCommandsSize(true);
auto buffer = std::unique_ptr<char[]>(new char[bufferSize]);
LinearStream stream(buffer.get(), bufferSize);
PreambleHelper<FamilyType>::programKernelDebugging(&stream);
HardwareParse hwParser;
hwParser.parseCommands<FamilyType>(stream);
auto cmdList = hwParser.getCommandsList<MI_LOAD_REGISTER_IMM>();
ASSERT_EQ(2u, cmdList.size());
auto it = cmdList.begin();
MI_LOAD_REGISTER_IMM *pCmd = reinterpret_cast<MI_LOAD_REGISTER_IMM *>(*it);
EXPECT_EQ(0x20d8u, pCmd->getRegisterOffset());
EXPECT_EQ((1u << 5) | (1u << 21), pCmd->getDataDword());
it++;
pCmd = reinterpret_cast<MI_LOAD_REGISTER_IMM *>(*it);
EXPECT_EQ(0xe400u, pCmd->getRegisterOffset());
EXPECT_EQ((1u << 7) | (1u << 4), pCmd->getDataDword());
}

20
shared/test/common/gen12lp/unit_test_helper_gen12lp.cpp
View File

@@ -30,5 +30,25 @@ bool UnitTestHelper<Family>::isPipeControlWArequired(const HardwareInfo &hwInfo)
return SpecialUltHelperGen12lp::isPipeControlWArequired(hwInfo.platform.eProductFamily);
}
template <>
uint32_t UnitTestHelper<Family>::getDebugModeRegisterOffset() {
return 0x20d8;
}
template <>
uint32_t UnitTestHelper<Family>::getDebugModeRegisterValue() {
return (1u << 5) | (1u << 21);
}
template <>
uint32_t UnitTestHelper<Family>::getTdCtlRegisterOffset() {
return 0xe400;
}
template <>
uint32_t UnitTestHelper<Family>::getTdCtlRegisterValue() {
return (1u << 7) | (1u << 4);
}
template struct UnitTestHelper<Family>;
} // namespace NEO

22
shared/test/common/gen8/unit_test_helper_gen8.cpp
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@@ -11,5 +11,27 @@
namespace NEO {
using Family = BDWFamily;
template <>
uint32_t UnitTestHelper<Family>::getDebugModeRegisterOffset() {
return 0x20ec;
}
template <>
uint32_t UnitTestHelper<Family>::getDebugModeRegisterValue() {
return (1u << 6) | (1u << 22);
}
template <>
uint32_t UnitTestHelper<Family>::getTdCtlRegisterOffset() {
return 0xe400;
}
template <>
uint32_t UnitTestHelper<Family>::getTdCtlRegisterValue() {
return (1u << 7) | (1u << 4);
}
template struct UnitTestHelper<BDWFamily>;
} // namespace NEO

20
shared/test/common/gen9/unit_test_helper_gen9.cpp
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@@ -17,5 +17,25 @@ bool UnitTestHelper<Family>::isPipeControlWArequired(const HardwareInfo &hwInfo)
return true;
}
template <>
uint32_t UnitTestHelper<Family>::getDebugModeRegisterOffset() {
return 0x20ec;
}
template <>
uint32_t UnitTestHelper<Family>::getDebugModeRegisterValue() {
return (1u << 6) | (1u << 22);
}
template <>
uint32_t UnitTestHelper<Family>::getTdCtlRegisterOffset() {
return 0xe400;
}
template <>
uint32_t UnitTestHelper<Family>::getTdCtlRegisterValue() {
return (1u << 7) | (1u << 4);
}
template struct UnitTestHelper<Family>;
} // namespace NEO

5
shared/test/common/helpers/unit_test_helper.h
View File

@@ -51,6 +51,11 @@ struct UnitTestHelper {
static void setExtraMidThreadPreemptionFlag(HardwareInfo &hwInfo, bool value);
static uint32_t getDebugModeRegisterOffset();
static uint32_t getDebugModeRegisterValue();
static uint32_t getTdCtlRegisterOffset();
static uint32_t getTdCtlRegisterValue();
static const bool tiledImagesSupported;
static const uint32_t smallestTestableSimdSize;

20
shared/test/common/xe_hp_core/unit_test_helper_xe_hp_core.cpp
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@@ -18,5 +18,25 @@ const AuxTranslationMode UnitTestHelper<Family>::requiredAuxTranslationMode = Au
template <>
const bool UnitTestHelper<Family>::additionalMiFlushDwRequired = true;
template <>
uint32_t UnitTestHelper<Family>::getDebugModeRegisterOffset() {
return 0x20d8;
}
template <>
uint32_t UnitTestHelper<Family>::getDebugModeRegisterValue() {
return (1u << 5) | (1u << 21);
}
template <>
uint32_t UnitTestHelper<Family>::getTdCtlRegisterOffset() {
return 0xe400;
}
template <>
uint32_t UnitTestHelper<Family>::getTdCtlRegisterValue() {
return (1u << 7) | (1u << 4) | (1u << 2) | (1u << 0);
}
template struct UnitTestHelper<Family>;
} // namespace NEO