Linux: Obtain gpu adress space dynamically

Change-Id: I86796e5759d81b84a9dce7c6d57e5de7b68400ac
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
This commit is contained in:
Dunajski, Bartosz
2019-12-17 15:17:52 +01:00
committed by sys_ocldev
parent 74a38386a4
commit 18779537bb
7 changed files with 58 additions and 18 deletions

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@@ -113,15 +113,16 @@ std::string Drm::getSysFsPciPath(int deviceID) {
return nullPath;
}
bool Drm::is48BitAddressRangeSupported() {
int Drm::queryGttSize(uint64_t &gttSizeOutput) {
drm_i915_gem_context_param contextParam = {0};
contextParam.param = I915_CONTEXT_PARAM_GTT_SIZE;
auto ret = ioctl(DRM_IOCTL_I915_GEM_CONTEXT_GETPARAM, &contextParam);
int ret = ioctl(DRM_IOCTL_I915_GEM_CONTEXT_GETPARAM, &contextParam);
if (ret == 0) {
return contextParam.value > MemoryConstants::max64BitAppAddress;
gttSizeOutput = contextParam.value;
}
return true;
return ret;
}
void Drm::checkPreemptionSupport() {

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@@ -60,7 +60,7 @@ class Drm {
int getEnabledPooledEu(int &enabled);
int getMinEuInPool(int &minEUinPool);
bool is48BitAddressRangeSupported();
int queryGttSize(uint64_t &gttSizeOutput);
bool isPreemptionSupported() const { return preemptionSupported; }
MOCKABLE_VIRTUAL void checkPreemptionSupport();
int getFileDescriptor() const { return fd; }

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@@ -109,7 +109,15 @@ int HwInfoConfig::configureHwInfo(const HardwareInfo *inHwInfo, HardwareInfo *ou
}
gtSystemInfo->SubSliceCount = static_cast<uint32_t>(subSliceCount);
featureTable->ftrSVM = drm->is48BitAddressRangeSupported();
uint64_t gttSizeQuery = 0;
featureTable->ftrSVM = true;
ret = drm->queryGttSize(gttSizeQuery);
if (ret == 0) {
featureTable->ftrSVM = (gttSizeQuery > MemoryConstants::max64BitAppAddress);
outHwInfo->capabilityTable.gpuAddressSpace = gttSizeQuery - 1; // gttSizeQuery = (1 << bits)
}
int maxGpuFreq = 0;
drm->getMaxGpuFrequency(maxGpuFreq);

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@@ -92,7 +92,7 @@ int DrmMock::ioctl(unsigned long request, void *arg) {
receivedContextParamRequest = *static_cast<drm_i915_gem_context_param *>(arg);
if (receivedContextParamRequest.param == I915_CONTEXT_PARAM_GTT_SIZE) {
static_cast<drm_i915_gem_context_param *>(arg)->value = this->storedGTTSize;
return this->StoredRetVal;
return this->StoredRetValForGetGttSize;
}
if (receivedContextParamRequest.param == I915_CONTEXT_PARAM_SSEU) {
if (StoredRetValForGetSSEU == 0) {

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@@ -87,6 +87,7 @@ class DrmMock : public Drm {
int StoredHasPooledEU = 1;
int StoredMinEUinPool = 1;
int StoredRetVal = 0;
int StoredRetValForGetGttSize = 0;
int StoredRetValForGetSSEU = 0;
int StoredRetValForSetSSEU = 0;
int StoredRetValForDeviceID = 0;

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@@ -119,18 +119,19 @@ TEST(DrmTest, GetRevisionID) {
delete pDrm;
}
TEST(DrmTest, GivenDrmWhenAskedFor48BitAddressCorrectValueReturned) {
TEST(DrmTest, GivenDrmWhenAskedForGttSizeThenReturnCorrectValue) {
auto drm = make_unique<DrmMock>();
EXPECT_TRUE(drm->is48BitAddressRangeSupported());
drm->StoredRetVal = -1;
EXPECT_TRUE(drm->is48BitAddressRangeSupported());
drm->StoredRetVal = 0;
uint64_t queryGttSize = 0;
drm->StoredRetValForGetGttSize = 0;
drm->storedGTTSize = 1ull << 31;
EXPECT_FALSE(drm->is48BitAddressRangeSupported());
drm->storedGTTSize = MemoryConstants::max64BitAppAddress + 1;
EXPECT_TRUE(drm->is48BitAddressRangeSupported());
drm->storedGTTSize = MemoryConstants::max64BitAppAddress;
EXPECT_FALSE(drm->is48BitAddressRangeSupported());
EXPECT_EQ(0, drm->queryGttSize(queryGttSize));
EXPECT_EQ(drm->storedGTTSize, queryGttSize);
queryGttSize = 0;
drm->StoredRetValForGetGttSize = -1;
EXPECT_NE(0, drm->queryGttSize(queryGttSize));
EXPECT_EQ(0u, queryGttSize);
}
TEST(DrmTest, GivenDrmWhenAskedForPreemptionCorrectValueReturned) {

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@@ -393,3 +393,32 @@ TEST_F(HwInfoConfigTestLinuxDummy, givenInstrumentationForHardwareIsEnabledOrDis
ASSERT_EQ(0, ret);
EXPECT_TRUE(outHwInfo.capabilityTable.instrumentationEnabled == haveInstrumentation);
}
TEST_F(HwInfoConfigTestLinuxDummy, givenGttSizeReturnedWhenInitializingHwInfoThenSetSvmFtr) {
drm->storedGTTSize = MemoryConstants::max64BitAppAddress;
int ret = hwConfig.configureHwInfo(&pInHwInfo, &outHwInfo, osInterface);
EXPECT_EQ(0, ret);
EXPECT_FALSE(outHwInfo.capabilityTable.ftrSvm);
drm->storedGTTSize = MemoryConstants::max64BitAppAddress + 1;
ret = hwConfig.configureHwInfo(&pInHwInfo, &outHwInfo, osInterface);
EXPECT_EQ(0, ret);
EXPECT_TRUE(outHwInfo.capabilityTable.ftrSvm);
}
TEST_F(HwInfoConfigTestLinuxDummy, givenGttSizeReturnedWhenInitializingHwInfoThenSetGpuAddressSpace) {
drm->storedGTTSize = maxNBitValue(40) + 1;
int ret = hwConfig.configureHwInfo(&pInHwInfo, &outHwInfo, osInterface);
EXPECT_EQ(0, ret);
EXPECT_EQ(drm->storedGTTSize - 1, outHwInfo.capabilityTable.gpuAddressSpace);
}
TEST_F(HwInfoConfigTestLinuxDummy, givenFailingGttSizeIoctlWhenInitializingHwInfoThenSetDefaultValues) {
drm->StoredRetValForGetGttSize = -1;
int ret = hwConfig.configureHwInfo(&pInHwInfo, &outHwInfo, osInterface);
EXPECT_EQ(0, ret);
EXPECT_TRUE(outHwInfo.capabilityTable.ftrSvm);
EXPECT_NE(0u, outHwInfo.capabilityTable.gpuAddressSpace);
EXPECT_EQ(pInHwInfo.capabilityTable.gpuAddressSpace, outHwInfo.capabilityTable.gpuAddressSpace);
}