mirror of
https://github.com/intel/compute-runtime.git
synced 2026-01-08 14:02:58 +08:00
Linux: Obtain gpu adress space dynamically
Change-Id: I86796e5759d81b84a9dce7c6d57e5de7b68400ac Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
This commit is contained in:
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sys_ocldev
parent
74a38386a4
commit
18779537bb
@@ -113,15 +113,16 @@ std::string Drm::getSysFsPciPath(int deviceID) {
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return nullPath;
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}
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bool Drm::is48BitAddressRangeSupported() {
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int Drm::queryGttSize(uint64_t >tSizeOutput) {
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drm_i915_gem_context_param contextParam = {0};
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contextParam.param = I915_CONTEXT_PARAM_GTT_SIZE;
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auto ret = ioctl(DRM_IOCTL_I915_GEM_CONTEXT_GETPARAM, &contextParam);
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int ret = ioctl(DRM_IOCTL_I915_GEM_CONTEXT_GETPARAM, &contextParam);
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if (ret == 0) {
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return contextParam.value > MemoryConstants::max64BitAppAddress;
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gttSizeOutput = contextParam.value;
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}
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return true;
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return ret;
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}
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void Drm::checkPreemptionSupport() {
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@@ -60,7 +60,7 @@ class Drm {
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int getEnabledPooledEu(int &enabled);
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int getMinEuInPool(int &minEUinPool);
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bool is48BitAddressRangeSupported();
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int queryGttSize(uint64_t >tSizeOutput);
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bool isPreemptionSupported() const { return preemptionSupported; }
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MOCKABLE_VIRTUAL void checkPreemptionSupport();
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int getFileDescriptor() const { return fd; }
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@@ -109,7 +109,15 @@ int HwInfoConfig::configureHwInfo(const HardwareInfo *inHwInfo, HardwareInfo *ou
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}
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gtSystemInfo->SubSliceCount = static_cast<uint32_t>(subSliceCount);
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featureTable->ftrSVM = drm->is48BitAddressRangeSupported();
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uint64_t gttSizeQuery = 0;
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featureTable->ftrSVM = true;
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ret = drm->queryGttSize(gttSizeQuery);
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if (ret == 0) {
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featureTable->ftrSVM = (gttSizeQuery > MemoryConstants::max64BitAppAddress);
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outHwInfo->capabilityTable.gpuAddressSpace = gttSizeQuery - 1; // gttSizeQuery = (1 << bits)
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}
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int maxGpuFreq = 0;
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drm->getMaxGpuFrequency(maxGpuFreq);
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@@ -92,7 +92,7 @@ int DrmMock::ioctl(unsigned long request, void *arg) {
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receivedContextParamRequest = *static_cast<drm_i915_gem_context_param *>(arg);
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if (receivedContextParamRequest.param == I915_CONTEXT_PARAM_GTT_SIZE) {
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static_cast<drm_i915_gem_context_param *>(arg)->value = this->storedGTTSize;
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return this->StoredRetVal;
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return this->StoredRetValForGetGttSize;
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}
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if (receivedContextParamRequest.param == I915_CONTEXT_PARAM_SSEU) {
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if (StoredRetValForGetSSEU == 0) {
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@@ -87,6 +87,7 @@ class DrmMock : public Drm {
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int StoredHasPooledEU = 1;
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int StoredMinEUinPool = 1;
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int StoredRetVal = 0;
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int StoredRetValForGetGttSize = 0;
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int StoredRetValForGetSSEU = 0;
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int StoredRetValForSetSSEU = 0;
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int StoredRetValForDeviceID = 0;
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@@ -119,18 +119,19 @@ TEST(DrmTest, GetRevisionID) {
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delete pDrm;
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}
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TEST(DrmTest, GivenDrmWhenAskedFor48BitAddressCorrectValueReturned) {
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TEST(DrmTest, GivenDrmWhenAskedForGttSizeThenReturnCorrectValue) {
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auto drm = make_unique<DrmMock>();
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EXPECT_TRUE(drm->is48BitAddressRangeSupported());
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drm->StoredRetVal = -1;
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EXPECT_TRUE(drm->is48BitAddressRangeSupported());
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drm->StoredRetVal = 0;
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uint64_t queryGttSize = 0;
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drm->StoredRetValForGetGttSize = 0;
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drm->storedGTTSize = 1ull << 31;
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EXPECT_FALSE(drm->is48BitAddressRangeSupported());
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drm->storedGTTSize = MemoryConstants::max64BitAppAddress + 1;
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EXPECT_TRUE(drm->is48BitAddressRangeSupported());
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drm->storedGTTSize = MemoryConstants::max64BitAppAddress;
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EXPECT_FALSE(drm->is48BitAddressRangeSupported());
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EXPECT_EQ(0, drm->queryGttSize(queryGttSize));
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EXPECT_EQ(drm->storedGTTSize, queryGttSize);
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queryGttSize = 0;
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drm->StoredRetValForGetGttSize = -1;
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EXPECT_NE(0, drm->queryGttSize(queryGttSize));
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EXPECT_EQ(0u, queryGttSize);
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}
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TEST(DrmTest, GivenDrmWhenAskedForPreemptionCorrectValueReturned) {
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@@ -393,3 +393,32 @@ TEST_F(HwInfoConfigTestLinuxDummy, givenInstrumentationForHardwareIsEnabledOrDis
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ASSERT_EQ(0, ret);
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EXPECT_TRUE(outHwInfo.capabilityTable.instrumentationEnabled == haveInstrumentation);
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}
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TEST_F(HwInfoConfigTestLinuxDummy, givenGttSizeReturnedWhenInitializingHwInfoThenSetSvmFtr) {
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drm->storedGTTSize = MemoryConstants::max64BitAppAddress;
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int ret = hwConfig.configureHwInfo(&pInHwInfo, &outHwInfo, osInterface);
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EXPECT_EQ(0, ret);
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EXPECT_FALSE(outHwInfo.capabilityTable.ftrSvm);
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drm->storedGTTSize = MemoryConstants::max64BitAppAddress + 1;
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ret = hwConfig.configureHwInfo(&pInHwInfo, &outHwInfo, osInterface);
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EXPECT_EQ(0, ret);
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EXPECT_TRUE(outHwInfo.capabilityTable.ftrSvm);
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}
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TEST_F(HwInfoConfigTestLinuxDummy, givenGttSizeReturnedWhenInitializingHwInfoThenSetGpuAddressSpace) {
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drm->storedGTTSize = maxNBitValue(40) + 1;
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int ret = hwConfig.configureHwInfo(&pInHwInfo, &outHwInfo, osInterface);
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EXPECT_EQ(0, ret);
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EXPECT_EQ(drm->storedGTTSize - 1, outHwInfo.capabilityTable.gpuAddressSpace);
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}
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TEST_F(HwInfoConfigTestLinuxDummy, givenFailingGttSizeIoctlWhenInitializingHwInfoThenSetDefaultValues) {
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drm->StoredRetValForGetGttSize = -1;
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int ret = hwConfig.configureHwInfo(&pInHwInfo, &outHwInfo, osInterface);
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EXPECT_EQ(0, ret);
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EXPECT_TRUE(outHwInfo.capabilityTable.ftrSvm);
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EXPECT_NE(0u, outHwInfo.capabilityTable.gpuAddressSpace);
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EXPECT_EQ(pInHwInfo.capabilityTable.gpuAddressSpace, outHwInfo.capabilityTable.gpuAddressSpace);
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}
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