From 1f09d40e5a428f6d4494042e223e8946162a9bb1 Mon Sep 17 00:00:00 2001 From: Bartosz Dunajski Date: Wed, 8 Dec 2021 10:14:11 +0000 Subject: [PATCH] Add PVC unit test target Signed-off-by: Bartosz Dunajski --- shared/source/xe_hpc_core/hw_info_pvc.cpp | 17 +++++++++++++++++ target_unit_tests/xe_hpc_core/CMakeLists.txt | 9 +++++++++ .../xe_hpc_core/pvc/CMakeLists.txt | 9 +++++++++ .../xe_hpc_core/pvc/enable_pvc_testing.cmake | 10 ++++++++++ 4 files changed, 45 insertions(+) create mode 100644 target_unit_tests/xe_hpc_core/CMakeLists.txt create mode 100644 target_unit_tests/xe_hpc_core/pvc/CMakeLists.txt create mode 100644 target_unit_tests/xe_hpc_core/pvc/enable_pvc_testing.cmake diff --git a/shared/source/xe_hpc_core/hw_info_pvc.cpp b/shared/source/xe_hpc_core/hw_info_pvc.cpp index f4e59d1aa2..fa56aa0fdd 100644 --- a/shared/source/xe_hpc_core/hw_info_pvc.cpp +++ b/shared/source/xe_hpc_core/hw_info_pvc.cpp @@ -184,6 +184,23 @@ void PVC_CONFIG::setupHardwareInfoMultiTile(HardwareInfo *hwInfo, bool setupFeat gtSysInfo->IsL3HashModeEnabled = false; gtSysInfo->IsDynamicallyPopulated = false; + // non-zero values for unit tests + if (gtSysInfo->SliceCount == 0) { + gtSysInfo->SliceCount = 2; + gtSysInfo->SubSliceCount = 8; + gtSysInfo->EUCount = 40; + gtSysInfo->MaxEuPerSubSlice = gtSysInfo->EUCount / gtSysInfo->SubSliceCount; + gtSysInfo->MaxSlicesSupported = gtSysInfo->SliceCount; + gtSysInfo->MaxSubSlicesSupported = gtSysInfo->SubSliceCount; + + gtSysInfo->L3BankCount = 1; + + gtSysInfo->CCSInfo.IsValid = true; + gtSysInfo->CCSInfo.NumberOfCCSEnabled = 1; + + hwInfo->featureTable.ftrBcsInfo = 1; + } + if (setupFeatureTableAndWorkaroundTable) { PVC::setupFeatureAndWorkaroundTable(hwInfo); } diff --git a/target_unit_tests/xe_hpc_core/CMakeLists.txt b/target_unit_tests/xe_hpc_core/CMakeLists.txt new file mode 100644 index 0000000000..576cd8371a --- /dev/null +++ b/target_unit_tests/xe_hpc_core/CMakeLists.txt @@ -0,0 +1,9 @@ +# +# Copyright (C) 2021 Intel Corporation +# +# SPDX-License-Identifier: MIT +# + +if(TESTS_XE_HPC_CORE) + add_subdirectories() +endif() diff --git a/target_unit_tests/xe_hpc_core/pvc/CMakeLists.txt b/target_unit_tests/xe_hpc_core/pvc/CMakeLists.txt new file mode 100644 index 0000000000..18c50d22b9 --- /dev/null +++ b/target_unit_tests/xe_hpc_core/pvc/CMakeLists.txt @@ -0,0 +1,9 @@ +# +# Copyright (C) 2021 Intel Corporation +# +# SPDX-License-Identifier: MIT +# + +if(TESTS_PVC) + include(${CMAKE_CURRENT_SOURCE_DIR}${BRANCH_DIR_SUFFIX}enable_pvc_testing.cmake) +endif() diff --git a/target_unit_tests/xe_hpc_core/pvc/enable_pvc_testing.cmake b/target_unit_tests/xe_hpc_core/pvc/enable_pvc_testing.cmake new file mode 100644 index 0000000000..ee684e0721 --- /dev/null +++ b/target_unit_tests/xe_hpc_core/pvc/enable_pvc_testing.cmake @@ -0,0 +1,10 @@ +# +# Copyright (C) 2021 Intel Corporation +# +# SPDX-License-Identifier: MIT +# + +if(TESTS_PVC) + set(unit_test_config "pvc/2/4/5/0") # non-zero values for unit tests + include(${NEO_SOURCE_DIR}/cmake/run_ult_target.cmake) +endif()