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Add query system info on linux

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Source location of DRM_I915_QUERY_HWCONFIG_TABLE
and modified intel_hwconfig_types.h:
https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/tree/intel/IGTPW_6061/

Signed-off-by: Szymon Morek <szymon.morek@intel.com>
This commit is contained in:
Szymon Morek
2021-11-12 17:34:33 +00:00
committed by Compute-Runtime-Automation
parent 29f74a1a98
commit 23f7a908d7
18 changed files with 546 additions and 60 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
opencl/test/unit_test/os_interface/linux/CMakeLists.txt
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@@ -27,7 +27,7 @@ set(IGDRCL_SRCS_tests_os_interface_linux
${CMAKE_CURRENT_SOURCE_DIR}${BRANCH_DIR_SUFFIX}drm_memory_manager_localmem_tests.cpp
${CMAKE_CURRENT_SOURCE_DIR}/drm_os_memory_tests.cpp
${CMAKE_CURRENT_SOURCE_DIR}/drm_residency_handler_tests.cpp
${CMAKE_CURRENT_SOURCE_DIR}${BRANCH_DIR_SUFFIX}drm_system_info_tests.cpp
${CMAKE_CURRENT_SOURCE_DIR}/drm_system_info_tests.cpp
${CMAKE_CURRENT_SOURCE_DIR}/drm_tests.cpp
${CMAKE_CURRENT_SOURCE_DIR}${BRANCH_DIR_SUFFIX}drm_uuid_tests.cpp
${CMAKE_CURRENT_SOURCE_DIR}/file_logger_linux_tests.cpp

96
opencl/test/unit_test/os_interface/linux/drm_system_info_tests.cpp
View File

@@ -9,6 +9,7 @@
#include "shared/test/common/helpers/debug_manager_state_restore.h"
#include "shared/test/common/helpers/default_hw_info.h"
#include "shared/test/common/libult/linux/drm_mock.h"
#include "shared/test/common/os_interface/linux/drm_mock_device_blob.h"
#include "opencl/test/unit_test/helpers/gtest_helpers.h"
@@ -16,7 +17,7 @@
using namespace NEO;
TEST(DrmSystemInfoTest, whenQueryingSystemInfoThenSystemInfoIsNotCreatedAndNoIoctlsAreCalled) {
TEST(DrmSystemInfoTest, whenQueryingSystemInfoThenSystemInfoIsNotCreatedAndIoctlsAreCalledOnce) {
auto executionEnvironment = std::make_unique<ExecutionEnvironment>();
executionEnvironment->prepareRootDeviceEnvironments(1);
DrmMock drm(*executionEnvironment->rootDeviceEnvironments[0]);
@@ -24,7 +25,7 @@ TEST(DrmSystemInfoTest, whenQueryingSystemInfoThenSystemInfoIsNotCreatedAndNoIoc
EXPECT_FALSE(drm.querySystemInfo());
EXPECT_EQ(nullptr, drm.getSystemInfo());
EXPECT_EQ(0u, drm.ioctlCallsCount);
EXPECT_EQ(1u, drm.ioctlCallsCount);
}
TEST(DrmSystemInfoTest, givenSystemInfoCreatedWhenQueryingSpecificAtrributesThenReturnZero) {
@@ -48,11 +49,11 @@ TEST(DrmSystemInfoTest, givenSystemInfoCreatedWhenQueryingSpecificAtrributesThen
EXPECT_EQ(0u, systemInfo.getMaxCCS());
}
TEST(DrmSystemInfoTest, givenSetupHardwareInfoWhenQuerySystemInfoTrueThenSystemInfoIsNotCreatedAndDebugMessageIsNotPrinted) {
TEST(DrmSystemInfoTest, givenSetupHardwareInfoWhenQuerySystemInfoFalseThenSystemInfoIsNotCreatedAndDebugMessageIsNotPrinted) {
struct DrmMockToQuerySystemInfo : public DrmMock {
DrmMockToQuerySystemInfo(RootDeviceEnvironment &rootDeviceEnvironment)
: DrmMock(rootDeviceEnvironment) {}
bool querySystemInfo() override { return true; }
bool querySystemInfo() override { return false; }
};
DebugManagerStateRestore restorer;
@@ -76,23 +77,100 @@ TEST(DrmSystemInfoTest, givenSetupHardwareInfoWhenQuerySystemInfoTrueThenSystemI
EXPECT_THAT(::testing::internal::GetCapturedStdout(), ::testing::IsEmpty());
}
TEST(DrmSystemInfoTest, givenSystemInfoWhenSetupHardwareInfoThenFinishedWithSuccess) {
TEST(DrmSystemInfoTest, whenQueryingSystemInfoThenSystemInfoIsCreatedAndReturnsNonZeros) {
auto executionEnvironment = std::make_unique<ExecutionEnvironment>();
executionEnvironment->prepareRootDeviceEnvironments(1);
DrmMockEngine drm(*executionEnvironment->rootDeviceEnvironments[0]);
EXPECT_TRUE(drm.querySystemInfo());
auto systemInfo = drm.getSystemInfo();
EXPECT_NE(nullptr, systemInfo);
EXPECT_NE(0u, systemInfo->getMaxMemoryChannels());
EXPECT_NE(0u, systemInfo->getMemoryType());
EXPECT_NE(0u, systemInfo->getTotalVsThreads());
EXPECT_NE(0u, systemInfo->getTotalHsThreads());
EXPECT_NE(0u, systemInfo->getTotalDsThreads());
EXPECT_NE(0u, systemInfo->getTotalGsThreads());
EXPECT_NE(0u, systemInfo->getTotalPsThreads());
EXPECT_NE(0u, systemInfo->getMaxEuPerDualSubSlice());
EXPECT_NE(0u, systemInfo->getMaxSlicesSupported());
EXPECT_NE(0u, systemInfo->getMaxDualSubSlicesSupported());
EXPECT_NE(0u, systemInfo->getMaxDualSubSlicesSupported());
EXPECT_NE(0u, systemInfo->getMaxRCS());
EXPECT_NE(0u, systemInfo->getMaxCCS());
EXPECT_EQ(2u, drm.ioctlCallsCount);
}
TEST(DrmSystemInfoTest, givenSystemInfoCreatedFromDeviceBlobWhenQueryingSpecificAtrributesThenReturnCorrectValues) {
SystemInfoImpl systemInfo(dummyDeviceBlobData, sizeof(dummyDeviceBlobData));
EXPECT_EQ(0x0Au, systemInfo.getMaxMemoryChannels());
EXPECT_EQ(0x0Bu, systemInfo.getMemoryType());
EXPECT_EQ(0x10u, systemInfo.getTotalVsThreads());
EXPECT_EQ(0x12u, systemInfo.getTotalHsThreads());
EXPECT_EQ(0x13u, systemInfo.getTotalDsThreads());
EXPECT_EQ(0x11u, systemInfo.getTotalGsThreads());
EXPECT_EQ(0x15u, systemInfo.getTotalPsThreads());
EXPECT_EQ(0x03u, systemInfo.getMaxEuPerDualSubSlice());
EXPECT_EQ(0x01u, systemInfo.getMaxSlicesSupported());
EXPECT_EQ(0x02u, systemInfo.getMaxDualSubSlicesSupported());
EXPECT_EQ(0x02u, systemInfo.getMaxDualSubSlicesSupported());
EXPECT_EQ(0x17u, systemInfo.getMaxRCS());
EXPECT_EQ(0x18u, systemInfo.getMaxCCS());
}
TEST(DrmSystemInfoTest, givenSetupHardwareInfoWhenQuerySystemInfoFailsThenSystemInfoIsNotCreatedAndDebugMessageIsPrinted) {
DebugManagerStateRestore restorer;
DebugManager.flags.PrintDebugMessages.set(true);
auto executionEnvironment = std::make_unique<ExecutionEnvironment>();
executionEnvironment->prepareRootDeviceEnvironments(1);
executionEnvironment->rootDeviceEnvironments[0]->setHwInfo(defaultHwInfo.get());
DrmMock drm(*executionEnvironment->rootDeviceEnvironments[0]);
DrmMockEngine drm(*executionEnvironment->rootDeviceEnvironments[0]);
HardwareInfo hwInfo = *defaultHwInfo;
auto setupHardwareInfo = [](HardwareInfo *, bool) {};
DeviceDescriptor device = {0, &hwInfo, setupHardwareInfo, GTTYPE_UNDEFINED};
drm.systemInfo.reset(new SystemInfoImpl(nullptr, 0));
::testing::internal::CaptureStdout();
drm.failQueryDeviceBlob = true;
int ret = drm.setupHardwareInfo(&device, false);
EXPECT_EQ(ret, 0);
EXPECT_THAT(::testing::internal::GetCapturedStdout(), ::testing::IsEmpty());
EXPECT_EQ(nullptr, drm.getSystemInfo());
EXPECT_THAT(::testing::internal::GetCapturedStdout(), ::testing::HasSubstr("INFO: System Info query failed!\n"));
}
TEST(DrmSystemInfoTest, givenSetupHardwareInfoWhenQuerySystemInfoSucceedsThenSystemInfoIsCreatedAndUsedToSetHardwareInfoAttributes) {
auto executionEnvironment = std::make_unique<ExecutionEnvironment>();
executionEnvironment->prepareRootDeviceEnvironments(1);
executionEnvironment->rootDeviceEnvironments[0]->setHwInfo(defaultHwInfo.get());
DrmMockEngine drm(*executionEnvironment->rootDeviceEnvironments[0]);
HardwareInfo hwInfo = *defaultHwInfo;
auto setupHardwareInfo = [](HardwareInfo *, bool) {};
GT_SYSTEM_INFO &gtSystemInfo = hwInfo.gtSystemInfo;
DeviceDescriptor device = {0, &hwInfo, setupHardwareInfo, GTTYPE_UNDEFINED};
int ret = drm.setupHardwareInfo(&device, false);
EXPECT_EQ(ret, 0);
EXPECT_NE(nullptr, drm.getSystemInfo());
EXPECT_GT(gtSystemInfo.TotalVsThreads, 0u);
EXPECT_GT(gtSystemInfo.TotalHsThreads, 0u);
EXPECT_GT(gtSystemInfo.TotalDsThreads, 0u);
EXPECT_GT(gtSystemInfo.TotalGsThreads, 0u);
EXPECT_GT(gtSystemInfo.TotalPsThreadsWindowerRange, 0u);
EXPECT_GT(gtSystemInfo.TotalDsThreads, 0u);
EXPECT_GT(gtSystemInfo.MaxEuPerSubSlice, 0u);
EXPECT_GT(gtSystemInfo.MaxSlicesSupported, 0u);
EXPECT_GT(gtSystemInfo.MaxSubSlicesSupported, 0u);
EXPECT_GT(gtSystemInfo.MaxDualSubSlicesSupported, 0u);
EXPECT_GT(gtSystemInfo.MemoryType, 0u);
}

4
shared/source/os_interface/linux/CMakeLists.txt
View File

@@ -80,7 +80,9 @@ set(NEO_CORE_OS_INTERFACE_LINUX
${CMAKE_CURRENT_SOURCE_DIR}/settings_reader_create.cpp
${CMAKE_CURRENT_SOURCE_DIR}/sys_calls.h
${CMAKE_CURRENT_SOURCE_DIR}/system_info.h
${CMAKE_CURRENT_SOURCE_DIR}${BRANCH_DIR_SUFFIX}system_info_impl.h
${CMAKE_CURRENT_SOURCE_DIR}/system_info_impl.h
${CMAKE_CURRENT_SOURCE_DIR}/system_info_impl.cpp
${CMAKE_CURRENT_SOURCE_DIR}${BRANCH_DIR_SUFFIX}/system_info_impl_extended.cpp
)
if(SUPPORT_XEHP_AND_LATER)
list(APPEND NEO_CORE_OS_INTERFACE_LINUX

18
shared/source/os_interface/linux/drm_neo.cpp
View File

@@ -886,4 +886,22 @@ bool Drm::useVMBindImmediate() const {
return useBindImmediate;
}
void Drm::setupSystemInfo(HardwareInfo *hwInfo, SystemInfo *sysInfo) {
GT_SYSTEM_INFO *gtSysInfo = &hwInfo->gtSystemInfo;
gtSysInfo->ThreadCount = gtSysInfo->EUCount * sysInfo->getNumThreadsPerEu();
gtSysInfo->L3CacheSizeInKb = sysInfo->getL3CacheSizeInKb();
gtSysInfo->L3BankCount = sysInfo->getL3BankCount();
gtSysInfo->MemoryType = sysInfo->getMemoryType();
gtSysInfo->MaxFillRate = sysInfo->getMaxFillRate();
gtSysInfo->TotalVsThreads = sysInfo->getTotalVsThreads();
gtSysInfo->TotalHsThreads = sysInfo->getTotalHsThreads();
gtSysInfo->TotalDsThreads = sysInfo->getTotalDsThreads();
gtSysInfo->TotalGsThreads = sysInfo->getTotalGsThreads();
gtSysInfo->TotalPsThreadsWindowerRange = sysInfo->getTotalPsThreads();
gtSysInfo->MaxEuPerSubSlice = sysInfo->getMaxEuPerDualSubSlice();
gtSysInfo->MaxSlicesSupported = sysInfo->getMaxSlicesSupported();
gtSysInfo->MaxSubSlicesSupported = sysInfo->getMaxDualSubSlicesSupported();
gtSysInfo->MaxDualSubSlicesSupported = sysInfo->getMaxDualSubSlicesSupported();
}
} // namespace NEO

15
shared/source/os_interface/linux/drm_query.cpp
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@@ -13,6 +13,7 @@
#include "shared/source/os_interface/linux/local_memory_helper.h"
#include "shared/source/os_interface/linux/memory_info_impl.h"
#include "shared/source/os_interface/linux/sys_calls.h"
#include "shared/source/os_interface/linux/system_info_impl.h"
#include "drm_neo.h"
#include "drm_query_flags.h"
@@ -102,10 +103,18 @@ bool Drm::isDebugAttachAvailable() {
}
bool Drm::querySystemInfo() {
return false;
}
auto length = 0;
void Drm::setupSystemInfo(HardwareInfo *hwInfo, SystemInfo *sysInfo) {}
auto deviceBlobQuery = this->query(DRM_I915_QUERY_HWCONFIG_TABLE, DrmQueryItemFlags::empty, length);
auto deviceBlob = reinterpret_cast<uint32_t *>(deviceBlobQuery.get());
if (!deviceBlob) {
PRINT_DEBUG_STRING(DebugManager.flags.PrintDebugMessages.get(), stdout, "%s", "INFO: System Info query failed!\n");
return false;
}
this->systemInfo.reset(new SystemInfoImpl(deviceBlob, length));
return true;
}
void Drm::setupCacheInfo(const HardwareInfo &hwInfo) {
this->cacheInfo.reset(new CacheInfoImpl());

77
shared/source/os_interface/linux/system_info_impl.cpp Normal file
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@@ -0,0 +1,77 @@
/*
* Copyright (C) 2021 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "shared/source/os_interface/linux/system_info_impl.h"
#include "shared/source/debug_settings/debug_settings_manager.h"
#include "shared/source/helpers/debug_helpers.h"
#include "shared/source/helpers/hw_info.h"
#include "drm/intel_hwconfig_types.h"
namespace NEO {
SystemInfoImpl::SystemInfoImpl(const uint32_t *blobData, int32_t blobSize) {
this->parseDeviceBlob(blobData, blobSize);
}
void SystemInfoImpl::parseDeviceBlob(const uint32_t *data, int32_t size) {
uint32_t i = 0;
while (i < (size / sizeof(uint32_t))) {
DEBUG_BREAK_IF(data[i + 1] < 1);
/* Attribute IDs range */
DEBUG_BREAK_IF(data[i] < 1);
if (INTEL_HWCONFIG_MAX_SLICES_SUPPORTED == data[i]) {
maxSlicesSupported = data[i + 2];
}
if (INTEL_HWCONFIG_MAX_DUAL_SUBSLICES_SUPPORTED == data[i]) {
maxDualSubSlicesSupported = data[i + 2];
}
if (INTEL_HWCONFIG_MAX_NUM_EU_PER_DSS == data[i]) {
maxEuPerDualSubSlice = data[i + 2];
}
if (INTEL_HWCONFIG_MAX_MEMORY_CHANNELS == data[i]) {
maxMemoryChannels = data[i + 2];
}
if (INTEL_HWCONFIG_MEMORY_TYPE == data[i]) {
memoryType = data[i + 2];
}
if (INTEL_HWCONFIG_NUM_THREADS_PER_EU == data[i]) {
numThreadsPerEu = data[i + 2];
}
if (INTEL_HWCONFIG_TOTAL_VS_THREADS == data[i]) {
totalVsThreads = data[i + 2];
}
if (INTEL_HWCONFIG_TOTAL_HS_THREADS == data[i]) {
totalHsThreads = data[i + 2];
}
if (INTEL_HWCONFIG_TOTAL_DS_THREADS == data[i]) {
totalDsThreads = data[i + 2];
}
if (INTEL_HWCONFIG_TOTAL_GS_THREADS == data[i]) {
totalGsThreads = data[i + 2];
}
if (INTEL_HWCONFIG_TOTAL_PS_THREADS == data[i]) {
totalPsThreads = data[i + 2];
}
if (INTEL_HWCONFIG_MAX_RCS == data[i]) {
maxRCS = data[i + 2];
}
if (INTEL_HWCONFIG_MAX_CCS == data[i]) {
maxCCS = data[i + 2];
}
extendParseDeviceBlob(data, i);
/* Skip to next attribute */
auto blobLength = 2 + data[i + 1];
i += blobLength;
}
}
} // namespace NEO

63
shared/source/os_interface/linux/system_info_impl.h
View File

@@ -10,29 +10,52 @@
namespace NEO {
struct HardwareInfo;
struct SystemInfoImpl : public SystemInfo {
class SystemInfoImpl : public SystemInfo {
public:
SystemInfoImpl(const uint32_t *blobData, int32_t blobSize);
~SystemInfoImpl() override = default;
SystemInfoImpl(const uint32_t *data, int32_t length) {
}
uint32_t getMaxSlicesSupported() const override { return maxSlicesSupported; }
uint32_t getMaxDualSubSlicesSupported() const override { return maxDualSubSlicesSupported; }
uint32_t getMaxEuPerDualSubSlice() const override { return maxEuPerDualSubSlice; }
uint64_t getL3CacheSizeInKb() const override { return L3CacheSizeInKb; }
uint32_t getL3BankCount() const override { return L3BankCount; }
uint32_t getMemoryType() const override { return memoryType; }
uint32_t getMaxMemoryChannels() const override { return maxMemoryChannels; }
uint32_t getNumThreadsPerEu() const override { return numThreadsPerEu; }
uint32_t getTotalVsThreads() const override { return totalVsThreads; }
uint32_t getTotalHsThreads() const override { return totalHsThreads; }
uint32_t getTotalDsThreads() const override { return totalDsThreads; }
uint32_t getTotalGsThreads() const override { return totalGsThreads; }
uint32_t getTotalPsThreads() const override { return totalPsThreads; }
uint32_t getMaxFillRate() const override { return maxFillRate; }
uint32_t getMaxRCS() const override { return maxRCS; }
uint32_t getMaxCCS() const override { return maxCCS; }
uint32_t getMaxSlicesSupported() const override { return 0; }
uint32_t getMaxDualSubSlicesSupported() const override { return 0; }
uint32_t getMaxEuPerDualSubSlice() const override { return 0; }
uint64_t getL3CacheSizeInKb() const override { return 0; }
uint32_t getL3BankCount() const override { return 0; }
uint32_t getMemoryType() const override { return 0; }
uint32_t getMaxMemoryChannels() const override { return 0; }
uint32_t getNumThreadsPerEu() const override { return 0; }
uint32_t getTotalVsThreads() const override { return 0; }
uint32_t getTotalHsThreads() const override { return 0; }
uint32_t getTotalDsThreads() const override { return 0; }
uint32_t getTotalGsThreads() const override { return 0; }
uint32_t getTotalPsThreads() const override { return 0; }
uint32_t getMaxFillRate() const override { return 0; }
uint32_t getMaxRCS() const override { return 0; }
uint32_t getMaxCCS() const override { return 0; }
void checkSysInfoMismatch(HardwareInfo *hwInfo) override {}
void checkSysInfoMismatch(HardwareInfo *hwInfo) override;
protected:
void parseDeviceBlob(const uint32_t *data, int32_t size);
void extendParseDeviceBlob(const uint32_t *data, uint32_t element);
uint32_t maxSlicesSupported = 0;
uint32_t maxDualSubSlicesSupported = 0;
uint32_t maxEuPerDualSubSlice = 0;
uint64_t L3CacheSizeInKb = 0;
uint32_t L3BankCount = 0;
uint32_t memoryType = 0;
uint32_t maxMemoryChannels = 0;
uint32_t numThreadsPerEu = 0;
uint32_t totalVsThreads = 0;
uint32_t totalHsThreads = 0;
uint32_t totalDsThreads = 0;
uint32_t totalGsThreads = 0;
uint32_t totalPsThreads = 0;
uint32_t maxFillRate = 0;
uint32_t maxRCS = 0;
uint32_t maxCCS = 0;
};
} // namespace NEO

15
shared/source/os_interface/linux/system_info_impl_extended.cpp Normal file
View File

@@ -0,0 +1,15 @@
/*
* Copyright (C) 2021 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "shared/source/os_interface/linux/system_info_impl.h"
namespace NEO {
void SystemInfoImpl::checkSysInfoMismatch(HardwareInfo *hwInfo) {}
void SystemInfoImpl::extendParseDeviceBlob(const uint32_t *data, uint32_t element) {}
} // namespace NEO

1
shared/test/common/libult/linux/CMakeLists.txt
View File

@@ -9,6 +9,7 @@ if(UNIX)
${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt
${CMAKE_CURRENT_SOURCE_DIR}/drm_mock.cpp
${CMAKE_CURRENT_SOURCE_DIR}/drm_mock.h
${CMAKE_CURRENT_SOURCE_DIR}${BRANCH_DIR_SUFFIX}drm_mock_engine.cpp
)
target_sources(neo_libult PRIVATE
${CMAKE_CURRENT_SOURCE_DIR}/directory_linux.cpp

26
shared/test/common/libult/linux/drm_mock.cpp
View File

@@ -252,32 +252,6 @@ int DrmMockEngine::handleRemainingRequests(unsigned long request, void *arg) {
return -1;
}
void DrmMockEngine::handleQueryItem(drm_i915_query_item *queryItem) {
switch (queryItem->query_id) {
case DRM_I915_QUERY_ENGINE_INFO:
if (queryEngineInfoSuccessCount == 0) {
queryItem->length = -EINVAL;
} else {
queryEngineInfoSuccessCount--;
auto numberOfEngines = 2u;
int engineInfoSize = sizeof(drm_i915_query_engine_info) + numberOfEngines * sizeof(drm_i915_engine_info);
if (queryItem->length == 0) {
queryItem->length = engineInfoSize;
} else {
EXPECT_EQ(engineInfoSize, queryItem->length);
auto queryEnginenInfo = reinterpret_cast<drm_i915_query_engine_info *>(queryItem->data_ptr);
EXPECT_EQ(0u, queryEnginenInfo->num_engines);
queryEnginenInfo->num_engines = numberOfEngines;
queryEnginenInfo->engines[0].engine.engine_class = I915_ENGINE_CLASS_RENDER;
queryEnginenInfo->engines[0].engine.engine_instance = 1;
queryEnginenInfo->engines[1].engine.engine_class = I915_ENGINE_CLASS_COPY;
queryEnginenInfo->engines[1].engine.engine_instance = 1;
}
}
break;
}
}
std::map<unsigned long, const char *> ioctlCodeStringMap = {
{DRM_IOCTL_I915_INIT, "DRM_IOCTL_I915_INIT"},
{DRM_IOCTL_I915_FLUSH, "DRM_IOCTL_I915_FLUSH"},

1
shared/test/common/libult/linux/drm_mock.h
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@@ -224,6 +224,7 @@ class DrmMockEngine : public DrmMock {
int handleRemainingRequests(unsigned long request, void *arg) override;
void handleQueryItem(drm_i915_query_item *queryItem);
bool failQueryDeviceBlob = false;
};
class DrmMockResources : public DrmMock {

52
shared/test/common/libult/linux/drm_mock_engine.cpp Normal file
View File

@@ -0,0 +1,52 @@
/*
* Copyright (C) 2021 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "shared/test/common/libult/linux/drm_mock.h"
#include "shared/test/common/os_interface/linux/drm_mock_device_blob.h"
#include "drm/i915_drm.h"
#include "gtest/gtest.h"
void DrmMockEngine::handleQueryItem(drm_i915_query_item *queryItem) {
switch (queryItem->query_id) {
case DRM_I915_QUERY_ENGINE_INFO:
if (queryEngineInfoSuccessCount == 0) {
queryItem->length = -EINVAL;
} else {
queryEngineInfoSuccessCount--;
auto numberOfEngines = 2u;
int engineInfoSize = sizeof(drm_i915_query_engine_info) + numberOfEngines * sizeof(drm_i915_engine_info);
if (queryItem->length == 0) {
queryItem->length = engineInfoSize;
} else {
EXPECT_EQ(engineInfoSize, queryItem->length);
auto queryEnginenInfo = reinterpret_cast<drm_i915_query_engine_info *>(queryItem->data_ptr);
EXPECT_EQ(0u, queryEnginenInfo->num_engines);
queryEnginenInfo->num_engines = numberOfEngines;
queryEnginenInfo->engines[0].engine.engine_class = I915_ENGINE_CLASS_RENDER;
queryEnginenInfo->engines[0].engine.engine_instance = 1;
queryEnginenInfo->engines[1].engine.engine_class = I915_ENGINE_CLASS_COPY;
queryEnginenInfo->engines[1].engine.engine_instance = 1;
}
}
break;
case DRM_I915_QUERY_HWCONFIG_TABLE: {
if (failQueryDeviceBlob) {
queryItem->length = -EINVAL;
} else {
int deviceBlobSize = sizeof(dummyDeviceBlobData);
if (queryItem->length == 0) {
queryItem->length = deviceBlobSize;
} else {
EXPECT_EQ(deviceBlobSize, queryItem->length);
auto deviceBlobData = reinterpret_cast<uint32_t *>(queryItem->data_ptr);
memcpy(deviceBlobData, &dummyDeviceBlobData, deviceBlobSize);
}
}
} break;
}
}

1
shared/test/common/os_interface/linux/CMakeLists.txt
View File

@@ -8,6 +8,7 @@ if(UNIX)
target_sources(${TARGET_NAME} PRIVATE
${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt
${CMAKE_CURRENT_SOURCE_DIR}/drm_memory_manager_tests.h
${CMAKE_CURRENT_SOURCE_DIR}/drm_mock_device_blob.h
)
add_subdirectories()
endif()

130
shared/test/common/os_interface/linux/drm_mock_device_blob.h Normal file
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@@ -0,0 +1,130 @@
/*
* Copyright (C) 2021 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#pragma once
#include "drm/intel_hwconfig_types.h"
static constexpr uint32_t dummyDeviceBlobData[] = {
INTEL_HWCONFIG_MAX_SLICES_SUPPORTED,
1,
0x01,
INTEL_HWCONFIG_MAX_DUAL_SUBSLICES_SUPPORTED,
1,
0x02,
INTEL_HWCONFIG_MAX_NUM_EU_PER_DSS,
1,
0x03,
INTEL_HWCONFIG_NUM_PIXEL_PIPES,
1,
0x04,
INTEL_HWCONFIG_L3_CACHE_WAYS_SIZE_IN_BYTES,
1,
0x08,
INTEL_HWCONFIG_L3_CACHE_WAYS_PER_SECTOR,
1,
0x09,
INTEL_HWCONFIG_MAX_MEMORY_CHANNELS,
1,
0x0A,
INTEL_HWCONFIG_MEMORY_TYPE,
1,
0x0B,
INTEL_HWCONFIG_CACHE_TYPES,
1,
0x0C,
INTEL_HWCONFIG_LOCAL_MEMORY_PAGE_SIZES_SUPPORTED,
1,
0x0D,
INTEL_HWCONFIG_NUM_THREADS_PER_EU,
1,
0x0F,
INTEL_HWCONFIG_TOTAL_VS_THREADS,
1,
0x10,
INTEL_HWCONFIG_TOTAL_GS_THREADS,
1,
0x11,
INTEL_HWCONFIG_TOTAL_HS_THREADS,
1,
0x12,
INTEL_HWCONFIG_TOTAL_DS_THREADS,
1,
0x13,
INTEL_HWCONFIG_TOTAL_VS_THREADS_POCS,
1,
0x14,
INTEL_HWCONFIG_TOTAL_PS_THREADS,
1,
0x15,
INTEL_HWCONFIG_MAX_RCS,
1,
0x17,
INTEL_HWCONFIG_MAX_CCS,
1,
0x18,
INTEL_HWCONFIG_MAX_VCS,
1,
0x19,
INTEL_HWCONFIG_MAX_VECS,
1,
0x1A,
INTEL_HWCONFIG_MAX_COPY_CS,
1,
0x1B,
INTEL_HWCONFIG_MIN_VS_URB_ENTRIES,
1,
0x1D,
INTEL_HWCONFIG_MAX_VS_URB_ENTRIES,
1,
0x1E,
INTEL_HWCONFIG_MIN_PCS_URB_ENTRIES,
1,
0x1E,
INTEL_HWCONFIG_MAX_PCS_URB_ENTRIES,
1,
0x1F,
INTEL_HWCONFIG_MIN_HS_URB_ENTRIES,
1,
0x20,
INTEL_HWCONFIG_MAX_HS_URB_ENTRIES,
1,
0x21,
INTEL_HWCONFIG_MIN_GS_URB_ENTRIES,
1,
0x22,
INTEL_HWCONFIG_MAX_GS_URB_ENTRIES,
1,
0x23,
INTEL_HWCONFIG_MIN_DS_URB_ENTRIES,
1,
0x24,
INTEL_HWCONFIG_MAX_DS_URB_ENTRIES,
1,
0x25,
INTEL_HWCONFIG_PUSH_CONSTANT_URB_RESERVED_SIZE,
1,
0x26,
INTEL_HWCONFIG_POCS_PUSH_CONSTANT_URB_RESERVED_SIZE,
1,
0x27,
INTEL_HWCONFIG_URB_REGION_ALIGNMENT_SIZE_IN_BYTES,
1,
0x28,
INTEL_HWCONFIG_URB_ALLOCATION_SIZE_UNITS_IN_BYTES,
1,
0x29,
INTEL_HWCONFIG_MAX_URB_SIZE_CCS_IN_BYTES,
1,
0x2A,
INTEL_HWCONFIG_VS_MIN_DEREF_BLOCK_SIZE_HANDLE_COUNT,
1,
0x2B,
INTEL_HWCONFIG_DS_MIN_DEREF_BLOCK_SIZE_HANDLE_COUNT,
1,
0x2C,
};

1
third_party/uapi/dg1/drm/i915_drm.h vendored
View File

@@ -2138,6 +2138,7 @@ struct drm_i915_query_item {
#define DRM_I915_QUERY_ENGINE_INFO 2
#define DRM_I915_QUERY_PERF_CONFIG 3
#define DRM_I915_QUERY_MEMORY_REGIONS 4
#define DRM_I915_QUERY_HWCONFIG_TABLE 5
/* Must be kept compact -- no holes and well documented */
/*

1
third_party/uapi/drm/i915_drm.h vendored
View File

@@ -2500,6 +2500,7 @@ struct drm_i915_query_item {
#define DRM_I915_QUERY_ENGINE_INFO 2
#define DRM_I915_QUERY_PERF_CONFIG 3
#define DRM_I915_QUERY_MEMORY_REGIONS 4
#define DRM_I915_QUERY_HWCONFIG_TABLE 5
/* Must be kept compact -- no holes and well documented */
/**

102
third_party/uapi/drm/intel_hwconfig_types.h vendored Normal file
View File

@@ -0,0 +1,102 @@
/* SPDX-License-Identifier: MIT */
/*
* Copyright © 2021 Intel Corporation
*/
#ifndef _INTEL_HWCONFIG_TYPES_H_
#define _INTEL_HWCONFIG_TYPES_H_
/**
* enum intel_hwconfig - Global definition of hwconfig table attributes
*
* Intel devices provide a KLV (Key/Length/Value) table containing
* the static hardware configuration for that platform.
* This enum defines the current attribute keys for this KLV.
*/
enum intel_hwconfig {
INTEL_HWCONFIG_MAX_SLICES_SUPPORTED = 1,
INTEL_HWCONFIG_MAX_DUAL_SUBSLICES_SUPPORTED, /* 2 */
INTEL_HWCONFIG_MAX_NUM_EU_PER_DSS, /* 3 */
INTEL_HWCONFIG_NUM_PIXEL_PIPES, /* 4 */
INTEL_HWCONFIG_DEPRECATED_MAX_NUM_GEOMETRY_PIPES, /* 5 */
INTEL_HWCONFIG_DEPRECATED_L3_CACHE_SIZE_IN_KB, /* 6 */
INTEL_HWCONFIG_DEPRECATED_L3_BANK_COUNT, /* 7 */
INTEL_HWCONFIG_L3_CACHE_WAYS_SIZE_IN_BYTES, /* 8 */
INTEL_HWCONFIG_L3_CACHE_WAYS_PER_SECTOR, /* 9 */
INTEL_HWCONFIG_MAX_MEMORY_CHANNELS, /* 10 */
INTEL_HWCONFIG_MEMORY_TYPE, /* 11 */
INTEL_HWCONFIG_CACHE_TYPES, /* 12 */
INTEL_HWCONFIG_LOCAL_MEMORY_PAGE_SIZES_SUPPORTED, /* 13 */
INTEL_HWCONFIG_DEPRECATED_SLM_SIZE_IN_KB, /* 14 */
INTEL_HWCONFIG_NUM_THREADS_PER_EU, /* 15 */
INTEL_HWCONFIG_TOTAL_VS_THREADS, /* 16 */
INTEL_HWCONFIG_TOTAL_GS_THREADS, /* 17 */
INTEL_HWCONFIG_TOTAL_HS_THREADS, /* 18 */
INTEL_HWCONFIG_TOTAL_DS_THREADS, /* 19 */
INTEL_HWCONFIG_TOTAL_VS_THREADS_POCS, /* 20 */
INTEL_HWCONFIG_TOTAL_PS_THREADS, /* 21 */
INTEL_HWCONFIG_DEPRECATED_MAX_FILL_RATE, /* 22 */
INTEL_HWCONFIG_MAX_RCS, /* 23 */
INTEL_HWCONFIG_MAX_CCS, /* 24 */
INTEL_HWCONFIG_MAX_VCS, /* 25 */
INTEL_HWCONFIG_MAX_VECS, /* 26 */
INTEL_HWCONFIG_MAX_COPY_CS, /* 27 */
INTEL_HWCONFIG_DEPRECATED_URB_SIZE_IN_KB, /* 28 */
INTEL_HWCONFIG_MIN_VS_URB_ENTRIES, /* 29 */
INTEL_HWCONFIG_MAX_VS_URB_ENTRIES, /* 30 */
INTEL_HWCONFIG_MIN_PCS_URB_ENTRIES, /* 31 */
INTEL_HWCONFIG_MAX_PCS_URB_ENTRIES, /* 32 */
INTEL_HWCONFIG_MIN_HS_URB_ENTRIES, /* 33 */
INTEL_HWCONFIG_MAX_HS_URB_ENTRIES, /* 34 */
INTEL_HWCONFIG_MIN_GS_URB_ENTRIES, /* 35 */
INTEL_HWCONFIG_MAX_GS_URB_ENTRIES, /* 36 */
INTEL_HWCONFIG_MIN_DS_URB_ENTRIES, /* 37 */
INTEL_HWCONFIG_MAX_DS_URB_ENTRIES, /* 38 */
INTEL_HWCONFIG_PUSH_CONSTANT_URB_RESERVED_SIZE, /* 39 */
INTEL_HWCONFIG_POCS_PUSH_CONSTANT_URB_RESERVED_SIZE, /* 40 */
INTEL_HWCONFIG_URB_REGION_ALIGNMENT_SIZE_IN_BYTES, /* 41 */
INTEL_HWCONFIG_URB_ALLOCATION_SIZE_UNITS_IN_BYTES, /* 42 */
INTEL_HWCONFIG_MAX_URB_SIZE_CCS_IN_BYTES, /* 43 */
INTEL_HWCONFIG_VS_MIN_DEREF_BLOCK_SIZE_HANDLE_COUNT, /* 44 */
INTEL_HWCONFIG_DS_MIN_DEREF_BLOCK_SIZE_HANDLE_COUNT, /* 45 */
INTEL_HWCONFIG_NUM_RT_STACKS_PER_DSS, /* 46 */
INTEL_HWCONFIG_MAX_URB_STARTING_ADDRESS, /* 47 */
INTEL_HWCONFIG_MIN_CS_URB_ENTRIES, /* 48 */
INTEL_HWCONFIG_MAX_CS_URB_ENTRIES, /* 49 */
INTEL_HWCONFIG_L3_ALLOC_PER_BANK_URB, /* 50 */
INTEL_HWCONFIG_L3_ALLOC_PER_BANK_REST, /* 51 */
INTEL_HWCONFIG_L3_ALLOC_PER_BANK_DC, /* 52 */
INTEL_HWCONFIG_L3_ALLOC_PER_BANK_RO, /* 53 */
INTEL_HWCONFIG_L3_ALLOC_PER_BANK_Z, /* 54 */
INTEL_HWCONFIG_L3_ALLOC_PER_BANK_COLOR, /* 55 */
INTEL_HWCONFIG_L3_ALLOC_PER_BANK_UNIFIED_TILE_CACHE, /* 56 */
INTEL_HWCONFIG_L3_ALLOC_PER_BANK_COMMAND_BUFFER, /* 57 */
INTEL_HWCONFIG_L3_ALLOC_PER_BANK_RW, /* 58 */
INTEL_HWCONFIG_MAX_NUM_L3_CONFIGS, /* 59 */
INTEL_HWCONFIG_BINDLESS_SURFACE_OFFSET_BIT_COUNT, /* 60 */
INTEL_HWCONFIG_RESERVED_CCS_WAYS, /* 61 */
INTEL_HWCONFIG_CSR_SIZE_IN_MB, /* 62 */
INTEL_HWCONFIG_GEOMETRY_PIPES_PER_SLICE, /* 63 */
INTEL_HWCONFIG_L3_BANK_SIZE_IN_KB, /* 64 */
INTEL_HWCONFIG_SLM_SIZE_PER_DSS, /* 65 */
INTEL_HWCONFIG_MAX_PIXEL_FILL_RATE_PER_SLICE, /* 66 */
INTEL_HWCONFIG_MAX_PIXEL_FILL_RATE_PER_DSS, /* 67 */
INTEL_HWCONFIG_URB_SIZE_PER_SLICE_IN_KB, /* 68 */
INTEL_HWCONFIG_URB_SIZE_PER_L3_BANK_COUNT_IN_KB, /* 69 */
INTEL_HWCONFIG_MAX_SUBSLICE, /* 70 */
INTEL_HWCONFIG_MAX_EU_PER_SUBSLICE, /* 71 */
INTEL_HWCONFIG_RAMBO_L3_BANK_SIZE_IN_KB, /* 72 */
INTEL_HWCONFIG_SLM_SIZE_PER_SS_IN_KB, /* 73 */
__INTEL_HWCONFIG_LIMIT
};
enum {
INTEL_HWCONFIG_MEMORY_TYPE_LPDDR4 = 0,
INTEL_HWCONFIG_MEMORY_TYPE_LPDDR5,
};
#define INTEL_HWCONFIG_CACHE_TYPE_L3 BIT(0)
#define INTEL_HWCONFIG_CACHE_TYPE_LLC BIT(1)
#define INTEL_HWCONFIG_CACHE_TYPE_EDRAM BIT(2)
#endif /* _INTEL_HWCONFIG_TYPES_H_ */

1
third_party/uapi/xe_hp_sdv/drm/i915_drm.h vendored
View File

@@ -2501,6 +2501,7 @@ struct drm_i915_query_item {
#define DRM_I915_QUERY_ENGINE_INFO 2
#define DRM_I915_QUERY_PERF_CONFIG 3
#define DRM_I915_QUERY_MEMORY_REGIONS 4
#define DRM_I915_QUERY_HWCONFIG_TABLE 5
/* Must be kept compact -- no holes and well documented */
/**