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fix: Add PMT counter offset values for BMG

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Related-To: NEO-13286

Signed-off-by: B, Vishnu Khanth <vishnu.khanth.b@intel.com>
This commit is contained in:
B, Vishnu Khanth
2024-12-04 09:30:34 +00:00
committed by Compute-Runtime-Automation
parent b9beb9becc
commit 2859bc83b5
1 changed files with 255 additions and 1 deletions
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256
level_zero/sysman/source/shared/linux/product_helper/xe2_hpg_core/bmg/sysman_product_helper_bmg.cpp
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@@ -272,7 +272,261 @@ static std::map<std::string, std::map<std::string, uint64_t>> guidToKeyOffsetMap
{"GDDR4_CH1_GT_64B_WR_REQ_UPPER", 1120},
{"GDDR4_CH1_GT_64B_WR_REQ_LOWER", 1124},
{"GDDR5_CH1_GT_64B_WR_REQ_UPPER", 1280},
{"GDDR5_CH1_GT_64B_WR_REQ_LOWER", 1284}}}};
{"GDDR5_CH1_GT_64B_WR_REQ_LOWER", 1284}}},
{"0x5e2f8211", // BMG OOBMSM Rev 16
{{"SOC_THERMAL_SENSORS_TEMPERATURE_0_2_0_GTTMMADR[1]", 164},
{"VRAM_TEMPERATURE_0_2_0_GTTMMADR", 168},
{"reg_PCIESS_rx_bytecount_lsb", 280},
{"reg_PCIESS_rx_bytecount_msb", 284},
{"reg_PCIESS_tx_bytecount_lsb", 288},
{"reg_PCIESS_tx_bytecount_msb", 292},
{"reg_PCIESS_rx_pktcount_lsb", 296},
{"reg_PCIESS_rx_pktcount_msb", 300},
{"reg_PCIESS_tx_pktcount_lsb", 304},
{"reg_PCIESS_tx_pktcount_msb", 308},
{"MSU_BITMASK", 3688},
{"GDDR_TELEM_CAPTURE_TIMESTAMP_UPPER", 372},
{"GDDR_TELEM_CAPTURE_TIMESTAMP_LOWER", 368},
{"GDDR0_CH0_GT_32B_RD_REQ_UPPER", 380},
{"GDDR0_CH0_GT_32B_RD_REQ_LOWER", 376},
{"GDDR1_CH0_GT_32B_RD_REQ_UPPER", 540},
{"GDDR1_CH0_GT_32B_RD_REQ_LOWER", 536},
{"GDDR2_CH0_GT_32B_RD_REQ_UPPER", 700},
{"GDDR2_CH0_GT_32B_RD_REQ_LOWER", 696},
{"GDDR3_CH0_GT_32B_RD_REQ_UPPER", 860},
{"GDDR3_CH0_GT_32B_RD_REQ_LOWER", 856},
{"GDDR4_CH0_GT_32B_RD_REQ_UPPER", 1020},
{"GDDR4_CH0_GT_32B_RD_REQ_LOWER", 1016},
{"GDDR5_CH0_GT_32B_RD_REQ_UPPER", 1180},
{"GDDR5_CH0_GT_32B_RD_REQ_LOWER", 1176},
{"GDDR0_CH1_GT_32B_RD_REQ_UPPER", 460},
{"GDDR0_CH1_GT_32B_RD_REQ_LOWER", 456},
{"GDDR1_CH1_GT_32B_RD_REQ_UPPER", 620},
{"GDDR1_CH1_GT_32B_RD_REQ_LOWER", 616},
{"GDDR2_CH1_GT_32B_RD_REQ_UPPER", 780},
{"GDDR2_CH1_GT_32B_RD_REQ_LOWER", 776},
{"GDDR3_CH1_GT_32B_RD_REQ_UPPER", 940},
{"GDDR3_CH1_GT_32B_RD_REQ_LOWER", 936},
{"GDDR4_CH1_GT_32B_RD_REQ_UPPER", 1100},
{"GDDR4_CH1_GT_32B_RD_REQ_LOWER", 1096},
{"GDDR5_CH1_GT_32B_RD_REQ_UPPER", 1260},
{"GDDR5_CH1_GT_32B_RD_REQ_LOWER", 1256},
{"GDDR0_CH0_GT_32B_WR_REQ_UPPER", 396},
{"GDDR0_CH0_GT_32B_WR_REQ_LOWER", 392},
{"GDDR1_CH0_GT_32B_WR_REQ_UPPER", 556},
{"GDDR1_CH0_GT_32B_WR_REQ_LOWER", 552},
{"GDDR2_CH0_GT_32B_WR_REQ_UPPER", 716},
{"GDDR2_CH0_GT_32B_WR_REQ_LOWER", 712},
{"GDDR3_CH0_GT_32B_WR_REQ_UPPER", 876},
{"GDDR3_CH0_GT_32B_WR_REQ_LOWER", 872},
{"GDDR4_CH0_GT_32B_WR_REQ_UPPER", 1036},
{"GDDR4_CH0_GT_32B_WR_REQ_LOWER", 1032},
{"GDDR5_CH0_GT_32B_WR_REQ_UPPER", 1196},
{"GDDR5_CH0_GT_32B_WR_REQ_LOWER", 1192},
{"GDDR0_CH1_GT_32B_WR_REQ_UPPER", 476},
{"GDDR0_CH1_GT_32B_WR_REQ_LOWER", 472},
{"GDDR1_CH1_GT_32B_WR_REQ_UPPER", 636},
{"GDDR1_CH1_GT_32B_WR_REQ_LOWER", 632},
{"GDDR2_CH1_GT_32B_WR_REQ_UPPER", 796},
{"GDDR2_CH1_GT_32B_WR_REQ_LOWER", 792},
{"GDDR3_CH1_GT_32B_WR_REQ_UPPER", 956},
{"GDDR3_CH1_GT_32B_WR_REQ_LOWER", 952},
{"GDDR4_CH1_GT_32B_WR_REQ_UPPER", 1116},
{"GDDR4_CH1_GT_32B_WR_REQ_LOWER", 1112},
{"GDDR5_CH1_GT_32B_WR_REQ_UPPER", 1276},
{"GDDR5_CH1_GT_32B_WR_REQ_LOWER", 1272},
{"GDDR0_CH0_DISPLAYVC0_32B_RD_REQ_UPPER", 412},
{"GDDR0_CH0_DISPLAYVC0_32B_RD_REQ_LOWER", 408},
{"GDDR1_CH0_DISPLAYVC0_32B_RD_REQ_UPPER", 572},
{"GDDR1_CH0_DISPLAYVC0_32B_RD_REQ_LOWER", 568},
{"GDDR2_CH0_DISPLAYVC0_32B_RD_REQ_UPPER", 732},
{"GDDR2_CH0_DISPLAYVC0_32B_RD_REQ_LOWER", 728},
{"GDDR3_CH0_DISPLAYVC0_32B_RD_REQ_UPPER", 892},
{"GDDR3_CH0_DISPLAYVC0_32B_RD_REQ_LOWER", 888},
{"GDDR4_CH0_DISPLAYVC0_32B_RD_REQ_UPPER", 1052},
{"GDDR4_CH0_DISPLAYVC0_32B_RD_REQ_LOWER", 1048},
{"GDDR5_CH0_DISPLAYVC0_32B_RD_REQ_UPPER", 1212},
{"GDDR5_CH0_DISPLAYVC0_32B_RD_REQ_LOWER", 1208},
{"GDDR0_CH1_DISPLAYVC0_32B_RD_REQ_UPPER", 492},
{"GDDR0_CH1_DISPLAYVC0_32B_RD_REQ_LOWER", 488},
{"GDDR1_CH1_DISPLAYVC0_32B_RD_REQ_UPPER", 652},
{"GDDR1_CH1_DISPLAYVC0_32B_RD_REQ_LOWER", 648},
{"GDDR2_CH1_DISPLAYVC0_32B_RD_REQ_UPPER", 812},
{"GDDR2_CH1_DISPLAYVC0_32B_RD_REQ_LOWER", 808},
{"GDDR3_CH1_DISPLAYVC0_32B_RD_REQ_UPPER", 972},
{"GDDR3_CH1_DISPLAYVC0_32B_RD_REQ_LOWER", 968},
{"GDDR4_CH1_DISPLAYVC0_32B_RD_REQ_UPPER", 1132},
{"GDDR4_CH1_DISPLAYVC0_32B_RD_REQ_LOWER", 1128},
{"GDDR5_CH1_DISPLAYVC0_32B_RD_REQ_UPPER", 1292},
{"GDDR5_CH1_DISPLAYVC0_32B_RD_REQ_LOWER", 1288},
{"GDDR0_CH0_SOC_32B_RD_REQ_UPPER", 428},
{"GDDR0_CH0_SOC_32B_RD_REQ_LOWER", 424},
{"GDDR1_CH0_SOC_32B_RD_REQ_UPPER", 588},
{"GDDR1_CH0_SOC_32B_RD_REQ_LOWER", 584},
{"GDDR2_CH0_SOC_32B_RD_REQ_UPPER", 748},
{"GDDR2_CH0_SOC_32B_RD_REQ_LOWER", 744},
{"GDDR3_CH0_SOC_32B_RD_REQ_UPPER", 908},
{"GDDR3_CH0_SOC_32B_RD_REQ_LOWER", 904},
{"GDDR4_CH0_SOC_32B_RD_REQ_UPPER", 1068},
{"GDDR4_CH0_SOC_32B_RD_REQ_LOWER", 1064},
{"GDDR5_CH0_SOC_32B_RD_REQ_UPPER", 1228},
{"GDDR5_CH0_SOC_32B_RD_REQ_LOWER", 1224},
{"GDDR0_CH1_SOC_32B_RD_REQ_UPPER", 508},
{"GDDR0_CH1_SOC_32B_RD_REQ_LOWER", 504},
{"GDDR1_CH1_SOC_32B_RD_REQ_UPPER", 668},
{"GDDR1_CH1_SOC_32B_RD_REQ_LOWER", 664},
{"GDDR2_CH1_SOC_32B_RD_REQ_UPPER", 828},
{"GDDR2_CH1_SOC_32B_RD_REQ_LOWER", 824},
{"GDDR3_CH1_SOC_32B_RD_REQ_UPPER", 988},
{"GDDR3_CH1_SOC_32B_RD_REQ_LOWER", 984},
{"GDDR4_CH1_SOC_32B_RD_REQ_UPPER", 1148},
{"GDDR4_CH1_SOC_32B_RD_REQ_LOWER", 1144},
{"GDDR5_CH1_SOC_32B_RD_REQ_UPPER", 1308},
{"GDDR5_CH1_SOC_32B_RD_REQ_LOWER", 1304},
{"GDDR0_CH0_SOC_32B_WR_REQ_UPPER", 444},
{"GDDR0_CH0_SOC_32B_WR_REQ_LOWER", 440},
{"GDDR1_CH0_SOC_32B_WR_REQ_UPPER", 604},
{"GDDR1_CH0_SOC_32B_WR_REQ_LOWER", 600},
{"GDDR2_CH0_SOC_32B_WR_REQ_UPPER", 764},
{"GDDR2_CH0_SOC_32B_WR_REQ_LOWER", 760},
{"GDDR3_CH0_SOC_32B_WR_REQ_UPPER", 924},
{"GDDR3_CH0_SOC_32B_WR_REQ_LOWER", 920},
{"GDDR4_CH0_SOC_32B_WR_REQ_UPPER", 1084},
{"GDDR4_CH0_SOC_32B_WR_REQ_LOWER", 1080},
{"GDDR5_CH0_SOC_32B_WR_REQ_UPPER", 1244},
{"GDDR5_CH0_SOC_32B_WR_REQ_LOWER", 1240},
{"GDDR0_CH1_SOC_32B_WR_REQ_UPPER", 524},
{"GDDR0_CH1_SOC_32B_WR_REQ_LOWER", 520},
{"GDDR1_CH1_SOC_32B_WR_REQ_UPPER", 684},
{"GDDR1_CH1_SOC_32B_WR_REQ_LOWER", 680},
{"GDDR2_CH1_SOC_32B_WR_REQ_UPPER", 844},
{"GDDR2_CH1_SOC_32B_WR_REQ_LOWER", 840},
{"GDDR3_CH1_SOC_32B_WR_REQ_UPPER", 1004},
{"GDDR3_CH1_SOC_32B_WR_REQ_LOWER", 1000},
{"GDDR4_CH1_SOC_32B_WR_REQ_UPPER", 1164},
{"GDDR4_CH1_SOC_32B_WR_REQ_LOWER", 1160},
{"GDDR5_CH1_SOC_32B_WR_REQ_UPPER", 1324},
{"GDDR5_CH1_SOC_32B_WR_REQ_LOWER", 1320},
{"GDDR0_CH0_GT_64B_RD_REQ_UPPER", 388},
{"GDDR0_CH0_GT_64B_RD_REQ_LOWER", 384},
{"GDDR1_CH0_GT_64B_RD_REQ_UPPER", 548},
{"GDDR1_CH0_GT_64B_RD_REQ_LOWER", 544},
{"GDDR2_CH0_GT_64B_RD_REQ_UPPER", 708},
{"GDDR2_CH0_GT_64B_RD_REQ_LOWER", 704},
{"GDDR3_CH0_GT_64B_RD_REQ_UPPER", 868},
{"GDDR3_CH0_GT_64B_RD_REQ_LOWER", 864},
{"GDDR4_CH0_GT_64B_RD_REQ_UPPER", 1028},
{"GDDR4_CH0_GT_64B_RD_REQ_LOWER", 1024},
{"GDDR5_CH0_GT_64B_RD_REQ_UPPER", 1188},
{"GDDR5_CH0_GT_64B_RD_REQ_LOWER", 1184},
{"GDDR0_CH1_GT_64B_RD_REQ_UPPER", 468},
{"GDDR0_CH1_GT_64B_RD_REQ_LOWER", 464},
{"GDDR1_CH1_GT_64B_RD_REQ_UPPER", 628},
{"GDDR1_CH1_GT_64B_RD_REQ_LOWER", 624},
{"GDDR2_CH1_GT_64B_RD_REQ_UPPER", 788},
{"GDDR2_CH1_GT_64B_RD_REQ_LOWER", 784},
{"GDDR3_CH1_GT_64B_RD_REQ_UPPER", 948},
{"GDDR3_CH1_GT_64B_RD_REQ_LOWER", 944},
{"GDDR4_CH1_GT_64B_RD_REQ_UPPER", 1108},
{"GDDR4_CH1_GT_64B_RD_REQ_LOWER", 1104},
{"GDDR5_CH1_GT_64B_RD_REQ_UPPER", 1268},
{"GDDR5_CH1_GT_64B_RD_REQ_LOWER", 1264},
{"GDDR0_CH0_DISPLAYVC0_64B_RD_REQ_UPPER", 420},
{"GDDR0_CH0_DISPLAYVC0_64B_RD_REQ_LOWER", 416},
{"GDDR1_CH0_DISPLAYVC0_64B_RD_REQ_UPPER", 580},
{"GDDR1_CH0_DISPLAYVC0_64B_RD_REQ_LOWER", 576},
{"GDDR2_CH0_DISPLAYVC0_64B_RD_REQ_UPPER", 740},
{"GDDR2_CH0_DISPLAYVC0_64B_RD_REQ_LOWER", 736},
{"GDDR3_CH0_DISPLAYVC0_64B_RD_REQ_UPPER", 900},
{"GDDR3_CH0_DISPLAYVC0_64B_RD_REQ_LOWER", 896},
{"GDDR4_CH0_DISPLAYVC0_64B_RD_REQ_UPPER", 1060},
{"GDDR4_CH0_DISPLAYVC0_64B_RD_REQ_LOWER", 1056},
{"GDDR5_CH0_DISPLAYVC0_64B_RD_REQ_UPPER", 1220},
{"GDDR5_CH0_DISPLAYVC0_64B_RD_REQ_LOWER", 1216},
{"GDDR0_CH1_DISPLAYVC0_64B_RD_REQ_UPPER", 500},
{"GDDR0_CH1_DISPLAYVC0_64B_RD_REQ_LOWER", 496},
{"GDDR1_CH1_DISPLAYVC0_64B_RD_REQ_UPPER", 660},
{"GDDR1_CH1_DISPLAYVC0_64B_RD_REQ_LOWER", 656},
{"GDDR2_CH1_DISPLAYVC0_64B_RD_REQ_UPPER", 820},
{"GDDR2_CH1_DISPLAYVC0_64B_RD_REQ_LOWER", 816},
{"GDDR3_CH1_DISPLAYVC0_64B_RD_REQ_UPPER", 980},
{"GDDR3_CH1_DISPLAYVC0_64B_RD_REQ_LOWER", 976},
{"GDDR4_CH1_DISPLAYVC0_64B_RD_REQ_UPPER", 1140},
{"GDDR4_CH1_DISPLAYVC0_64B_RD_REQ_LOWER", 1136},
{"GDDR5_CH1_DISPLAYVC0_64B_RD_REQ_UPPER", 1300},
{"GDDR5_CH1_DISPLAYVC0_64B_RD_REQ_LOWER", 1296},
{"GDDR0_CH0_SOC_64B_RD_REQ_UPPER", 436},
{"GDDR0_CH0_SOC_64B_RD_REQ_LOWER", 432},
{"GDDR1_CH0_SOC_64B_RD_REQ_UPPER", 596},
{"GDDR1_CH0_SOC_64B_RD_REQ_LOWER", 592},
{"GDDR2_CH0_SOC_64B_RD_REQ_UPPER", 756},
{"GDDR2_CH0_SOC_64B_RD_REQ_LOWER", 752},
{"GDDR3_CH0_SOC_64B_RD_REQ_UPPER", 916},
{"GDDR3_CH0_SOC_64B_RD_REQ_LOWER", 912},
{"GDDR4_CH0_SOC_64B_RD_REQ_UPPER", 1076},
{"GDDR4_CH0_SOC_64B_RD_REQ_LOWER", 1072},
{"GDDR5_CH0_SOC_64B_RD_REQ_UPPER", 1236},
{"GDDR5_CH0_SOC_64B_RD_REQ_LOWER", 1232},
{"GDDR0_CH1_SOC_64B_RD_REQ_UPPER", 516},
{"GDDR0_CH1_SOC_64B_RD_REQ_LOWER", 512},
{"GDDR1_CH1_SOC_64B_RD_REQ_UPPER", 676},
{"GDDR1_CH1_SOC_64B_RD_REQ_LOWER", 672},
{"GDDR2_CH1_SOC_64B_RD_REQ_UPPER", 836},
{"GDDR2_CH1_SOC_64B_RD_REQ_LOWER", 832},
{"GDDR3_CH1_SOC_64B_RD_REQ_UPPER", 996},
{"GDDR3_CH1_SOC_64B_RD_REQ_LOWER", 992},
{"GDDR4_CH1_SOC_64B_RD_REQ_UPPER", 1156},
{"GDDR4_CH1_SOC_64B_RD_REQ_LOWER", 1152},
{"GDDR5_CH1_SOC_64B_RD_REQ_UPPER", 1316},
{"GDDR5_CH1_SOC_64B_RD_REQ_LOWER", 1312},
{"GDDR0_CH0_SOC_64B_WR_REQ_UPPER", 452},
{"GDDR0_CH0_SOC_64B_WR_REQ_LOWER", 448},
{"GDDR1_CH0_SOC_64B_WR_REQ_UPPER", 612},
{"GDDR1_CH0_SOC_64B_WR_REQ_LOWER", 608},
{"GDDR2_CH0_SOC_64B_WR_REQ_UPPER", 772},
{"GDDR2_CH0_SOC_64B_WR_REQ_LOWER", 768},
{"GDDR3_CH0_SOC_64B_WR_REQ_UPPER", 932},
{"GDDR3_CH0_SOC_64B_WR_REQ_LOWER", 928},
{"GDDR4_CH0_SOC_64B_WR_REQ_UPPER", 1092},
{"GDDR4_CH0_SOC_64B_WR_REQ_LOWER", 1088},
{"GDDR5_CH0_SOC_64B_WR_REQ_UPPER", 1252},
{"GDDR5_CH0_SOC_64B_WR_REQ_LOWER", 1248},
{"GDDR0_CH1_SOC_64B_WR_REQ_UPPER", 532},
{"GDDR0_CH1_SOC_64B_WR_REQ_LOWER", 528},
{"GDDR1_CH1_SOC_64B_WR_REQ_UPPER", 692},
{"GDDR1_CH1_SOC_64B_WR_REQ_LOWER", 688},
{"GDDR2_CH1_SOC_64B_WR_REQ_UPPER", 852},
{"GDDR2_CH1_SOC_64B_WR_REQ_LOWER", 848},
{"GDDR3_CH1_SOC_64B_WR_REQ_UPPER", 1012},
{"GDDR3_CH1_SOC_64B_WR_REQ_LOWER", 1008},
{"GDDR4_CH1_SOC_64B_WR_REQ_UPPER", 1172},
{"GDDR4_CH1_SOC_64B_WR_REQ_LOWER", 1168},
{"GDDR5_CH1_SOC_64B_WR_REQ_UPPER", 1332},
{"GDDR5_CH1_SOC_64B_WR_REQ_LOWER", 1328},
{"GDDR0_CH0_GT_64B_WR_REQ_UPPER", 404},
{"GDDR0_CH0_GT_64B_WR_REQ_LOWER", 400},
{"GDDR1_CH0_GT_64B_WR_REQ_UPPER", 564},
{"GDDR1_CH0_GT_64B_WR_REQ_LOWER", 560},
{"GDDR2_CH0_GT_64B_WR_REQ_UPPER", 724},
{"GDDR2_CH0_GT_64B_WR_REQ_LOWER", 720},
{"GDDR3_CH0_GT_64B_WR_REQ_UPPER", 884},
{"GDDR3_CH0_GT_64B_WR_REQ_LOWER", 880},
{"GDDR4_CH0_GT_64B_WR_REQ_UPPER", 1044},
{"GDDR4_CH0_GT_64B_WR_REQ_LOWER", 1040},
{"GDDR5_CH0_GT_64B_WR_REQ_UPPER", 1204},
{"GDDR5_CH0_GT_64B_WR_REQ_LOWER", 1200},
{"GDDR0_CH1_GT_64B_WR_REQ_UPPER", 484},
{"GDDR0_CH1_GT_64B_WR_REQ_LOWER", 480},
{"GDDR1_CH1_GT_64B_WR_REQ_UPPER", 644},
{"GDDR1_CH1_GT_64B_WR_REQ_LOWER", 640},
{"GDDR2_CH1_GT_64B_WR_REQ_UPPER", 804},
{"GDDR2_CH1_GT_64B_WR_REQ_LOWER", 800},
{"GDDR3_CH1_GT_64B_WR_REQ_UPPER", 964},
{"GDDR3_CH1_GT_64B_WR_REQ_LOWER", 960},
{"GDDR4_CH1_GT_64B_WR_REQ_UPPER", 1124},
{"GDDR4_CH1_GT_64B_WR_REQ_LOWER", 1120},
{"GDDR5_CH1_GT_64B_WR_REQ_UPPER", 1284},
{"GDDR5_CH1_GT_64B_WR_REQ_LOWER", 1280}}}};
template <>
const std::map<std::string, std::map<std::string, uint64_t>> *SysmanProductHelperHw<gfxProduct>::getGuidToKeyOffsetMap() {